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authorChristian Mauderer <Christian.Mauderer@embedded-brains.de>2017-11-07 15:15:38 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2017-11-10 14:01:55 +0100
commit589220752bd4b0a7f8a97e372010bd0c5cfc3fc2 (patch)
tree2946e02cd68b8468649f354f4c3a83704a37aff9 /freebsd/sys/dev/usb
parentusb/saf1761: Import from FreeBSD. (diff)
downloadrtems-libbsd-589220752bd4b0a7f8a97e372010bd0c5cfc3fc2.tar.bz2
saf1761_otg: Port to RTEMS.
Diffstat (limited to 'freebsd/sys/dev/usb')
-rw-r--r--freebsd/sys/dev/usb/controller/saf1761_otg.c54
-rw-r--r--freebsd/sys/dev/usb/controller/saf1761_otg_fdt.c34
2 files changed, 84 insertions, 4 deletions
diff --git a/freebsd/sys/dev/usb/controller/saf1761_otg.c b/freebsd/sys/dev/usb/controller/saf1761_otg.c
index 3ce693b4..f9d28a63 100644
--- a/freebsd/sys/dev/usb/controller/saf1761_otg.c
+++ b/freebsd/sys/dev/usb/controller/saf1761_otg.c
@@ -44,14 +44,14 @@
#else
#include <sys/stdint.h>
#include <sys/stddef.h>
-#include <rtems/bsd/sys/param.h>
+#include <sys/param.h>
#include <sys/queue.h>
#include <sys/types.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/bus.h>
#include <sys/module.h>
-#include <rtems/bsd/sys/lock.h>
+#include <sys/lock.h>
#include <sys/mutex.h>
#include <sys/condvar.h>
#include <sys/sysctl.h>
@@ -82,6 +82,13 @@
#include <dev/usb/controller/saf1761_otg.h>
#include <dev/usb/controller/saf1761_otg_reg.h>
+#ifdef __rtems__
+#include <rtems.h>
+#include <bsp.h>
+#ifdef LIBBSP_ARM_ATSAM_BSP_H
+#include <bsp/pin-config.h>
+#endif /* LIBBSP_ARM_ATSAM_BSP_H */
+#endif /* __rtems__ */
#define SAF1761_OTG_BUS2SC(bus) \
((struct saf1761_otg_softc *)(((uint8_t *)(bus)) - \
@@ -518,7 +525,29 @@ saf1761_host_bulk_data_rx(struct saf1761_otg_softc *sc, struct saf1761_otg_td *t
DPRINTFN(5, "STATUS=0x%08x\n", status);
if (status & SOTG_PTD_DW3_ACTIVE) {
+#ifndef __rtems__
goto busy;
+#else /* __rtems__ */
+ temp = saf1761_peek_host_status_le_4(sc,
+ pdt_addr + SOTG_PTD_DW0);
+ if (temp & SOTG_PTD_DW0_VALID) {
+ goto busy;
+ } else {
+ status = saf1761_peek_host_status_le_4(sc,
+ pdt_addr + SOTG_PTD_DW3);
+
+ /* check if still active */
+ if (status & SOTG_PTD_DW3_ACTIVE) {
+ saf1761_host_channel_free(sc, td);
+ goto retry;
+ } else if (status & SOTG_PTD_DW3_HALTED) {
+ if (!(status & SOTG_PTD_DW3_ERRORS))
+ td->error_stall = 1;
+ td->error_any = 1;
+ goto complete;
+ }
+ }
+#endif /* __rtems__ */
} else if (status & SOTG_PTD_DW3_HALTED) {
if (!(status & SOTG_PTD_DW3_ERRORS))
td->error_stall = 1;
@@ -562,6 +591,9 @@ saf1761_host_bulk_data_rx(struct saf1761_otg_softc *sc, struct saf1761_otg_td *t
}
saf1761_host_channel_free(sc, td);
}
+#ifdef __rtems__
+retry:
+#endif /* __rtems__ */
if (saf1761_host_channel_alloc(sc, td))
goto busy;
@@ -1591,6 +1623,10 @@ saf1761_otg_filter_interrupt(void *arg)
(void) SAF1761_READ_LE_4(sc, SOTG_INT_PTD_DONE_PTD);
(void) SAF1761_READ_LE_4(sc, SOTG_ISO_PTD_DONE_PTD);
+#ifdef __rtems__
+ DPRINTFN(9, "HCINTERRUPT=0x%08x DCINTERRUPT=0x%08x\n", hcstat, status);
+
+#endif /* __rtems__ */
if (status & SOTG_DCINTERRUPT_IEPSOF) {
if ((sc->sc_host_async_busy_map[1] | sc->sc_host_async_busy_map[0] |
sc->sc_host_intr_busy_map[1] | sc->sc_host_intr_busy_map[0] |
@@ -1623,6 +1659,15 @@ saf1761_otg_filter_interrupt(void *arg)
USB_BUS_SPIN_UNLOCK(&sc->sc_bus);
+#ifdef __rtems__
+#ifdef LIBBSP_ARM_ATSAM_BSP_H
+ const Pio *saf_irq_pio = PIOC;
+ /* The PIOC is used only by the SAF1761. So we can just reset the status
+ * without any further handling. */
+ (void) saf_irq_pio->PIO_ISR;
+#endif /* LIBBSP_ARM_ATSAM_BSP_H */
+
+#endif /* __rtems__ */
return (retval);
}
@@ -2448,10 +2493,15 @@ saf1761_otg_init(struct saf1761_otg_softc *sc)
*/
SAF1761_WRITE_LE_4(sc, SOTG_CTRL_SET_CLR,
SOTG_CTRL_CLR(0xFFFF));
+#ifdef __rtems__
+ SAF1761_WRITE_LE_4(sc, SOTG_CTRL_SET_CLR,
+ SOTG_CTRL_SET(SOTG_CTRL_SEL_CP_EXT | SOTG_CTRL_VBUS_DRV));
+#else /* __rtems__ */
SAF1761_WRITE_LE_4(sc, SOTG_CTRL_SET_CLR,
SOTG_CTRL_SET(SOTG_CTRL_SW_SEL_HC_DC |
SOTG_CTRL_BDIS_ACON_EN | SOTG_CTRL_SEL_CP_EXT |
SOTG_CTRL_VBUS_DRV));
+#endif /* __rtems__ */
/* disable device address */
SAF1761_WRITE_LE_4(sc, SOTG_ADDRESS, 0);
diff --git a/freebsd/sys/dev/usb/controller/saf1761_otg_fdt.c b/freebsd/sys/dev/usb/controller/saf1761_otg_fdt.c
index c1e8ff80..32b6b92c 100644
--- a/freebsd/sys/dev/usb/controller/saf1761_otg_fdt.c
+++ b/freebsd/sys/dev/usb/controller/saf1761_otg_fdt.c
@@ -36,14 +36,14 @@
#else
#include <sys/stdint.h>
#include <sys/stddef.h>
-#include <rtems/bsd/sys/param.h>
+#include <sys/param.h>
#include <sys/queue.h>
#include <sys/types.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/bus.h>
#include <sys/module.h>
-#include <rtems/bsd/sys/lock.h>
+#include <sys/lock.h>
#include <sys/mutex.h>
#include <sys/condvar.h>
#include <sys/sysctl.h>
@@ -77,6 +77,13 @@
#include <dev/usb/controller/saf1761_otg.h>
#include <dev/usb/controller/saf1761_otg_reg.h>
+#ifdef __rtems__
+#include <rtems.h>
+#include <bsp.h>
+#ifdef LIBBSP_ARM_ATSAM_BSP_H
+#include <bsp/pin-config.h>
+#endif /* LIBBSP_ARM_ATSAM_BSP_H */
+#endif /* __rtems__ */
static device_probe_t saf1761_otg_fdt_probe;
static device_attach_t saf1761_otg_fdt_attach;
@@ -102,17 +109,26 @@ static driver_t saf1761_otg_driver = {
static devclass_t saf1761_otg_devclass;
+#ifndef __rtems__
DRIVER_MODULE(saf1761otg, simplebus, saf1761_otg_driver, saf1761_otg_devclass, 0, 0);
+#else /* __rtems__ */
+DRIVER_MODULE(saf1761otg, nexus, saf1761_otg_driver, saf1761_otg_devclass, 0, 0);
+#endif /* __rtems__ */
MODULE_DEPEND(saf1761otg, usb, 1, 1, 1);
static int
saf1761_otg_fdt_probe(device_t dev)
{
+#ifndef __rtems__
if (!ofw_bus_status_okay(dev))
return (ENXIO);
if (!ofw_bus_is_compatible(dev, "nxp,usb-isp1761"))
return (ENXIO);
+#else /* __rtems__ */
+ if (device_get_unit(dev) != 0)
+ return (ENXIO);
+#endif /* __rtems__ */
device_set_desc(dev, "ISP1761/SAF1761 DCI USB 2.0 Device Controller");
@@ -127,6 +143,7 @@ saf1761_otg_fdt_attach(device_t dev)
int err;
int rid;
+#ifndef __rtems__
/* get configuration from FDT */
/* get bus-width, if any */
@@ -171,6 +188,10 @@ saf1761_otg_fdt_attach(device_t dev)
sc->sc_interrupt_cfg |= SOTG_INTERRUPT_CFG_INTLVL;
sc->sc_hw_mode |= SOTG_HW_MODE_CTRL_INTR_LEVEL;
}
+#else /* __rtems__ */
+ /* set 16-bit data bus */
+ sc->sc_hw_mode = 0;
+#endif /* __rtems__ */
/* initialise some bus fields */
sc->sc_bus.parent = dev;
@@ -213,6 +234,15 @@ saf1761_otg_fdt_attach(device_t dev)
device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
+#ifdef __rtems__
+#ifdef LIBBSP_ARM_ATSAM_BSP_H
+ const Pin saf_irq = {PIO_PC16, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP | PIO_IT_LOW_LEVEL};
+ /* Activate pin interrupt. Add a default handler that just clears the
+ * status. */
+ PIO_Configure(&saf_irq, 1);
+ PIO_EnableIt(&saf_irq);
+#endif /* LIBBSP_ARM_ATSAM_BSP_H */
+#endif /* __rtems__ */
err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_TTY | INTR_MPSAFE,
&saf1761_otg_filter_interrupt, &saf1761_otg_interrupt, sc, &sc->sc_intr_hdl);
if (err) {