Update to FreeBSD head 2017-10-01

Git mirror commit b2f0376b45428f13151d229c5ae9d4d8f74acbd1.

Update #3472.

1 files changed, 124 insertions, 10 deletions

diff --git a/freebsd/sys/dev/nvme/nvme.h b/freebsd/sys/dev/nvme/nvme.h
index aa640b37..d4fc131e 100644
--- a/freebsd/sys/dev/nvme/nvme.h
+++ b/freebsd/sys/dev/nvme/nvme.h
@@ -69,6 +69,8 @@ union cap_lo_register {
 	} bits __packed;
 } __packed;
 
+_Static_assert(sizeof(union cap_lo_register) == 4, "bad size for cap_lo_register");
+
 union cap_hi_register {
 	uint32_t	raw;
 	struct {
@@ -93,6 +95,8 @@ union cap_hi_register {
 	} bits __packed;
 } __packed;
 
+_Static_assert(sizeof(union cap_hi_register) == 4, "bad size of cap_hi_register");
+
 union cc_register {
 	uint32_t	raw;
 	struct {
@@ -123,6 +127,8 @@ union cc_register {
 	} bits __packed;
 } __packed;
 
+_Static_assert(sizeof(union cc_register) == 4, "bad size for cc_register");
+
 enum shn_value {
 	NVME_SHN_NORMAL		= 0x1,
 	NVME_SHN_ABRUPT		= 0x2,
@@ -144,6 +150,8 @@ union csts_register {
 	} bits __packed;
 } __packed;
 
+_Static_assert(sizeof(union csts_register) == 4, "bad size for csts_register");
+
 enum shst_value {
 	NVME_SHST_NORMAL	= 0x0,
 	NVME_SHST_OCCURRING	= 0x1,
@@ -165,6 +173,8 @@ union aqa_register {
 	} bits __packed;
 } __packed;
 
+_Static_assert(sizeof(union aqa_register) == 4, "bad size for aqa_resgister");
+
 struct nvme_registers
 {
 	/** controller capabilities */
@@ -198,6 +208,8 @@ struct nvme_registers
 	} doorbell[1] __packed;
 } __packed;
 
+_Static_assert(sizeof(struct nvme_registers) == 0x1008, "bad size for nvme_registers");
+
 struct nvme_command
 {
 	/* dword 0 */
@@ -231,6 +243,8 @@ struct nvme_command
 	uint32_t cdw15;		/* command-specific */
 } __packed;
 
+_Static_assert(sizeof(struct nvme_command) == 16 * 4, "bad size for nvme_command");
+
 struct nvme_status {
 
 	uint16_t p	:  1;	/* phase tag */
@@ -241,6 +255,8 @@ struct nvme_status {
 	uint16_t dnr	:  1;	/* do not retry */
 } __packed;
 
+_Static_assert(sizeof(struct nvme_status) == 2, "bad size for nvme_status");
+
 struct nvme_completion {
 
 	/* dword 0 */
@@ -258,6 +274,8 @@ struct nvme_completion {
 	struct nvme_status	status;
 } __packed;
 
+_Static_assert(sizeof(struct nvme_completion) == 4 * 4, "bad size for nvme_completion");
+
 struct nvme_dsm_range {
 
 	uint32_t attributes;
@@ -265,6 +283,8 @@ struct nvme_dsm_range {
 	uint64_t starting_lba;
 } __packed;
 
+_Static_assert(sizeof(struct nvme_dsm_range) == 16, "bad size for nvme_dsm_ranage");
+
 /* status code types */
 enum nvme_status_code_type {
 	NVME_SCT_GENERIC		= 0x0,
@@ -377,7 +397,14 @@ enum nvme_feature {
 	NVME_FEAT_INTERRUPT_VECTOR_CONFIGURATION = 0x09,
 	NVME_FEAT_WRITE_ATOMICITY		= 0x0A,
 	NVME_FEAT_ASYNC_EVENT_CONFIGURATION	= 0x0B,
-	/* 0x0C-0x7F - reserved */
+	NVME_FEAT_AUTONOMOUS_POWER_STATE_TRANSITION = 0x0C,
+	NVME_FEAT_HOST_MEMORY_BUFFER		= 0x0D,
+	NVME_FEAT_TIMESTAMP			= 0x0E,
+	NVME_FEAT_KEEP_ALIVE_TIMER		= 0x0F,
+	NVME_FEAT_HOST_CONTROLLED_THERMAL_MGMT	= 0x10,
+	NVME_FEAT_NON_OP_POWER_STATE_CONFIG	= 0x11,
+	/* 0x12-0x77 - reserved */
+	/* 0x78-0x7f - NVMe Management Interface */
 	NVME_FEAT_SOFTWARE_PROGRESS_MARKER	= 0x80,
 	/* 0x81-0xBF - command set specific (reserved) */
 	/* 0xC0-0xFF - vendor specific */
@@ -423,6 +450,8 @@ struct nvme_power_state {
 	uint8_t		ps_rsvd10[9];
 } __packed;
 
+_Static_assert(sizeof(struct nvme_power_state) == 32, "bad size for nvme_power_state");
+
 #define NVME_SERIAL_NUMBER_LENGTH	20
 #define NVME_MODEL_NUMBER_LENGTH	40
 #define NVME_FIRMWARE_REVISION_LENGTH	8
@@ -461,7 +490,27 @@ struct nvme_controller_data {
 	/** Controller ID */
 	uint16_t		ctrlr_id;
 
-	uint8_t			reserved1[176];
+	/** Version */
+	uint32_t		ver;
+
+	/** RTD3 Resume Latency */
+	uint32_t		rtd3r;
+
+	/** RTD3 Enter Latency */
+	uint32_t		rtd3e;
+
+	/** Optional Asynchronous Events Supported */
+	uint32_t		oaes;	/* bitfield really */
+
+	/** Controller Attributes */
+	uint32_t		ctratt;	/* bitfield really */
+
+	uint8_t			reserved1[12];
+
+	/** FRU Globally Unique Identifier */
+	uint8_t			fguid[16];
+
+	uint8_t			reserved2[128];
 
 	/* bytes 256-511: admin command set attributes */
 
@@ -521,7 +570,28 @@ struct nvme_controller_data {
 		uint8_t		avscc_rsvd  : 7;
 	} __packed avscc;
 
-	uint8_t			reserved2[15];
+	/** Autonomous Power State Transition Attributes */
+	struct {
+		/* Autonmous Power State Transitions supported */
+		uint8_t		apst_supp : 1;
+
+		uint8_t		apsta_rsvd : 7;
+	} __packed apsta;
+
+	/** Warning Composite Temperature Threshold */
+	uint16_t		wctemp;
+
+	/** Critical Composite Temperature Threshold */
+	uint16_t		cctemp;
+
+	/** Maximum Time for Firmware Activation */
+	uint16_t		mtfa;
+
+	/** Host Memory Buffer Preferred Size */
+	uint32_t		hmpre;
+
+	/** Host Memory Buffer Minimum Size */
+	uint32_t		hmmin;
 
 	/** Name space capabilities  */
 	struct {
@@ -530,7 +600,34 @@ struct nvme_controller_data {
 		uint8_t    unvmcap[16];
 	} __packed untncap;
 
-	uint8_t reserved3[200];
+	/** Replay Protected Memory Block Support */
+	uint32_t		rpmbs; /* Really a bitfield */
+
+	/** Extended Device Self-test Time */
+	uint16_t		edstt;
+
+	/** Device Self-test Options */
+	uint8_t			dsto; /* Really a bitfield */
+
+	/** Firmware Update Granularity */
+	uint8_t			fwug;
+
+	/** Keep Alive Support */
+	uint16_t		kas;
+
+	/** Host Controlled Thermal Management Attributes */
+	uint16_t		hctma; /* Really a bitfield */
+
+	/** Minimum Thermal Management Temperature */
+	uint16_t		mntmt;
+
+	/** Maximum Thermal Management Temperature */
+	uint16_t		mxtmt;
+
+	/** Sanitize Capabilities */
+	uint32_t		sanicap; /* Really a bitfield */
+
+	uint8_t reserved3[180];
 	/* bytes 512-703: nvm command set attributes */
 
 	/** submission queue entry size */
@@ -545,7 +642,8 @@ struct nvme_controller_data {
 		uint8_t		max : 4;
 	} __packed cqes;
 
-	uint8_t			reserved4[2];
+	/** Maximum Outstanding Commands */
+	uint16_t		maxcmd;
 
 	/** number of namespaces */
 	uint32_t		nn;
@@ -583,6 +681,8 @@ struct nvme_controller_data {
 	uint8_t			vs[1024];
 } __packed __aligned(4);
 
+_Static_assert(sizeof(struct nvme_controller_data) == 4096, "bad size for nvme_controller_data");
+
 struct nvme_namespace_data {
 
 	/** namespace size */
@@ -673,6 +773,8 @@ struct nvme_namespace_data {
 	uint8_t			vendor_specific[3712];
 } __packed __aligned(4);
 
+_Static_assert(sizeof(struct nvme_namespace_data) == 4096, "bad size for nvme_namepsace_data");
+
 enum nvme_log_page {
 
 	/* 0x00 - reserved */
@@ -715,6 +817,8 @@ struct nvme_error_information_entry {
 	uint8_t			reserved[35];
 } __packed __aligned(4);
 
+_Static_assert(sizeof(struct nvme_error_information_entry) == 64, "bad size for nvme_error_information_entry");
+
 union nvme_critical_warning_state {
 
 	uint8_t		raw;
@@ -729,6 +833,8 @@ union nvme_critical_warning_state {
 	} __packed bits;
 } __packed;
 
+_Static_assert(sizeof(union nvme_critical_warning_state) == 1, "bad size for nvme_critical_warning_state");
+
 struct nvme_health_information_page {
 
 	union nvme_critical_warning_state	critical_warning;
@@ -765,6 +871,8 @@ struct nvme_health_information_page {
 	uint8_t			reserved2[296];
 } __packed __aligned(4);
 
+_Static_assert(sizeof(struct nvme_health_information_page) == 512, "bad size for nvme_health_information_page");
+
 struct nvme_firmware_page {
 
 	struct {
@@ -777,6 +885,8 @@ struct nvme_firmware_page {
 	uint8_t			reserved2[448];
 } __packed __aligned(4);
 
+_Static_assert(sizeof(struct nvme_firmware_page) == 512, "bad size for nvme_firmware_page");
+
 struct intel_log_temp_stats
 {
 	uint64_t	current;
@@ -790,6 +900,8 @@ struct intel_log_temp_stats
 	uint64_t	est_offset;
 } __packed __aligned(4);
 
+_Static_assert(sizeof(struct intel_log_temp_stats) == 13 * 8, "bad size for intel_log_temp_stats");
+
 #define NVME_TEST_MAX_THREADS	128
 
 struct nvme_io_test {
@@ -958,7 +1070,7 @@ int	nvme_ns_bio_process(struct nvme_namespace *ns, struct bio *bp,
 
 /* Command building helper functions -- shared with CAM */
 static inline
-void	nvme_ns_flush_cmd(struct nvme_command *cmd, uint16_t nsid)
+void	nvme_ns_flush_cmd(struct nvme_command *cmd, uint32_t nsid)
 {
 
 	cmd->opc = NVME_OPC_FLUSH;
@@ -966,7 +1078,7 @@ void	nvme_ns_flush_cmd(struct nvme_command *cmd, uint16_t nsid)
 }
 
 static inline
-void	nvme_ns_rw_cmd(struct nvme_command *cmd, uint32_t rwcmd, uint16_t nsid,
+void	nvme_ns_rw_cmd(struct nvme_command *cmd, uint32_t rwcmd, uint32_t nsid,
     uint64_t lba, uint32_t count)
 {
 	cmd->opc = rwcmd;
@@ -980,21 +1092,21 @@ void	nvme_ns_rw_cmd(struct nvme_command *cmd, uint32_t rwcmd, uint16_t nsid,
 }
 
 static inline
-void	nvme_ns_write_cmd(struct nvme_command *cmd, uint16_t nsid,
+void	nvme_ns_write_cmd(struct nvme_command *cmd, uint32_t nsid,
     uint64_t lba, uint32_t count)
 {
 	nvme_ns_rw_cmd(cmd, NVME_OPC_WRITE, nsid, lba, count);
 }
 
 static inline
-void	nvme_ns_read_cmd(struct nvme_command *cmd, uint16_t nsid,
+void	nvme_ns_read_cmd(struct nvme_command *cmd, uint32_t nsid,
     uint64_t lba, uint32_t count)
 {
 	nvme_ns_rw_cmd(cmd, NVME_OPC_READ, nsid, lba, count);
 }
 
 static inline
-void	nvme_ns_trim_cmd(struct nvme_command *cmd, uint16_t nsid,
+void	nvme_ns_trim_cmd(struct nvme_command *cmd, uint32_t nsid,
     uint32_t num_ranges)
 {
 	cmd->opc = NVME_OPC_DATASET_MANAGEMENT;
@@ -1003,6 +1115,8 @@ void	nvme_ns_trim_cmd(struct nvme_command *cmd, uint16_t nsid,
 	cmd->cdw11 = NVME_DSM_ATTR_DEALLOCATE;
 }
 
+extern int nvme_use_nvd;
+
 #endif /* _KERNEL */
 
 #endif /* __NVME_H__ */