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-rw-r--r--user/bsps/arm/imx.rst25
1 files changed, 22 insertions, 3 deletions
diff --git a/user/bsps/arm/imx.rst b/user/bsps/arm/imx.rst
index ee98f0b..47ad503 100644
--- a/user/bsps/arm/imx.rst
+++ b/user/bsps/arm/imx.rst
@@ -1,6 +1,6 @@
.. SPDX-License-Identifier: CC-BY-SA-4.0
-.. Copyright (C) 2017, 2019 embedded brains GmbH
+.. Copyright (C) 2017, 2019 embedded brains GmbH & Co. KG
.. Copyright (C) 2017, 2019 Sebastian Huber
imx (NXP i.MX)
@@ -15,7 +15,9 @@ U-Boot or barebox.
Build Configuration Options
---------------------------
-The following options are available at the configure command line.
+The following options can be used in the BSP section of the waf
+configuration INI file. The waf defaults can be used to inspect the
+values.
``BSP_PRESS_KEY_FOR_RESET``
If defined to a non-zero value, then print a message and wait until pressed
@@ -73,7 +75,7 @@ image. Use the following commands:
.. code-block:: none
- arm-rtems5-objcopy -O binary app.exe app.bin
+ arm-rtems@rtems-ver-major@-objcopy -O binary app.exe app.bin
gzip -9 -f -c app.bin > app.bin.gz
mkimage -A arm -O linux -T kernel -a 0x80200000 -e 0x80200000 -n RTEMS -d app.bin.gz app.img
@@ -174,6 +176,23 @@ config like that:
SYSINIT_DRIVER_REFERENCE(ksz8091rnb, miibus);
#include <machine/rtems-bsd-config.h>
+On chips with two Ethernet controllers, the MDIO lines are shared between the
+two controllers for a number of chips variants. This is currently supported with
+some restrictions on the initialization order. For this configuration to work,
+you have to make sure that the pins are assigned to the Ethernet controller that
+is initialized first. The initialization order in `libbsd` depends on the order
+of the Ethernet controllers in the device tree. So if (for example) `fec2` is
+defined in the device tree sources before `fec1`, make sure that the MDIO lines
+are routed to `fec2` and that the Ethernet PHYs are a sub-node of `fec2` in the
+device tree.
+
+Note that the clock for the second Ethernet controller is not necessarily
+enabled in the `CCM`. On the i.MX6UL/ULL, the clock will be enabled by the
+startup code if the node that is compatible with `fsl,imx6ul-anatop` can be
+found in the device tree. If you have trouble with the second Ethernet
+controller make sure that the `ENET2_125M_EN` bit in the `CCM_ANALOG_PLL_ENET`
+register is set as expected.
+
MMC/SDCard Driver
-----------------