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authorKinsey Moore <kinsey.moore@oarcorp.com>2020-12-07 12:10:26 -0600
committerJoel Sherrill <joel@rtems.org>2020-12-11 17:16:01 -0600
commit9c407619c72bd97b19d96092d20dc48ce9bb0256 (patch)
tree915c16b592303582af9b7b021475d83034a84c22 /user/bsps/aarch64/a53.rst
parentd716c79070901195912526c6e49d43defad00bdd (diff)
downloadrtems-docs-9c407619c72bd97b19d96092d20dc48ce9bb0256.tar.bz2
aarch64: Update interrupt details
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diff --git a/user/bsps/aarch64/a53.rst b/user/bsps/aarch64/a53.rst
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+++ b/user/bsps/aarch64/a53.rst
@@ -8,8 +8,9 @@
Qemu A53
========
-This BSP supports two variants, `qemu_a53_ilp32` and `qemu-a53_lp64`. The basic
-hardware initialization is performed by the BSP.
+This BSP supports two variants, `qemu_a53_ilp32` and `qemu_a53_lp64`. The basic
+hardware initialization is performed by the BSP. These BSPs support the GICv3
+interrupt controller.
Boot via ELF
------------