blob: e8e4b3d5becb80f0af0397e8979efb7a2d16b93d (
plain) (
tree)
|
|
.. SPDX-License-Identifier: CC-BY-SA-4.0
.. Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
.. _BSP_aarch64_qemu_a72_ilp32:
.. _BSP_aarch64_qemu_a72_lp64:
Qemu A72
========
This BSP supports two variants, `qemu_a72_ilp32` and `qemu_a72_lp64`. The basic
hardware initialization is performed by the BSP. These BSPs support the GICv3
interrupt controller.
Boot via ELF
------------
The executable image is booted by Qemu in ELF format.
Clock Driver
------------
The clock driver uses the `ARM Generic Timer`.
Console Driver
--------------
The console driver supports the default Qemu emulated ARM PL011 PrimeCell UART.
Running Executables
-------------------
Executables generated by these BSPs can be run using the following command::
qemu-system-aarch64 -no-reboot -nographic -serial mon:stdio \
-machine virt,gic-version=3 -cpu cortex-a72 -m 4096 -kernel example.exe
|