spec: Add grlib register blocks

1 files changed, 564 insertions, 0 deletions

diff --git a/spec/dev/grlib/if/grspw2.yml b/spec/dev/grlib/if/grspw2.yml
new file mode 100644
index 00000000..f3723f66
--- /dev/null
+++ b/spec/dev/grlib/if/grspw2.yml
@@ -0,0 +1,564 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+brief: |
+  This structure defines the ${.:/register-block-group} register block memory
+  map.
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+description: null
+enabled-by: true
+identifier: RTEMSDeviceGRSPW2
+index-entries: []
+interface-type: register-block
+links:
+- role: interface-ingroup
+  uid: group
+- role: interface-placement
+  uid: grspw2-header
+definition:
+- default:
+    count: 1
+    name: CTRL
+  offset: 0x0
+  variants: []
+- default:
+    count: 1
+    name: STS
+  offset: 0x4
+  variants: []
+- default:
+    count: 1
+    name: DEFADDR
+  offset: 0x8
+  variants: []
+- default:
+    count: 1
+    name: CLKDIV
+  offset: 0xc
+  variants: []
+- default:
+    count: 1
+    name: DKEY
+  offset: 0x10
+  variants: []
+- default:
+    count: 1
+    name: TC
+  offset: 0x14
+  variants: []
+- default:
+    count: 1
+    name: DMACTRL
+  offset: 0x20
+  variants: []
+- default:
+    count: 1
+    name: DMAMAXLEN
+  offset: 0x24
+  variants: []
+- default:
+    count: 1
+    name: DMATXDESC
+  offset: 0x28
+  variants: []
+- default:
+    count: 1
+    name: DMARXDESC
+  offset: 0x2c
+  variants: []
+- default:
+    count: 1
+    name: DMAADDR
+  offset: 0x30
+  variants: []
+register-prefix: null
+register-block-group: GRSPW2
+register-block-size: 52
+register-block-type: memory
+registers:
+- bits:
+  - default:
+    - access: [r]
+      brief: null
+      description: null
+      name: 'RA'
+      start: 31
+      width: 1
+    - access: [r]
+      brief: null
+      description: null
+      name: 'RX'
+      start: 30
+      width: 1
+    - access: [r]
+      brief: null
+      description: null
+      name: 'RC'
+      start: 29
+      width: 1
+    - access: [r]
+      brief: null
+      description: null
+      name: 'NCH'
+      start: 27
+      width: 2
+    - access: [r]
+      brief: null
+      description: null
+      name: 'PO'
+      start: 26
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'RD'
+      start: 17
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'RE'
+      start: 16
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'TL'
+      start: 13
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'TF'
+      start: 12
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'TR'
+      start: 11
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'TT'
+      start: 10
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'LI'
+      start: 9
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'TQ'
+      start: 8
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'RS'
+      start: 6
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'PM'
+      start: 5
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'TI'
+      start: 4
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'IE'
+      start: 3
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'AS'
+      start: 2
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'LS'
+      start: 1
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'LD'
+      start: 0
+      width: 1
+    variants: []
+  brief: |
+    Control
+  description: null
+  name: CTRL
+  width: 32
+- bits:
+  - default:
+    - access: [r]
+      brief: null
+      description: null
+      name: 'NRXD'
+      start: 26
+      width: 2
+    - access: [r]
+      brief: null
+      description: null
+      name: 'NTXD'
+      start: 24
+      width: 2
+    - access: [r]
+      brief: null
+      description: null
+      name: 'LS'
+      start: 21
+      width: 3
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'EE'
+      start: 8
+      width: 1
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'IA'
+      start: 7
+      width: 1
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'PE'
+      start: 4
+      width: 1
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'DE'
+      start: 3
+      width: 1
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'ER'
+      start: 2
+      width: 1
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'CE'
+      start: 1
+      width: 1
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'TO'
+      start: 0
+      width: 1
+    variants: []
+  brief: |
+    Status
+  description: null
+  name: STS
+  width: 32
+- bits:
+  - default:
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'DEFMASK'
+      start: 8
+      width: 8
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'DEFADDR'
+      start: 0
+      width: 8
+    variants: []
+  brief: |
+    Default address
+  description: null
+  name: DEFADDR
+  width: 32
+- bits:
+  - default:
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'CLKDIVSTART'
+      start: 8
+      width: 8
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'CLKDIVRUN'
+      start: 0
+      width: 8
+    variants: []
+  brief: |
+    Clock divisor
+  description: null
+  name: CLKDIV
+  width: 32
+- bits:
+  - default:
+    - access: [r]
+      brief: null
+      description: null
+      name: 'DESTKEY'
+      start: 0
+      width: 8
+    variants: []
+  brief: |
+    Destination key
+  description: null
+  name: DKEY
+  width: 32
+- bits:
+  - default:
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'TCTRL'
+      start: 6
+      width: 2
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'TIMECNT'
+      start: 0
+      width: 6
+    variants: []
+  brief: |
+    Time-code
+  description: null
+  name: TC
+  width: 32
+- bits:
+  - default:
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'EP'
+      start: 23
+      width: 1
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'TR'
+      start: 22
+      width: 1
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'RP'
+      start: 19
+      width: 1
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'TP'
+      start: 18
+      width: 1
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'TL'
+      start: 17
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'LE'
+      start: 16
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'SP'
+      start: 15
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'SA'
+      start: 14
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'EN'
+      start: 13
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'NS'
+      start: 12
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'RD'
+      start: 11
+      width: 1
+    - access: [r]
+      brief: null
+      description: null
+      name: 'RX'
+      start: 10
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'AT'
+      start: 9
+      width: 1
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'RA'
+      start: 8
+      width: 1
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'TA'
+      start: 7
+      width: 1
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'PR'
+      start: 6
+      width: 1
+    - access: [r, w1c]
+      brief: null
+      description: null
+      name: 'PS'
+      start: 5
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'AI'
+      start: 4
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'RI'
+      start: 3
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'TI'
+      start: 2
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'RE'
+      start: 1
+      width: 1
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'TE'
+      start: 0
+      width: 1
+    variants: []
+  brief: |
+    DMA control/status, channel 1
+  description: null
+  name: DMACTRL
+  width: 32
+- bits:
+  - default:
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'RXMAXLEN'
+      start: 2
+      width: 23
+    variants: []
+  brief: |
+    DMA RX maximum length, channel 1
+  description: null
+  name: DMAMAXLEN
+  width: 32
+- bits:
+  - default:
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'DESCBASEADDR'
+      start: 10
+      width: 22
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'DESCSEL'
+      start: 4
+      width: 6
+    variants: []
+  brief: |
+    DMA transmitter descriptor table address, channel 1
+  description: null
+  name: DMATXDESC
+  width: 32
+- bits:
+  - default:
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'DESCBASEADDR'
+      start: 10
+      width: 22
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'DESCSEL'
+      start: 3
+      width: 7
+    variants: []
+  brief: |
+    DMA receiver descriptor table address, channel 1
+  description: null
+  name: DMARXDESC
+  width: 32
+- bits:
+  - default:
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'MASK'
+      start: 8
+      width: 8
+    - access: [r, w]
+      brief: null
+      description: null
+      name: 'ADDR'
+      start: 0
+      width: 8
+    variants: []
+  brief: |
+    DMA address, channel 1
+  description: null
+  name: DMAADDR
+  width: 32
+name: grspw2
+notes: null
+type: interface