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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-03-22 09:27:25 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-06-14 13:58:42 +0200 |
| commit | 83fd13972ac9c43875250decf497ce30151f7157 (patch) | |
| tree | 2c299341781b28bb40e552132b2aba3cf369030c /rtemsspec/interface.py | |
| parent | spec: Selectively enable GRLIB (diff) | |
| download | rtems-central-83fd13972ac9c43875250decf497ce30151f7157.tar.bz2 | |
interface: Add register set macros
Mask the value in the bit field macros.
Diffstat (limited to 'rtemsspec/interface.py')
| -rw-r--r-- | rtemsspec/interface.py | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/rtemsspec/interface.py b/rtemsspec/interface.py index f67b80e3..ac124a68 100644 --- a/rtemsspec/interface.py +++ b/rtemsspec/interface.py @@ -643,9 +643,14 @@ class Node: f"#define {base}_SHIFT {start}", f"#define {base}_MASK {mask:#x}{sfx}", f"#define {base}_GET( _reg ) \\", - f" ( ( ( _reg ) & {base}_MASK ) >> {base}_SHIFT )", - f"#define {base}( _val ) \\", - f" ( ( _val ) << {base}_SHIFT )" + f" ( ( ( _reg ) & {base}_MASK ) >> \\", + f" {base}_SHIFT )", + f"#define {base}_SET( _reg, _val ) \\", + f" ( ( ( _reg ) & ~{base}_MASK ) | \\", + f" ( ( ( _val ) << {base}_SHIFT ) & \\", + f" {base}_MASK ) )", f"#define {base}( _val ) \\", + f" ( ( ( _val ) << {base}_SHIFT ) & \\", + f" {base}_MASK )" ]) return lines |