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authorSebastian Huber <sebastian.huber@embedded-brains.de>2023-07-20 19:47:31 +0200
committerJiri Gaisler <jiri@gaisler.se>2023-09-29 14:40:24 +0200
commitea7db5c21e98d39c95dd520b864c0b69e8f0e65d (patch)
tree29d81a2fa15ae6d7535532ed422c34b4ecbb51bd /grlib.c
parent9756ed371db6fc1babe3949a738d9e2f676d141e (diff)
Add basic DSU support present on GR712RCHEADmaster
Only the time tag counter register is implemented so far. It may be used by clock drivers as a free-running counter to measure time.
Diffstat (limited to 'grlib.c')
-rw-r--r--grlib.c57
1 files changed, 57 insertions, 0 deletions
diff --git a/grlib.c b/grlib.c
index 29785d3..a1ef781 100644
--- a/grlib.c
+++ b/grlib.c
@@ -1784,3 +1784,60 @@ s5test_add (int irq, uint32 addr, uint32 mask)
const struct grlib_ipcore s5test = {
NULL, NULL, NULL, s5test_write, s5test_add
};
+
+
+/* ------------------- Debug Support Unit (DSU) -----------------------*/
+
+#define DSU_TIME_TAG_COUNTER 0x08
+
+static void
+dsu_init (void)
+{
+}
+
+static void
+dsu_add (int irq, uint32 addr, uint32 mask)
+{
+ grlib_ahbspp_add (GRLIB_PP_ID (VENDOR_GAISLER, GAISLER_DSU, 0, 0),
+ GRLIB_PP_AHBADDR (addr, mask, 1, 1, 2), 0, 0, 0);
+ if (sis_verbose)
+ printf (" DSU 0x%08x\n", addr);
+}
+
+static void
+dsu_reset (void)
+{
+}
+
+static int
+dsu_read (uint32 addr, uint32 * data)
+{
+ switch (addr & 0xff)
+ {
+ case DSU_TIME_TAG_COUNTER: /* 0x08 */
+ /*
+ * On some implementations, a number of upper bits are zero. For
+ * example, the GR712RC time tag has only 30 bits implemented. Assume
+ * that the software knows how many bits are present and performs the
+ * necessary masking operations.
+ */
+ *data = sregs[cpu].simtime;
+ break;
+
+ default:
+ *data = 0;
+ break;
+ }
+
+ return 1;
+}
+
+static int
+dsu_write (uint32 addr, uint32 * data, uint32 sz)
+{
+ return 1;
+}
+
+const struct grlib_ipcore dsu = {
+ dsu_init, dsu_reset, dsu_read, dsu_write, dsu_add
+};