1 files changed, 25 insertions, 26 deletions

diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c
index 65f1ad2014..c7d7527dce 100644
--- a/cpukit/score/cpu/arm/cpu.c
+++ b/cpukit/score/cpu/arm/cpu.c
@@ -61,8 +61,7 @@
 #endif
 
 RTEMS_STATIC_ASSERT(
-  offsetof( Context_Control, thread_id )
-    == ARM_CONTEXT_CONTROL_THREAD_ID_OFFSET,
+  offsetof(Context_Control, thread_id) == ARM_CONTEXT_CONTROL_THREAD_ID_OFFSET,
   ARM_CONTEXT_CONTROL_THREAD_ID_OFFSET
 );
 
@@ -83,23 +82,23 @@ RTEMS_STATIC_ASSERT(
 #endif
 
 RTEMS_STATIC_ASSERT(
-  sizeof( CPU_Exception_frame ) == ARM_EXCEPTION_FRAME_SIZE,
+  sizeof(CPU_Exception_frame) == ARM_EXCEPTION_FRAME_SIZE,
   ARM_EXCEPTION_FRAME_SIZE
 );
 
 RTEMS_STATIC_ASSERT(
-  sizeof( CPU_Exception_frame ) % CPU_STACK_ALIGNMENT == 0,
+  sizeof(CPU_Exception_frame) % CPU_STACK_ALIGNMENT == 0,
   CPU_Exception_frame_alignment
 );
 
 RTEMS_STATIC_ASSERT(
-  offsetof( CPU_Exception_frame, register_sp )
-    == ARM_EXCEPTION_FRAME_REGISTER_SP_OFFSET,
+  offsetof(CPU_Exception_frame, register_sp) ==
+    ARM_EXCEPTION_FRAME_REGISTER_SP_OFFSET,
   ARM_EXCEPTION_FRAME_REGISTER_SP_OFFSET
 );
 
 RTEMS_STATIC_ASSERT(
-  sizeof( ARM_VFP_context ) == ARM_VFP_CONTEXT_SIZE,
+  sizeof(ARM_VFP_context) == ARM_VFP_CONTEXT_SIZE,
   ARM_VFP_CONTEXT_SIZE
 );
 
@@ -107,12 +106,12 @@ RTEMS_STATIC_ASSERT(
 
 void _CPU_Context_Initialize(
   Context_Control *the_context,
-  void *stack_area_begin,
-  size_t stack_area_size,
-  uint32_t new_level,
-  void (*entry_point)( void ),
-  bool is_fp,
-  void *tls_area
+  void            *stack_area_begin,
+  size_t           stack_area_size,
+  uint32_t         new_level,
+  void             (*entry_point)(void),
+  bool             is_fp,
+  void            *tls_area
 )
 {
   (void) new_level;
@@ -120,14 +119,14 @@ void _CPU_Context_Initialize(
   the_context->register_sp = (uint32_t) stack_area_begin + stack_area_size;
   the_context->register_lr = (uint32_t) entry_point;
   the_context->isr_dispatch_disable = 0;
-  the_context->thread_id = (uint32_t) tls_area;
+  the_context->thread_id            = (uint32_t) tls_area;
 
   if ( tls_area != NULL ) {
-    the_context->thread_id = (uint32_t) _TLS_Initialize_area( tls_area );
+    the_context->thread_id = (uint32_t) _TLS_Initialize_area(tls_area);
   }
 }
 
-void _CPU_ISR_Set_level( uint32_t level )
+void _CPU_ISR_Set_level(uint32_t level)
 {
   uint32_t arm_switch_reg;
 
@@ -144,7 +143,7 @@ void _CPU_ISR_Set_level( uint32_t level )
   );
 }
 
-uint32_t _CPU_ISR_Get_level( void )
+uint32_t _CPU_ISR_Get_level(void)
 {
   ARM_SWITCH_REGISTERS;
   uint32_t level;
@@ -157,7 +156,7 @@ uint32_t _CPU_ISR_Get_level( void )
     : [level] "=&r" (level) ARM_SWITCH_ADDITIONAL_OUTPUT
   );
 
-  return ( level & ARM_PSR_I ) != 0;
+  return (level & ARM_PSR_I) != 0;
 }
 
 void _CPU_ISR_install_vector(
@@ -169,34 +168,34 @@ void _CPU_ISR_install_vector(
 #pragma GCC diagnostic push
 #pragma GCC diagnostic ignored "-Warray-bounds"
   /* Redirection table starts at the end of the vector table */
-  CPU_ISR_handler volatile  *table = (CPU_ISR_handler *) (MAX_EXCEPTIONS * 4);
+  CPU_ISR_handler volatile *table = (CPU_ISR_handler *) (MAX_EXCEPTIONS * 4);
 
-  CPU_ISR_handler current_handler = table [vector];
+  CPU_ISR_handler current_handler = table[vector];
 
   /* The current handler is now the old one */
-  if (old_handler != NULL) {
+  if ( old_handler != NULL ) {
     *old_handler = current_handler;
   }
 
   /* Write only if necessary to avoid writes to a maybe read-only memory */
-  if (current_handler != new_handler) {
-    table [vector] = new_handler;
+  if ( current_handler != new_handler ) {
+    table[vector] = new_handler;
   }
 #pragma GCC diagnostic pop
 }
 
-void _CPU_Initialize( void )
+void _CPU_Initialize(void)
 {
   /* Do nothing */
 }
 
 #endif /* ARM_MULTILIB_ARCH_V4 */
 
-void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error )
+void _CPU_Fatal_halt(uint32_t source, CPU_Uint32ptr error)
 {
   ISR_Level level;
 
-  _CPU_ISR_Disable( level );
+  _CPU_ISR_Disable(level);
   (void) level;
 
   __asm__ volatile ("mov r0, %0\n"