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Diffstat (limited to 'c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspsmp.c')
-rw-r--r--c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspsmp.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspsmp.c b/c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspsmp.c
index 3b894b460f..591e1cd2e8 100644
--- a/c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspsmp.c
+++ b/c/src/lib/libbsp/arm/altera-cyclone-v/startup/bspsmp.c
@@ -55,7 +55,11 @@ bool _CPU_SMP_Start_processor(uint32_t cpu_index)
ALT_RSTMGR_MPUMODRST_CPU1_SET_MSK
);
- started = true;
+ /*
+ * Wait for secondary processor to complete its basic initialization so
+ * that we can enable the unified L2 cache.
+ */
+ started = _Per_CPU_State_wait_for_non_initial_state(cpu_index, 0);
} else {
started = false;
}
@@ -76,6 +80,9 @@ void _CPU_SMP_Finalize_initialization(uint32_t cpu_count)
NULL
);
assert(sc == RTEMS_SUCCESSFUL);
+
+ /* Enable unified L2 cache */
+ rtems_cache_enable_data();
}
}