diff options
| author | Peng Fan <van.freenix@gmail.com> | 2013-07-24 15:49:29 +0800 |
|---|---|---|
| committer | Peng Fan <van.freenix@gmail.com> | 2013-09-05 13:47:39 +0800 |
| commit | 400bce45a8532b2377c5692da80666196ce09c64 (patch) | |
| tree | 950266e0af9ba23ed722bc8ba2996ff71d9a2b08 /testcase | |
| parent | 42d16f6d37130a3550b537d35698977f06908234 (diff) | |
LM32 Support
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Diffstat (limited to 'testcase')
| -rw-r--r-- | testcase/1.c | 22 | ||||
| -rw-r--r-- | testcase/Readme | 7 | ||||
| -rw-r--r-- | testcase/wscript | 11 |
3 files changed, 40 insertions, 0 deletions
diff --git a/testcase/1.c b/testcase/1.c index 14f6da2..a643d77 100644 --- a/testcase/1.c +++ b/testcase/1.c @@ -242,6 +242,28 @@ int rtems(int argc, char **argv) "1:\n\t" "nop\n\t" ); +#elif defined (__lm32__) + __asm__ volatile ( + "addi sp, sp, -16\n\t" + "sw (sp+8), r1\n\t" + "sw (sp+4), r0\n\t" + "mvhi r1, 1f\n\t" + "ori r1, r1, 1f\n\t" + "lw r1, (r1+0)\n\t" + "mvi r0, 22\n\t" + "sw (r1+0), r0\n\t" + "bi 2f\n\t" + "1:\n\t" + ".word global\n\t" + "2:\n\t" + "nop\n\t" + "lw r1, (sp+8)\n\t" + "lw r0, (sp+4)\n\t" + "addi sp, sp, 16\n\t" : : : "r0", "r1" + ); + + if (global == 22) + printf("R_LM32_32 pass\n"); #else /* other archs */ #endif diff --git a/testcase/Readme b/testcase/Readme index c90ab71..7efb078 100644 --- a/testcase/Readme +++ b/testcase/Readme @@ -35,3 +35,10 @@ h8300: Simulator: h8sim -i build/h8300-rtems4.11-h8sim/rtld + +lm32: + configure --rtems=/opt/rtems-4.11 --rtems-tools=/opt/rtems-4.11 --rtems-archs=lm32 --rtems-bsps=lm32/lm32_evr + + Simulator: + lm32_evr-gdb build/lm32-rtems4.11-lm32_evr/rtld + qemu-system-lm32 -M lm32-evr -nographic -global lm32,sys.enabled=1 -kernel build/lm32-rtems4.11-lm32_evr/rtld diff --git a/testcase/wscript b/testcase/wscript index 1a0d0c5..0a42011 100644 --- a/testcase/wscript +++ b/testcase/wscript @@ -85,6 +85,17 @@ def build(bld): '--entry', '_my_main'], source = ['1.c', '2.c']) + elif arch == 'lm32': + bld(target = 'test.rap', + features = 'c rap', + xxxx = 'hello', + + cflags = '-fno-common', + + rtems_linkflags = ['--base', 'rtld.prelink', + '--entry', 'my_main'], + source = ['1.c', '2.c']) + bld(target = '../test.rap', source = ['test.rap'], rule = 'cp ${SRC} ${TGT}') |