diff options
Diffstat (limited to 'bsps/sparc')
-rw-r--r-- | bsps/sparc/erc32/py/__init__.py | 0 | ||||
-rw-r--r-- | bsps/sparc/erc32/py/bsp.py | 22 | ||||
-rw-r--r-- | bsps/sparc/erc32/py/configure.py | 2 | ||||
-rw-r--r-- | bsps/sparc/erc32/py/option.py | 12 | ||||
-rw-r--r-- | bsps/sparc/erc32/wscript | 24 | ||||
-rw-r--r-- | bsps/sparc/py/__init__.py | 0 | ||||
-rw-r--r-- | bsps/sparc/py/base.py | 10 | ||||
-rw-r--r-- | bsps/sparc/py/configure.py | 2 | ||||
-rw-r--r-- | bsps/sparc/py/option.py | 12 | ||||
-rw-r--r-- | bsps/sparc/shared/wscript | 28 |
10 files changed, 112 insertions, 0 deletions
diff --git a/bsps/sparc/erc32/py/__init__.py b/bsps/sparc/erc32/py/__init__.py new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/bsps/sparc/erc32/py/__init__.py diff --git a/bsps/sparc/erc32/py/bsp.py b/bsps/sparc/erc32/py/bsp.py new file mode 100644 index 0000000000..897c6c1067 --- /dev/null +++ b/bsps/sparc/erc32/py/bsp.py @@ -0,0 +1,22 @@ +class BSP(Base): + bsp = "erc32" + bsp_source_dir = "erc32" + + # Keep this to a very terse description! + descr = "SPARC ERC32" + + def build(self, c): + c.CFLAGS = ['-mcpu=cypress'] + c.LINKCMDS = ['sparc/erc32/start/linkcmds', + 'sparc/shared/start/linkcmds.base'] + c.BSP_SOURCE_DIR = "erc32" + + def header(self, c): + c.CONSOLE_USE_INTERRUPTS = False + c.ENABLE_SIS_QUIRKS = Default + c.SIMSPARC_FAST_IDLE = Default + c.BSP_PRESS_KEY_FOR_RESET = Default + c.BSP_RESET_BOARD_AT_EXIT = Default + c.BSP_PRINT_EXCEPTION_CONTEXT = Default + c.BSP_VERBOSE_FATAL_EXTENSION = Default + diff --git a/bsps/sparc/erc32/py/configure.py b/bsps/sparc/erc32/py/configure.py new file mode 100644 index 0000000000..0a97ae74b7 --- /dev/null +++ b/bsps/sparc/erc32/py/configure.py @@ -0,0 +1,2 @@ +def configure(ctx): + pass diff --git a/bsps/sparc/erc32/py/option.py b/bsps/sparc/erc32/py/option.py new file mode 100644 index 0000000000..681e9269e5 --- /dev/null +++ b/bsps/sparc/erc32/py/option.py @@ -0,0 +1,12 @@ +# Add your options here. + + +class ENABLE_SIS_QUIRKS(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined, then the sis simulator specific code in the bsp will be enabled. +In particular, sis requires special initialization not used on real erc32 + """ + diff --git a/bsps/sparc/erc32/wscript b/bsps/sparc/erc32/wscript new file mode 100644 index 0000000000..772f16283b --- /dev/null +++ b/bsps/sparc/erc32/wscript @@ -0,0 +1,24 @@ +def build(ctx): + source = [] + + source += [ + "btimer/btimer.c", + "clock/ckinit.c", + "console/debugputs.c", + "console/erc32_console.c", + "gnatsupp/gnatsupp.c", + "net/erc32sonic.c", + "start/boardinit.S", + "start/bspdelay.c", + "start/bspidle.c", + "start/bspstart.c", + "start/erc32mec.c", + "start/setvec.c", + "start/spurious.c", + ] + + ctx.bsp.source( + source, + features = "src_include src_include_rtems src_include_score src_include_bsp src_include_bsp_common src_include_bsp_shared src_include_networking", + ) + diff --git a/bsps/sparc/py/__init__.py b/bsps/sparc/py/__init__.py new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/bsps/sparc/py/__init__.py diff --git a/bsps/sparc/py/base.py b/bsps/sparc/py/base.py new file mode 100644 index 0000000000..85bc268bcf --- /dev/null +++ b/bsps/sparc/py/base.py @@ -0,0 +1,10 @@ +from py.config import Default, Config + + +class Base(Config): + arch = name = "sparc" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['crti.o', 'crtbegin.o'] + c.LINK_END = ['crtend.o', 'crtn.o'] diff --git a/bsps/sparc/py/configure.py b/bsps/sparc/py/configure.py new file mode 100644 index 0000000000..0a97ae74b7 --- /dev/null +++ b/bsps/sparc/py/configure.py @@ -0,0 +1,2 @@ +def configure(ctx): + pass diff --git a/bsps/sparc/py/option.py b/bsps/sparc/py/option.py new file mode 100644 index 0000000000..de45f1be18 --- /dev/null +++ b/bsps/sparc/py/option.py @@ -0,0 +1,12 @@ +# Add your options here. + +class SIMSPARC_FAST_IDLE(Boolean): + value = False + tag = ["build"] + undef = True + descr = """ +If defined, speed up the clock ticks while the idle task is running so time +spent in the idle task is minimized. This significantly reduces the wall time +required to execute the rtems test suites. + """ + diff --git a/bsps/sparc/shared/wscript b/bsps/sparc/shared/wscript new file mode 100644 index 0000000000..91c3b975d2 --- /dev/null +++ b/bsps/sparc/shared/wscript @@ -0,0 +1,28 @@ +from imp import new_module +from os.path import basename + + +def build(ctx): + source = [] + + source += [ + "gnatcommon.c", + "irq/bsp_isr_handler.c", + "irq/irq-shared.c", + "start/bsp_fatal_exit.c", + "start/bsp_fatal_halt.c", + "start/bspgetworkarea.c", + ] + + ctx.bsp.start(["start/start.S"]) + + ctx.bsp.source( + source, + features = "src_include src_include_rtems src_include_score src_include_bsp src_include_bsp_common src_include_bsp_shared", +# src_include_networking src_include_score src_include_bsp_common src_include_bsp", +# includes = ["%s/bsps/%s/%s/include/" % (ctx.srcnode.abspath(), ctx.env.RTEMS_ARCH, ctx.env.RTEMS_BSP)] + ) + + + + |