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-rw-r--r--include/arm/lpc17xx_ea_ram/bsp.h130
-rw-r--r--include/arm/lpc17xx_ea_ram/bsp/dma.h95
-rw-r--r--include/arm/lpc17xx_ea_ram/bsp/i2c.h71
-rw-r--r--include/arm/lpc17xx_ea_ram/bsp/io.h1154
-rw-r--r--include/arm/lpc17xx_ea_ram/bsp/irq.h140
-rw-r--r--include/arm/lpc17xx_ea_ram/bsp/lpc-clock-config.h49
-rw-r--r--include/arm/lpc17xx_ea_ram/bsp/lpc-ethernet-config.h130
-rw-r--r--include/arm/lpc17xx_ea_ram/bsp/system-clocks.h89
8 files changed, 1858 insertions, 0 deletions
diff --git a/include/arm/lpc17xx_ea_ram/bsp.h b/include/arm/lpc17xx_ea_ram/bsp.h
new file mode 100644
index 0000000000..e8c5d9ac12
--- /dev/null
+++ b/include/arm/lpc17xx_ea_ram/bsp.h
@@ -0,0 +1,130 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief Global BSP definitions.
+ */
+
+/*
+ * Copyright (c) 2008-2014 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Dornierstr. 4
+ * 82178 Puchheim
+ * Germany
+ * <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_LPC24XX_BSP_H
+#define LIBBSP_ARM_LPC24XX_BSP_H
+
+#include <bspopts.h>
+
+#define BSP_FEATURE_IRQ_EXTENSION
+
+#define LPC24XX_PCLK (LPC24XX_CCLK / LPC24XX_PCLKDIV)
+
+#define LPC24XX_EMCCLK (LPC24XX_CCLK / LPC24XX_EMCCLKDIV)
+
+#define LPC24XX_MPU_REGION_COUNT 8
+
+#define BSP_ARMV7M_IRQ_PRIORITY_DEFAULT (29 << 3)
+
+#define BSP_ARMV7M_SYSTICK_PRIORITY (30 << 3)
+
+#define BSP_ARMV7M_SYSTICK_FREQUENCY LPC24XX_CCLK
+
+#ifndef ASM
+
+#include <rtems.h>
+#include <rtems/console.h>
+#include <rtems/clockdrv.h>
+
+#include <bsp/default-initial-extension.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+struct rtems_bsdnet_ifconfig;
+
+struct rtems_termios_device_context;
+
+/**
+ * @defgroup lpc24xx LPC24XX Support
+ *
+ * @ingroup bsp_arm
+ *
+ * @brief LPC24XX support package.
+ *
+ * @{
+ */
+
+/**
+ * @brief Network driver attach and detach function.
+ */
+int lpc_eth_attach_detach(
+ struct rtems_bsdnet_ifconfig *config,
+ int attaching
+);
+
+/**
+ * @brief Standard network driver attach and detach function.
+ */
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH lpc_eth_attach_detach
+
+/**
+ * @brief Standard network driver name.
+ */
+#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0"
+
+/**
+ * @brief Optimized idle task.
+ *
+ * This idle task sets the power mode to idle. This causes the processor clock
+ * to be stopped, while on-chip peripherals remain active. Any enabled
+ * interrupt from a peripheral or an external interrupt source will cause the
+ * processor to resume execution.
+ *
+ * To enable the idle task use the following in the system configuration:
+ *
+ * @code
+ * #include <bsp.h>
+ *
+ * #define CONFIGURE_INIT
+ *
+ * #define CONFIGURE_IDLE_TASK_BODY bsp_idle_thread
+ *
+ * #include <confdefs.h>
+ * @endcode
+ */
+void *bsp_idle_thread(uintptr_t ignored);
+
+#ifdef ARM_MULTILIB_ARCH_V4
+ #define BSP_CONSOLE_UART_BASE 0xe000c000
+#else
+ #define BSP_CONSOLE_UART_BASE 0x4000c000
+#endif
+
+void bsp_restart(void *addr);
+
+bool lpc24xx_uart_probe_1(struct rtems_termios_device_context *context);
+
+bool lpc24xx_uart_probe_2(struct rtems_termios_device_context *context);
+
+bool lpc24xx_uart_probe_3(struct rtems_termios_device_context *context);
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* ASM */
+
+#endif /* LIBBSP_ARM_LPC24XX_BSP_H */
diff --git a/include/arm/lpc17xx_ea_ram/bsp/dma.h b/include/arm/lpc17xx_ea_ram/bsp/dma.h
new file mode 100644
index 0000000000..b2e6c3e665
--- /dev/null
+++ b/include/arm/lpc17xx_ea_ram/bsp/dma.h
@@ -0,0 +1,95 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx_dma
+ *
+ * @brief Direct memory access (DMA) support.
+ */
+
+/*
+ * Copyright (c) 2008, 2009
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_LPC24XX_DMA_H
+#define LIBBSP_ARM_LPC24XX_DMA_H
+
+#include <rtems.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * @defgroup lpc24xx_dma DMA Support
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief Direct memory access (DMA) support.
+ *
+ * @{
+ */
+
+/**
+ * @brief Initializes the general purpose DMA.
+ */
+void lpc24xx_dma_initialize(void);
+
+/**
+ * @brief Tries to obtain the DMA channel @a channel.
+ *
+ * @retval RTEMS_SUCCESSFUL Successful operation.
+ * @retval RTEMS_INVALID_ID Invalid channel number.
+ * @retval RTEMS_RESOURCE_IN_USE Channel already occupied.
+ */
+rtems_status_code lpc24xx_dma_channel_obtain(unsigned channel);
+
+/**
+ * @brief Releases the DMA channel @a channel.
+ *
+ * You must have obtained this channel with lpc24xx_dma_channel_obtain()
+ * previously.
+ *
+ * If the channel number @a channel is out of range nothing will happen.
+ */
+void lpc24xx_dma_channel_release(unsigned channel);
+
+/**
+ * @brief Disables the DMA channel @a channel.
+ *
+ * If @a force is @c false the channel will be halted and disabled when the
+ * channel is inactive otherwise it will be disabled immediately.
+ *
+ * If the channel number @a channel is out of range nothing will happen.
+ */
+void lpc24xx_dma_channel_disable(unsigned channel, bool force);
+
+rtems_status_code lpc24xx_dma_copy_initialize(void);
+
+rtems_status_code lpc24xx_dma_copy_release(void);
+
+rtems_status_code lpc24xx_dma_copy(
+ unsigned channel,
+ void *dest,
+ const void *src,
+ size_t n,
+ size_t width
+);
+
+rtems_status_code lpc24xx_dma_copy_wait(unsigned channel);
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_LPC24XX_DMA_H */
diff --git a/include/arm/lpc17xx_ea_ram/bsp/i2c.h b/include/arm/lpc17xx_ea_ram/bsp/i2c.h
new file mode 100644
index 0000000000..42836ddfa8
--- /dev/null
+++ b/include/arm/lpc17xx_ea_ram/bsp/i2c.h
@@ -0,0 +1,71 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx_libi2c
+ *
+ * @brief LibI2C bus driver for the I2C modules.
+ */
+
+/*
+ * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_LPC24XX_I2C_H
+#define LIBBSP_ARM_LPC24XX_I2C_H
+
+#include <rtems.h>
+#include <rtems/libi2c.h>
+
+#include <bsp/io.h>
+#include <bsp/lpc24xx.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * @defgroup lpc24xx_libi2c LPC24XX Bus Drivers
+ *
+ * @ingroup libi2c
+ *
+ * @brief LibI2C bus drivers for LPC24XX.
+ *
+ * @{
+ */
+
+typedef struct {
+ rtems_libi2c_bus_t bus;
+ volatile lpc24xx_i2c *regs;
+ size_t index;
+ const lpc24xx_pin_range *pins;
+ rtems_vector_number vector;
+ rtems_id state_update;
+ uint8_t *volatile data;
+ uint8_t *volatile end;
+} lpc24xx_i2c_bus_entry;
+
+extern const rtems_libi2c_bus_ops_t lpc24xx_i2c_ops;
+
+extern rtems_libi2c_bus_t *const lpc24xx_i2c_0;
+
+extern rtems_libi2c_bus_t *const lpc24xx_i2c_1;
+
+extern rtems_libi2c_bus_t *const lpc24xx_i2c_2;
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_LPC24XX_I2C_H */
diff --git a/include/arm/lpc17xx_ea_ram/bsp/io.h b/include/arm/lpc17xx_ea_ram/bsp/io.h
new file mode 100644
index 0000000000..9f58ee8efb
--- /dev/null
+++ b/include/arm/lpc17xx_ea_ram/bsp/io.h
@@ -0,0 +1,1154 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx_io
+ *
+ * @brief Input and output module.
+ */
+
+/*
+ * Copyright (c) 2009-2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_LPC24XX_IO_H
+#define LIBBSP_ARM_LPC24XX_IO_H
+
+#include <rtems.h>
+
+#include <bsp/lpc24xx.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * @defgroup lpc24xx_io IO Support and Configuration
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief Input and output module.
+ *
+ * @{
+ */
+
+#define LPC24XX_IO_PORT_COUNT 5U
+
+#define LPC24XX_IO_INDEX_MAX (LPC24XX_IO_PORT_COUNT * 32U)
+
+#define LPC24XX_IO_INDEX_BY_PORT(port, bit) (((port) << 5U) + (bit))
+
+#define LPC24XX_IO_PORT(index) ((index) >> 5U)
+
+#define LPC24XX_IO_PORT_BIT(index) ((index) & 0x1fU)
+
+typedef enum {
+ #ifdef ARM_MULTILIB_ARCH_V4
+ LPC24XX_MODULE_ACF,
+ #endif
+ LPC24XX_MODULE_ADC,
+ #ifdef ARM_MULTILIB_ARCH_V4
+ LPC24XX_MODULE_BAT_RAM,
+ #endif
+ LPC24XX_MODULE_CAN_0,
+ LPC24XX_MODULE_CAN_1,
+ LPC24XX_MODULE_DAC,
+ LPC24XX_MODULE_EMC,
+ LPC24XX_MODULE_ETHERNET,
+ LPC24XX_MODULE_GPDMA,
+ LPC24XX_MODULE_GPIO,
+ LPC24XX_MODULE_I2C_0,
+ LPC24XX_MODULE_I2C_1,
+ LPC24XX_MODULE_I2C_2,
+ LPC24XX_MODULE_I2S,
+ LPC24XX_MODULE_LCD,
+ LPC24XX_MODULE_MCI,
+ #ifdef ARM_MULTILIB_ARCH_V7M
+ LPC24XX_MODULE_MCPWM,
+ #endif
+ LPC24XX_MODULE_PCB,
+ LPC24XX_MODULE_PWM_0,
+ LPC24XX_MODULE_PWM_1,
+ #ifdef ARM_MULTILIB_ARCH_V7M
+ LPC24XX_MODULE_QEI,
+ #endif
+ LPC24XX_MODULE_RTC,
+ #ifdef ARM_MULTILIB_ARCH_V4
+ LPC24XX_MODULE_SPI,
+ #endif
+ LPC24XX_MODULE_SSP_0,
+ LPC24XX_MODULE_SSP_1,
+ #ifdef ARM_MULTILIB_ARCH_V7M
+ LPC24XX_MODULE_SSP_2,
+ #endif
+ LPC24XX_MODULE_SYSCON,
+ LPC24XX_MODULE_TIMER_0,
+ LPC24XX_MODULE_TIMER_1,
+ LPC24XX_MODULE_TIMER_2,
+ LPC24XX_MODULE_TIMER_3,
+ LPC24XX_MODULE_UART_0,
+ LPC24XX_MODULE_UART_1,
+ LPC24XX_MODULE_UART_2,
+ LPC24XX_MODULE_UART_3,
+ #ifdef ARM_MULTILIB_ARCH_V7M
+ LPC24XX_MODULE_UART_4,
+ #endif
+ #ifdef ARM_MULTILIB_ARCH_V4
+ LPC24XX_MODULE_WDT,
+ #endif
+ LPC24XX_MODULE_USB
+} lpc24xx_module;
+
+#define LPC24XX_MODULE_COUNT (LPC24XX_MODULE_USB + 1)
+
+typedef enum {
+ LPC24XX_MODULE_PCLK_DEFAULT = 0x4U,
+ LPC24XX_MODULE_CCLK = 0x1U,
+ LPC24XX_MODULE_CCLK_2 = 0x2U,
+ LPC24XX_MODULE_CCLK_4 = 0x0U,
+ LPC24XX_MODULE_CCLK_6 = 0x3U,
+ LPC24XX_MODULE_CCLK_8 = 0x3U
+} lpc24xx_module_clock;
+
+#define LPC24XX_MODULE_CLOCK_MASK 0x3U
+
+typedef enum {
+ LPC24XX_GPIO_DEFAULT = 0x0U,
+ LPC24XX_GPIO_RESISTOR_PULL_UP = 0x0U,
+ LPC24XX_GPIO_RESISTOR_NONE = 0x1U,
+ LPC24XX_GPIO_RESISTOR_PULL_DOWN = 0x2U,
+ LPC24XX_GPIO_INPUT = 0x0U,
+ #ifdef ARM_MULTILIB_ARCH_V7M
+ LPC17XX_GPIO_REPEATER = 0x3U,
+ LPC17XX_GPIO_HYSTERESIS = IOCON_HYS,
+ LPC17XX_GPIO_INPUT_INVERT = IOCON_INV,
+ LPC17XX_GPIO_FAST_MODE = IOCON_SLEW,
+ LPC17XX_GPIO_OPEN_DRAIN = IOCON_OD,
+ LPC17XX_GPIO_INPUT_FILTER = IOCON_FILTER,
+ #endif
+ LPC24XX_GPIO_OUTPUT = 0x8000U
+} lpc24xx_gpio_settings;
+
+rtems_status_code lpc24xx_module_enable(
+ lpc24xx_module module,
+ lpc24xx_module_clock clock
+);
+
+rtems_status_code lpc24xx_module_disable(
+ lpc24xx_module module
+);
+
+bool lpc24xx_module_is_enabled(lpc24xx_module module);
+
+rtems_status_code lpc24xx_gpio_config(
+ unsigned index,
+ lpc24xx_gpio_settings settings
+);
+
+static inline void lpc24xx_gpio_set(unsigned index)
+{
+ if (index <= LPC24XX_IO_INDEX_MAX) {
+ unsigned port = LPC24XX_IO_PORT(index);
+ unsigned bit = LPC24XX_IO_PORT_BIT(index);
+
+ LPC24XX_FIO [port].set = 1U << bit;
+ }
+}
+
+static inline void lpc24xx_gpio_clear(unsigned index)
+{
+ if (index <= LPC24XX_IO_INDEX_MAX) {
+ unsigned port = LPC24XX_IO_PORT(index);
+ unsigned bit = LPC24XX_IO_PORT_BIT(index);
+
+ LPC24XX_FIO [port].clr = 1U << bit;
+ }
+}
+
+static inline void lpc24xx_gpio_write(unsigned index, bool value)
+{
+ if (value) {
+ lpc24xx_gpio_set(index);
+ } else {
+ lpc24xx_gpio_clear(index);
+ }
+}
+
+static inline bool lpc24xx_gpio_get(unsigned index)
+{
+ if (index <= LPC24XX_IO_INDEX_MAX) {
+ unsigned port = LPC24XX_IO_PORT(index);
+ unsigned bit = LPC24XX_IO_PORT_BIT(index);
+
+ return (LPC24XX_FIO [port].pin & (1U << bit)) != 0;
+ } else {
+ return false;
+ }
+}
+
+typedef enum {
+ /**
+ * @brief Sets the pin function.
+ */
+ LPC24XX_PIN_SET_FUNCTION,
+
+ /**
+ * @brief Checks if all pins are configured with the specified function.
+ */
+ LPC24XX_PIN_CHECK_FUNCTION,
+
+ /**
+ * @brief Configures the pins as input.
+ */
+ LPC24XX_PIN_SET_INPUT,
+
+ /**
+ * @brief Checks if all pins are configured as input.
+ */
+ LPC24XX_PIN_CHECK_INPUT
+} lpc24xx_pin_action;
+
+typedef union {
+ struct {
+ uint16_t port : 3;
+ uint16_t port_bit : 5;
+ uint16_t function : 3;
+ uint16_t type : 4;
+ uint16_t range : 1;
+ } fields;
+ uint16_t value;
+} lpc24xx_pin_range;
+
+typedef enum {
+ LPC24XX_PIN_FUNCTION_00,
+ LPC24XX_PIN_FUNCTION_01,
+ LPC24XX_PIN_FUNCTION_10,
+ LPC24XX_PIN_FUNCTION_11
+} lpc24xx_pin_function;
+
+typedef enum {
+ LPC17XX_PIN_TYPE_DEFAULT,
+ LPC17XX_PIN_TYPE_ADC,
+ LPC17XX_PIN_TYPE_DAC,
+ LPC17XX_PIN_TYPE_I2C,
+ LPC17XX_PIN_TYPE_I2C_FAST_PLUS,
+ LPC17XX_PIN_TYPE_OPEN_DRAIN
+} lpc17xx_pin_type;
+
+#ifdef ARM_MULTILIB_ARCH_V4
+ #define LPC24XX_PIN(p, i, f0, f1) { { p, i, f0, 0, 0 } }
+ #define LPC24XX_PIN_WITH_TYPE(p, i, f0, f1, t) { { p, i, f0, t, 0 } }
+ #define LPC24XX_PIN_RANGE(p, i, j, f0, f1) \
+ { { p, i, f0, 0, 0 } }, { { p, j, f0, 0, 1 } }
+#else
+ #define LPC24XX_PIN(p, i, f0, f1) { { p, i, f1, 0, 0 } }
+ #define LPC24XX_PIN_WITH_TYPE(p, i, f0, f1, t) { { p, i, f1, t, 0 } }
+ #define LPC24XX_PIN_RANGE(p, i, j, f0, f1) \
+ { { p, i, f1, 0, 0 } }, { { p, j, f1, 0, 1 } }
+#endif
+
+#define LPC24XX_PIN_TERMINAL { { 0x7, 0x1f, 0x7, 0xf, 0x1 } }
+
+/**
+ * @brief Performs the @a action with the @a pins
+ *
+ * @code
+ * #include <assert.h>
+ * #include <bsp/io.h>
+ *
+ * void example(void)
+ * {
+ * static const lpc24xx_pin_range pins [] = {
+ * LPC24XX_PIN_I2S_RX_CLK_P0_4,
+ * LPC24XX_PIN_I2S_RX_WS_P0_5,
+ * LPC24XX_PIN_I2S_RX_SDA_P0_6,
+ * LPC24XX_PIN_I2S_TX_CLK_P0_7,
+ * LPC24XX_PIN_I2S_TX_WS_P0_8,
+ * LPC24XX_PIN_I2S_TX_SDA_P0_9,
+ * LPC24XX_PIN_TERMINAL
+ * };
+ * rtems_status_code sc = RTEMS_SUCCESSFUL;
+ *
+ * sc = lpc24xx_module_enable(LPC24XX_MODULE_I2S, LPC24XX_MODULE_CCLK_8);
+ * assert(sc == RTEMS_SUCCESSFUL);
+ * sc = lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
+ * assert(sc == RTEMS_SUCCESSFUL);
+ * }
+ * @endcode
+ *
+ * @retval RTEMS_SUCCESSFUL Successful operation.
+ * @retval RTEMS_IO_ERROR Check failed.
+ * @retval RTEMS_NOT_DEFINED Invalid action.
+ */
+rtems_status_code lpc24xx_pin_config(
+ const lpc24xx_pin_range *pins,
+ lpc24xx_pin_action action
+);
+
+/**
+ * @brief Returns the first pin index of a pin range.
+ */
+static inline unsigned lpc24xx_pin_get_first_index(
+ const lpc24xx_pin_range *range
+)
+{
+ return LPC24XX_IO_INDEX_BY_PORT(range->fields.port, range->fields.port_bit);
+}
+
+/**
+ * @name ADC Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_ADC_CHANNEL_0 \
+ LPC24XX_PIN_WITH_TYPE(0, 23, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_ADC)
+#define LPC24XX_PIN_ADC_CHANNEL_1 \
+ LPC24XX_PIN_WITH_TYPE(0, 24, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_ADC)
+#define LPC24XX_PIN_ADC_CHANNEL_2 \
+ LPC24XX_PIN_WITH_TYPE(0, 25, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_ADC)
+#define LPC24XX_PIN_ADC_CHANNEL_3 \
+ LPC24XX_PIN_WITH_TYPE(0, 26, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_ADC)
+#define LPC24XX_PIN_ADC_CHANNEL_4 \
+ LPC24XX_PIN_WITH_TYPE(1, 30, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_ADC)
+#define LPC24XX_PIN_ADC_CHANNEL_5 \
+ LPC24XX_PIN_WITH_TYPE(1, 31, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_ADC)
+#define LPC24XX_PIN_ADC_CHANNEL_6 \
+ LPC24XX_PIN_WITH_TYPE(0, 12, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_ADC)
+#define LPC24XX_PIN_ADC_CHANNEL_7 \
+ LPC24XX_PIN_WITH_TYPE(0, 13, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_ADC)
+
+/** @} */
+
+/**
+ * @name CAN 0 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_CAN_0_RD_P0_0 \
+ LPC24XX_PIN(0, 0, LPC24XX_PIN_FUNCTION_01, 1)
+
+#define LPC24XX_PIN_CAN_0_RD_P0_21 \
+ LPC24XX_PIN(0, 21, LPC24XX_PIN_FUNCTION_11, 4)
+
+#define LPC24XX_PIN_CAN_0_TD_P0_1 \
+ LPC24XX_PIN(0, 1, LPC24XX_PIN_FUNCTION_01, 1)
+
+#define LPC24XX_PIN_CAN_0_TD_P0_22 \
+ LPC24XX_PIN(0, 22, LPC24XX_PIN_FUNCTION_11, 4)
+
+/** @} */
+
+/**
+ * @name CAN 1 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_CAN_1_RD_P0_4 \
+ LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_10, 2)
+
+#define LPC24XX_PIN_CAN_1_RD_P2_7 \
+ LPC24XX_PIN(2, 7, LPC24XX_PIN_FUNCTION_01, 1)
+
+#define LPC24XX_PIN_CAN_1_TD_P0_5 \
+ LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_10, 2)
+
+#define LPC24XX_PIN_CAN_1_TD_P2_8 \
+ LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_01, 1)
+
+/** @} */
+
+/**
+ * @name DAC Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_DAC \
+ LPC24XX_PIN_WITH_TYPE(0, 26, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_DAC)
+
+/** @} */
+
+/**
+ * @name Ethernet Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_ETHERNET_MII \
+ LPC24XX_PIN_RANGE(1, 0, 17, LPC24XX_PIN_FUNCTION_01, 1)
+
+#define LPC24XX_PIN_ETHERNET_RMII_0 \
+ LPC24XX_PIN_RANGE(1, 0, 1, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_ETHERNET_RMII_1 \
+ LPC24XX_PIN(1, 4, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_ETHERNET_RMII_2 \
+ LPC24XX_PIN_RANGE(1, 8, 10, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_ETHERNET_RMII_3 \
+ LPC24XX_PIN_RANGE(1, 14, 17, LPC24XX_PIN_FUNCTION_01, 1)
+
+/** @} */
+
+/**
+ * @name External Interrupt Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_EINT_0 \
+ LPC24XX_PIN(2, 10, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EINT_1 \
+ LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EINT_2 \
+ LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EINT_3 \
+ LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01, 1)
+
+/** @} */
+
+/**
+ * @name External Memory Controller (EMC) Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_EMC_CS_0 \
+ LPC24XX_PIN(4, 30, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_CS_1 \
+ LPC24XX_PIN(4, 31, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_CS_2 \
+ LPC24XX_PIN(2, 14, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_CS_3 \
+ LPC24XX_PIN(2, 15, LPC24XX_PIN_FUNCTION_01, 1)
+
+#define LPC24XX_PIN_EMC_DYCS_0 \
+ LPC24XX_PIN(2, 20, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_DYCS_1 \
+ LPC24XX_PIN(2, 21, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_DYCS_2 \
+ LPC24XX_PIN(2, 22, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_DYCS_3 \
+ LPC24XX_PIN(2, 23, LPC24XX_PIN_FUNCTION_01, 1)
+
+#define LPC24XX_PIN_EMC_OE \
+ LPC24XX_PIN(4, 24, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_WE \
+ LPC24XX_PIN(4, 25, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_CAS \
+ LPC24XX_PIN(2, 16, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_RAS \
+ LPC24XX_PIN(2, 17, LPC24XX_PIN_FUNCTION_01, 1)
+
+#define LPC24XX_PIN_EMC_CLK_0 \
+ LPC24XX_PIN(2, 18, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_CLK_1 \
+ LPC24XX_PIN(2, 19, LPC24XX_PIN_FUNCTION_01, 1)
+
+#define LPC24XX_PIN_EMC_CKE_0 \
+ LPC24XX_PIN(2, 24, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_CKE_1 \
+ LPC24XX_PIN(2, 25, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_CKE_2 \
+ LPC24XX_PIN(2, 26, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_CKE_3 \
+ LPC24XX_PIN(2, 27, LPC24XX_PIN_FUNCTION_01, 1)
+
+#define LPC24XX_PIN_EMC_DQM_0 \
+ LPC24XX_PIN(2, 28, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_DQM_1 \
+ LPC24XX_PIN(2, 29, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_DQM_2 \
+ LPC24XX_PIN(2, 30, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_DQM_3 \
+ LPC24XX_PIN(2, 31, LPC24XX_PIN_FUNCTION_01, 1)
+
+#define LPC24XX_PIN_EMC_BLS0 \
+ LPC24XX_PIN(4, 26, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_BLS1 \
+ LPC24XX_PIN(4, 27, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_BLS2 \
+ LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_BLS3 \
+ LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_01, 1)
+
+#define LPC24XX_PIN_EMC_D_0_15 \
+ LPC24XX_PIN_RANGE(3, 0, 15, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_D_15_31 \
+ LPC24XX_PIN_RANGE(3, 15, 31, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_D_0_31 \
+ LPC24XX_PIN_RANGE(3, 0, 31, LPC24XX_PIN_FUNCTION_01, 1)
+
+#define LPC24XX_PIN_EMC_A_0_12 \
+ LPC24XX_PIN_RANGE(4, 0, 12, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_A_0_13 \
+ LPC24XX_PIN_RANGE(4, 0, 13, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_A_0_14 \
+ LPC24XX_PIN_RANGE(4, 0, 14, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_A_0_15 \
+ LPC24XX_PIN_RANGE(4, 0, 15, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_A_0_16 \
+ LPC24XX_PIN_EMC_A_0_15, \
+ LPC24XX_PIN(4, 16, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_A_0_17 \
+ LPC24XX_PIN_EMC_A_0_15, \
+ LPC24XX_PIN_RANGE(4, 16, 17, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_A_0_18 \
+ LPC24XX_PIN_EMC_A_0_15, \
+ LPC24XX_PIN_RANGE(4, 16, 18, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_A_0_19 \
+ LPC24XX_PIN_EMC_A_0_15, \
+ LPC24XX_PIN_RANGE(4, 16, 19, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_A_0_20 \
+ LPC24XX_PIN_EMC_A_0_15, \
+ LPC24XX_PIN_RANGE(4, 16, 20, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_A_0_21 \
+ LPC24XX_PIN_EMC_A_0_15, \
+ LPC24XX_PIN_RANGE(4, 16, 21, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_A_0_22 \
+ LPC24XX_PIN_EMC_A_0_15, \
+ LPC24XX_PIN_RANGE(4, 16, 22, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_A_0_23 \
+ LPC24XX_PIN_EMC_A_0_15, \
+ LPC24XX_PIN_RANGE(4, 16, 23, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_A_0_24 \
+ LPC24XX_PIN_EMC_A_0_23, \
+ LPC24XX_PIN(5, 24, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_EMC_A_0_25 \
+ LPC24XX_PIN_EMC_A_0_23, \
+ LPC24XX_PIN_RANGE(5, 24, 25, LPC24XX_PIN_FUNCTION_01, 1)
+
+/** @} */
+
+/**
+ * @name I2C 0 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_I2C_0_SDA \
+ LPC24XX_PIN_WITH_TYPE(0, 27, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_I2C)
+#define LPC24XX_PIN_I2C_0_SCL \
+ LPC24XX_PIN_WITH_TYPE(0, 28, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_I2C)
+
+/** @} */
+
+/**
+ * @name I2C 1 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_I2C_1_SDA_P0_0 \
+ LPC24XX_PIN_WITH_TYPE(0, 0, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_I2C)
+#define LPC24XX_PIN_I2C_1_SDA_P0_19 \
+ LPC24XX_PIN_WITH_TYPE(0, 19, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_I2C)
+#define LPC24XX_PIN_I2C_1_SDA_P2_14 \
+ LPC24XX_PIN_WITH_TYPE(2, 14, LPC24XX_PIN_FUNCTION_11, 2, LPC17XX_PIN_TYPE_I2C)
+
+#define LPC24XX_PIN_I2C_1_SCL_P0_1 \
+ LPC24XX_PIN_WITH_TYPE(0, 1, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_I2C)
+#define LPC24XX_PIN_I2C_1_SCL_P0_20 \
+ LPC24XX_PIN_WITH_TYPE(0, 20, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_I2C)
+#define LPC24XX_PIN_I2C_1_SCL_P2_15 \
+ LPC24XX_PIN_WITH_TYPE(2, 15, LPC24XX_PIN_FUNCTION_11, 2, LPC17XX_PIN_TYPE_I2C)
+
+/** @} */
+
+/**
+ * @name I2C 2 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_I2C_2_SDA_P0_10 \
+ LPC24XX_PIN_WITH_TYPE(0, 10, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_I2C)
+#define LPC24XX_PIN_I2C_2_SDA_P2_30 \
+ LPC24XX_PIN_WITH_TYPE(2, 30, LPC24XX_PIN_FUNCTION_11, 2, LPC17XX_PIN_TYPE_I2C)
+#define LPC24XX_PIN_I2C_2_SDA_P4_20 \
+ LPC24XX_PIN_WITH_TYPE(4, 20, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_I2C)
+
+#define LPC24XX_PIN_I2C_2_SCL_P0_11 \
+ LPC24XX_PIN_WITH_TYPE(0, 11, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_I2C)
+#define LPC24XX_PIN_I2C_2_SCL_P2_31 \
+ LPC24XX_PIN_WITH_TYPE(2, 31, LPC24XX_PIN_FUNCTION_11, 2, LPC17XX_PIN_TYPE_I2C)
+#define LPC24XX_PIN_I2C_2_SCL_P4_21 \
+ LPC24XX_PIN_WITH_TYPE(4, 21, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_I2C)
+
+/** @} */
+
+/**
+ * @name I2S Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_I2S_RX_CLK_P0_4 \
+ LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_I2S_RX_CLK_P0_23 \
+ LPC24XX_PIN(0, 23, LPC24XX_PIN_FUNCTION_10, 2)
+
+#define LPC24XX_PIN_I2S_RX_WS_P0_5 \
+ LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_I2S_RX_WS_P0_24 \
+ LPC24XX_PIN(0, 24, LPC24XX_PIN_FUNCTION_10, 2)
+
+#define LPC24XX_PIN_I2S_RX_SDA_P0_6 \
+ LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_I2S_RX_SDA_P0_25 \
+ LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_10, 2)
+
+#define LPC24XX_PIN_I2S_TX_CLK_P0_7 \
+ LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_I2S_TX_CLK_P2_11 \
+ LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_11, 3)
+
+#define LPC24XX_PIN_I2S_TX_WS_P0_8 \
+ LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_I2S_TX_WS_P2_12 \
+ LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_11, 3)
+
+#define LPC24XX_PIN_I2S_TX_SDA_P0_9 \
+ LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_I2S_TX_SDA_P2_13 \
+ LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_11, 3)
+
+/** @} */
+
+/**
+ * @name LCD Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_LCD_PWR \
+ LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_11, 7)
+#define LPC24XX_PIN_LCD_LE \
+ LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_11, 7)
+#define LPC24XX_PIN_LCD_DCLK \
+ LPC24XX_PIN(2, 2, LPC24XX_PIN_FUNCTION_11, 7)
+#define LPC24XX_PIN_LCD_FP \
+ LPC24XX_PIN(2, 3, LPC24XX_PIN_FUNCTION_11, 7)
+#define LPC24XX_PIN_LCD_ENAB_M \
+ LPC24XX_PIN(2, 4, LPC24XX_PIN_FUNCTION_11, 7)
+#define LPC24XX_PIN_LCD_LP \
+ LPC24XX_PIN(2, 5, LPC24XX_PIN_FUNCTION_11, 7)
+#define LPC24XX_PIN_LCD_CLKIN \
+ LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_01, 7)
+
+#define LPC24XX_PIN_LCD_VD_0_P0_4 \
+ LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_0_P2_6 \
+ LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_11, 6)
+#define LPC24XX_PIN_LCD_VD_1_P0_5 \
+ LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_1_P2_7 \
+ LPC24XX_PIN(2, 7, LPC24XX_PIN_FUNCTION_11, 6)
+#define LPC24XX_PIN_LCD_VD_2_P2_8 \
+ LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_11, 6)
+#define LPC24XX_PIN_LCD_VD_2_P4_28 \
+ LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_10, 7)
+#define LPC24XX_PIN_LCD_VD_3_P2_9 \
+ LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_11, 6)
+#define LPC24XX_PIN_LCD_VD_3_P2_12 \
+ LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 5)
+#define LPC24XX_PIN_LCD_VD_3_P4_29 \
+ LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_10, 7)
+#define LPC24XX_PIN_LCD_VD_4_P2_6 \
+ LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_11, 7)
+#define LPC24XX_PIN_LCD_VD_4_P2_12 \
+ LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 4)
+#define LPC24XX_PIN_LCD_VD_5_P2_7 \
+ LPC24XX_PIN(2, 7, LPC24XX_PIN_FUNCTION_11, 7)
+#define LPC24XX_PIN_LCD_VD_5_P2_13 \
+ LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01, 5)
+#define LPC24XX_PIN_LCD_VD_6_P1_20 \
+ LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01, 6)
+#define LPC24XX_PIN_LCD_VD_6_P2_8 \
+ LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_11, 7)
+#define LPC24XX_PIN_LCD_VD_6_P4_28 \
+ LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_10, 5)
+#define LPC24XX_PIN_LCD_VD_7_P1_21 \
+ LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01, 6)
+#define LPC24XX_PIN_LCD_VD_7_P2_9 \
+ LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_11, 7)
+#define LPC24XX_PIN_LCD_VD_7_P4_29 \
+ LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_10, 5)
+#define LPC24XX_PIN_LCD_VD_8_P0_6 \
+ LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_8_P1_22 \
+ LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01, 6)
+#define LPC24XX_PIN_LCD_VD_8_P2_12 \
+ LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 6)
+#define LPC24XX_PIN_LCD_VD_9_P0_7 \
+ LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_9_P1_23 \
+ LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01, 6)
+#define LPC24XX_PIN_LCD_VD_9_P2_13 \
+ LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01, 6)
+#define LPC24XX_PIN_LCD_VD_10_P1_20 \
+ LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_10_P1_24 \
+ LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01, 6)
+#define LPC24XX_PIN_LCD_VD_10_P4_28 \
+ LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_10, 6)
+#define LPC24XX_PIN_LCD_VD_11_P1_21 \
+ LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_11_P1_25 \
+ LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01, 6)
+#define LPC24XX_PIN_LCD_VD_11_P4_29 \
+ LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_10, 6)
+#define LPC24XX_PIN_LCD_VD_12_P1_22 \
+ LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_12_P1_26 \
+ LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01, 6)
+#define LPC24XX_PIN_LCD_VD_13_P1_23 \
+ LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_13_P1_27 \
+ LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01, 6)
+#define LPC24XX_PIN_LCD_VD_14_P1_24 \
+ LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_14_P1_28 \
+ LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01, 6)
+#define LPC24XX_PIN_LCD_VD_15_P1_25 \
+ LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_15_P1_29 \
+ LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_01, 6)
+#define LPC24XX_PIN_LCD_VD_16_P0_8 \
+ LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_17_P0_9 \
+ LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_18_P2_12 \
+ LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_19_P2_13 \
+ LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_20_P1_26 \
+ LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_21_P1_27 \
+ LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_22_P1_28 \
+ LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01, 7)
+#define LPC24XX_PIN_LCD_VD_23_P1_29 \
+ LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_01, 7)
+
+/** @} */
+
+/**
+ * @name PWM 0 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_PWM_0_CHANNEL_1_P1_2 \
+ LPC24XX_PIN(1, 2, LPC24XX_PIN_FUNCTION_11, 3)
+#define LPC24XX_PIN_PWM_0_CHANNEL_1_P3_16 \
+ LPC24XX_PIN(3, 16, LPC24XX_PIN_FUNCTION_10, 2)
+
+#define LPC24XX_PIN_PWM_0_CHANNEL_2_P1_3 \
+ LPC24XX_PIN(1, 3, LPC24XX_PIN_FUNCTION_11, 3)
+#define LPC24XX_PIN_PWM_0_CHANNEL_2_P3_17 \
+ LPC24XX_PIN(3, 17, LPC24XX_PIN_FUNCTION_10, 2)
+
+#define LPC24XX_PIN_PWM_0_CHANNEL_3_P1_5 \
+ LPC24XX_PIN(1, 5, LPC24XX_PIN_FUNCTION_11, 3)
+#define LPC24XX_PIN_PWM_0_CHANNEL_3_P3_18 \
+ LPC24XX_PIN(3, 18, LPC24XX_PIN_FUNCTION_10, 2)
+
+#define LPC24XX_PIN_PWM_0_CHANNEL_4_P1_6 \
+ LPC24XX_PIN(1, 6, LPC24XX_PIN_FUNCTION_11, 3)
+#define LPC24XX_PIN_PWM_0_CHANNEL_4_P3_19 \
+ LPC24XX_PIN(3, 19, LPC24XX_PIN_FUNCTION_10, 2)
+
+#define LPC24XX_PIN_PWM_0_CHANNEL_5_P1_7 \
+ LPC24XX_PIN(1, 7, LPC24XX_PIN_FUNCTION_11, 3)
+#define LPC24XX_PIN_PWM_0_CHANNEL_5_P3_20 \
+ LPC24XX_PIN(3, 20, LPC24XX_PIN_FUNCTION_10, 2)
+
+#define LPC24XX_PIN_PWM_0_CHANNEL_6_P1_11 \
+ LPC24XX_PIN(1, 11, LPC24XX_PIN_FUNCTION_11, 3)
+#define LPC24XX_PIN_PWM_0_CHANNEL_6_P3_21 \
+ LPC24XX_PIN(3, 21, LPC24XX_PIN_FUNCTION_10, 2)
+
+#define LPC24XX_PIN_PWM_0_CAPTURE_0_P1_12 \
+ LPC24XX_PIN(1, 12, LPC24XX_PIN_FUNCTION_11, 3)
+#define LPC24XX_PIN_PWM_0_CAPTURE_0_P3_22 \
+ LPC24XX_PIN(3, 22, LPC24XX_PIN_FUNCTION_10, 2)
+
+/** @} */
+
+/**
+ * @name PWM 1 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_PWM_1_CHANNEL_1_P1_18 \
+ LPC24XX_PIN(1, 18, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_PWM_1_CHANNEL_1_P2_0 \
+ LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_PWM_1_CHANNEL_1_P3_24 \
+ LPC24XX_PIN(3, 24, LPC24XX_PIN_FUNCTION_11, 2)
+
+#define LPC24XX_PIN_PWM_1_CHANNEL_2_P1_20 \
+ LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_PWM_1_CHANNEL_2_P2_1 \
+ LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_PWM_1_CHANNEL_2_P3_25 \
+ LPC24XX_PIN(3, 25, LPC24XX_PIN_FUNCTION_11, 2)
+
+#define LPC24XX_PIN_PWM_1_CHANNEL_3_P1_21 \
+ LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_PWM_1_CHANNEL_3_P2_2 \
+ LPC24XX_PIN(2, 2, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_PWM_1_CHANNEL_3_P3_26 \
+ LPC24XX_PIN(3, 26, LPC24XX_PIN_FUNCTION_11, 2)
+
+#define LPC24XX_PIN_PWM_1_CHANNEL_4_P1_23 \
+ LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_PWM_1_CHANNEL_4_P2_3 \
+ LPC24XX_PIN(2, 3, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_PWM_1_CHANNEL_4_P3_27 \
+ LPC24XX_PIN(3, 27, LPC24XX_PIN_FUNCTION_11, 2)
+
+#define LPC24XX_PIN_PWM_1_CHANNEL_5_P1_24 \
+ LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_PWM_1_CHANNEL_5_P2_4 \
+ LPC24XX_PIN(2, 4, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_PWM_1_CHANNEL_5_P3_28 \
+ LPC24XX_PIN(3, 28, LPC24XX_PIN_FUNCTION_11, 2)
+
+#define LPC24XX_PIN_PWM_1_CHANNEL_6_P1_26 \
+ LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_PWM_1_CHANNEL_6_P2_5 \
+ LPC24XX_PIN(2, 5, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_PWM_1_CHANNEL_6_P3_29 \
+ LPC24XX_PIN(3, 29, LPC24XX_PIN_FUNCTIO9_11, 2)
+
+#define LPC24XX_PIN_PWM_1_CAPTURE_0_P1_28 \
+ LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_PWM_1_CAPTURE_0_P2_7 \
+ LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_PWM_1_CAPTURE_0_P3_23 \
+ LPC24XX_PIN(3, 23, LPC24XX_PIN_FUNCTION_11, 2)
+
+#define LPC24XX_PIN_PWM_1_CAPTURE_1_P1_29 \
+ LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_10, 2)
+
+/** @} */
+
+#ifdef ARM_MULTILIB_ARCH_V4
+
+/**
+ * @name SPI Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_SPI_SCK \
+ LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SPI_SSEL \
+ LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SPI_MISO \
+ LPC24XX_PIN(0, 17, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SPI_MOSI \
+ LPC24XX_PIN(0, 18, LPC24XX_PIN_FUNCTION_11)
+
+/** @} */
+
+#endif /* ARM_MULTILIB_ARCH_V4 */
+
+/**
+ * @name SSP 0 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_SSP_0_SCK_P0_15 \
+ LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_SSP_0_SCK_P1_20 \
+ LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_11, 5)
+#define LPC24XX_PIN_SSP_0_SCK_P2_22 \
+ LPC24XX_PIN(2, 22, LPC24XX_PIN_FUNCTION_11, 2)
+
+#define LPC24XX_PIN_SSP_0_SSEL_P0_16 \
+ LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_SSP_0_SSEL_P1_21 \
+ LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_11, 3)
+#define LPC24XX_PIN_SSP_0_SSEL_P2_23 \
+ LPC24XX_PIN(2, 23, LPC24XX_PIN_FUNCTION_11, 2)
+
+#define LPC24XX_PIN_SSP_0_MISO_P0_17 \
+ LPC24XX_PIN(0, 17, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_SSP_0_MISO_P1_23 \
+ LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_11, 5)
+#define LPC24XX_PIN_SSP_0_MISO_P2_26 \
+ LPC24XX_PIN(2, 26, LPC24XX_PIN_FUNCTION_11, 2)
+
+#define LPC24XX_PIN_SSP_0_MOSI_P0_18 \
+ LPC24XX_PIN(0, 18, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_SSP_0_MOSI_P1_24 \
+ LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_11, 5)
+#define LPC24XX_PIN_SSP_0_MOSI_P2_27 \
+ LPC24XX_PIN(2, 27, LPC24XX_PIN_FUNCTION_11, 2)
+
+/** @} */
+
+/**
+ * @name SSP 1 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_SSP_1_SCK_P0_6 \
+ LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_SSP_1_SCK_P0_12 \
+ LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_SSP_1_SCK_P4_20 \
+ LPC24XX_PIN(4, 20, LPC24XX_PIN_FUNCTION_11, 3)
+
+#define LPC24XX_PIN_SSP_1_SSEL_P0_7 \
+ LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_SSP_1_SSEL_P0_13 \
+ LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_11, 2)
+#define LPC24XX_PIN_SSP_1_SSEL_P4_21 \
+ LPC24XX_PIN(4, 21, LPC24XX_PIN_FUNCTION_11, 3)
+
+#define LPC24XX_PIN_SSP_1_MISO_P0_8 \
+ LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_SSP_1_MISO_P0_14 \
+ LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_SSP_1_MISO_P4_22 \
+ LPC24XX_PIN(4, 22, LPC24XX_PIN_FUNCTION_11, 3)
+
+#define LPC24XX_PIN_SSP_1_MOSI_P0_9 \
+ LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_SSP_1_MOSI_P1_31 \
+ LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_SSP_1_MOSI_P4_23 \
+ LPC24XX_PIN(4, 23, LPC24XX_PIN_FUNCTION_11, 3)
+
+/** @} */
+
+#ifdef ARM_MULTILIB_ARCH_V7M
+
+/**
+ * @name SSP 2 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_SSP_2_SCK_P1_0 \
+ LPC24XX_PIN(1, 0, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_SSP_2_SSEL_P1_8 \
+ LPC24XX_PIN(1, 8, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_SSP_2_MISO_P1_4 \
+ LPC24XX_PIN(1, 4, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_SSP_2_MOSI_P1_1 \
+ LPC24XX_PIN(1, 1, LPC24XX_PIN_FUNCTION_00, 4)
+
+/** @} */
+
+#endif /* ARM_MULTILIB_ARCH_V7M */
+
+/**
+ * @name UART 0 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_UART_0_TXD \
+ LPC24XX_PIN(0, 2, LPC24XX_PIN_FUNCTION_01, 1)
+
+#define LPC24XX_PIN_UART_0_RXD \
+ LPC24XX_PIN(0, 3, LPC24XX_PIN_FUNCTION_01, 1)
+
+/** @} */
+
+/**
+ * @name UART 1 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_UART_1_TXD_P0_15 \
+ LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_UART_1_TXD_P2_0 \
+ LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_UART_1_TXD_P3_16 \
+ LPC24XX_PIN(3, 16, LPC24XX_PIN_FUNCTION_11, 3)
+
+#define LPC24XX_PIN_UART_1_RXD_P0_16 \
+ LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_UART_1_RXD_P2_1 \
+ LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_UART_1_RXD_P3_17 \
+ LPC24XX_PIN(3, 17, LPC24XX_PIN_FUNCTION_11, 3)
+
+/** @} */
+
+/**
+ * @name UART 2 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_UART_2_TXD_P0_10 \
+ LPC24XX_PIN(0, 10, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_UART_2_TXD_P2_8 \
+ LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_UART_2_TXD_P4_22 \
+ LPC24XX_PIN(4, 22, LPC24XX_PIN_FUNCTION_10, 2)
+
+#define LPC24XX_PIN_UART_2_RXD_P0_11 \
+ LPC24XX_PIN(0, 11, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_UART_2_RXD_P2_9 \
+ LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_UART_2_RXD_P4_23 \
+ LPC24XX_PIN(4, 23, LPC24XX_PIN_FUNCTION_10, 2)
+
+/** @} */
+
+/**
+ * @name UART 3 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_UART_3_TXD_P0_0 \
+ LPC24XX_PIN(0, 0, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_UART_3_TXD_P0_25 \
+ LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_11, 3)
+#define LPC24XX_PIN_UART_3_TXD_P4_28 \
+ LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_11, 2)
+
+#define LPC24XX_PIN_UART_3_RXD_P0_1 \
+ LPC24XX_PIN(0, 1, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_UART_3_RXD_P0_26 \
+ LPC24XX_PIN(0, 26, LPC24XX_PIN_FUNCTION_11, 3)
+#define LPC24XX_PIN_UART_3_RXD_P4_29 \
+ LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_11, 2)
+
+/** @} */
+
+#ifdef ARM_MULTILIB_ARCH_V7M
+
+/**
+ * @name UART 4 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_UART_4_TXD_P0_22 \
+ LPC24XX_PIN(0, 22, LPC24XX_PIN_FUNCTION_00, 3)
+#define LPC24XX_PIN_UART_4_TXD_P1_29 \
+ LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_00, 5)
+#define LPC24XX_PIN_UART_4_TXD_P5_4 \
+ LPC24XX_PIN(5, 4, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_UART_4_RXD_P2_9 \
+ LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_00, 3)
+#define LPC24XX_PIN_UART_4_RXD_P5_3 \
+ LPC24XX_PIN(5, 3, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_UART_4_OE_P0_21 \
+ LPC24XX_PIN(0, 21, LPC24XX_PIN_FUNCTION_00, 3)
+
+#define LPC24XX_PIN_UART_4_SCLK_P0_21 \
+ LPC24XX_PIN(0, 21, LPC24XX_PIN_FUNCTION_00, 5)
+
+#endif /* ARM_MULTILIB_ARCH_V7M */
+
+/** @} */
+
+/**
+ * @name USB Port 1 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_USB_D_PLUS_1\
+ LPC24XX_PIN(0, 29, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_D_MINUS_1\
+ LPC24XX_PIN(0, 30, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_UP_LED_1\
+ LPC24XX_PIN(1, 18, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_TX_E_1\
+ LPC24XX_PIN(1, 19, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_PPWR_1\
+ LPC24XX_PIN(1, 19, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_USB_TX_DP_1\
+ LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_TX_DM_1\
+ LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_RCV_1\
+ LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_PWRD_1\
+ LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_USB_RX_DP_1\
+ LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_RX_DM_1\
+ LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_LS_1\
+ LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_HSTEN_1\
+ LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_USB_SSPND_1\
+ LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_INT_1\
+ LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_OVRCR_1\
+ LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_10, 2)
+#define LPC24XX_PIN_USB_SCL_1\
+ LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_SDA_1 \
+ LPC24XX_PIN_WITH_TYPE( \
+ 1, 29, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_OPEN_DRAIN \
+ )
+#define LPC24XX_PIN_USB_CONNECT_1\
+ LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_01, 1)
+
+/** @} */
+
+/**
+ * @name USB Port 2 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_USB_PPWR_2\
+ LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_UP_LED_2\
+ LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_HSTEN_2\
+ LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_CONNECT_2\
+ LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_01, 3)
+#define LPC24XX_PIN_USB_D_PLUS_2\
+ LPC24XX_PIN(0, 31, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_PWRD_2\
+ LPC24XX_PIN(1, 30, LPC24XX_PIN_FUNCTION_01, 1)
+#define LPC24XX_PIN_USB_OVRCR_2\
+ LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_01, 1)
+
+/** @} */
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_LPC24XX_IO_H */
diff --git a/include/arm/lpc17xx_ea_ram/bsp/irq.h b/include/arm/lpc17xx_ea_ram/bsp/irq.h
new file mode 100644
index 0000000000..0f0e473a0c
--- /dev/null
+++ b/include/arm/lpc17xx_ea_ram/bsp/irq.h
@@ -0,0 +1,140 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_interrupt
+ *
+ * @brief LPC24XX interrupt definitions.
+ */
+
+/*
+ * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_LPC24XX_IRQ_H
+#define LIBBSP_ARM_LPC24XX_IRQ_H
+
+#ifndef ASM
+ #include <rtems.h>
+ #include <rtems/irq.h>
+ #include <rtems/irq-extension.h>
+#endif
+
+/**
+ * @addtogroup bsp_interrupt
+ *
+ * @{
+ */
+
+#define BSP_INTERRUPT_VECTOR_MIN 0
+
+#ifdef ARM_MULTILIB_ARCH_V4
+ #define LPC24XX_IRQ_WDT 0
+ #define LPC24XX_IRQ_SOFTWARE 1
+ #define LPC24XX_IRQ_ARM_CORE_0 2
+ #define LPC24XX_IRQ_ARM_CORE_1 3
+ #define LPC24XX_IRQ_TIMER_0 4
+ #define LPC24XX_IRQ_TIMER_1 5
+ #define LPC24XX_IRQ_UART_0 6
+ #define LPC24XX_IRQ_UART_1 7
+ #define LPC24XX_IRQ_PWM 8
+ #define LPC24XX_IRQ_I2C_0 9
+ #define LPC24XX_IRQ_SPI_SSP_0 10
+ #define LPC24XX_IRQ_SSP_1 11
+ #define LPC24XX_IRQ_PLL 12
+ #define LPC24XX_IRQ_RTC 13
+ #define LPC24XX_IRQ_EINT_0 14
+ #define LPC24XX_IRQ_EINT_1 15
+ #define LPC24XX_IRQ_EINT_2 16
+ #define LPC24XX_IRQ_EINT_3 17
+ #define LPC24XX_IRQ_ADC_0 18
+ #define LPC24XX_IRQ_I2C_1 19
+ #define LPC24XX_IRQ_BOD 20
+ #define LPC24XX_IRQ_ETHERNET 21
+ #define LPC24XX_IRQ_USB 22
+ #define LPC24XX_IRQ_CAN 23
+ #define LPC24XX_IRQ_SD_MMC 24
+ #define LPC24XX_IRQ_DMA 25
+ #define LPC24XX_IRQ_TIMER_2 26
+ #define LPC24XX_IRQ_TIMER_3 27
+ #define LPC24XX_IRQ_UART_2 28
+ #define LPC24XX_IRQ_UART_3 29
+ #define LPC24XX_IRQ_I2C_2 30
+ #define LPC24XX_IRQ_I2S 31
+
+ #define BSP_INTERRUPT_VECTOR_MAX 31
+#else
+ #define LPC24XX_IRQ_WDT 0
+ #define LPC24XX_IRQ_TIMER_0 1
+ #define LPC24XX_IRQ_TIMER_1 2
+ #define LPC24XX_IRQ_TIMER_2 3
+ #define LPC24XX_IRQ_TIMER_3 4
+ #define LPC24XX_IRQ_UART_0 5
+ #define LPC24XX_IRQ_UART_1 6
+ #define LPC24XX_IRQ_UART_2 7
+ #define LPC24XX_IRQ_UART_3 8
+ #define LPC24XX_IRQ_PWM_1 9
+ #define LPC24XX_IRQ_I2C_0 10
+ #define LPC24XX_IRQ_I2C_1 11
+ #define LPC24XX_IRQ_I2C_2 12
+ #define LPC24XX_IRQ_SPI_SSP_0 14
+ #define LPC24XX_IRQ_SSP_1 15
+ #define LPC24XX_IRQ_PLL 16
+ #define LPC24XX_IRQ_RTC 17
+ #define LPC24XX_IRQ_EINT_0 18
+ #define LPC24XX_IRQ_EINT_1 19
+ #define LPC24XX_IRQ_EINT_2 20
+ #define LPC24XX_IRQ_EINT_3 21
+ #define LPC24XX_IRQ_ADC_0 22
+ #define LPC24XX_IRQ_BOD 23
+ #define LPC24XX_IRQ_USB 24
+ #define LPC24XX_IRQ_CAN 25
+ #define LPC24XX_IRQ_DMA 26
+ #define LPC24XX_IRQ_I2S 27
+ #define LPC24XX_IRQ_ETHERNET 28
+ #define LPC24XX_IRQ_SD_MMC 29
+ #define LPC24XX_IRQ_MCPWM 30
+ #define LPC24XX_IRQ_QEI 31
+ #define LPC24XX_IRQ_PLL_ALT 32
+ #define LPC24XX_IRQ_USB_ACTIVITY 33
+ #define LPC24XX_IRQ_CAN_ACTIVITY 34
+ #define LPC24XX_IRQ_UART_4 35
+ #define LPC24XX_IRQ_SSP_2 36
+ #define LPC24XX_IRQ_LCD 37
+ #define LPC24XX_IRQ_GPIO 38
+ #define LPC24XX_IRQ_PWM 39
+ #define LPC24XX_IRQ_EEPROM 40
+
+ #define BSP_INTERRUPT_VECTOR_MAX 40
+#endif
+
+#define LPC24XX_IRQ_PRIORITY_VALUE_MIN 0
+#ifdef ARM_MULTILIB_ARCH_V4
+ #define LPC24XX_IRQ_PRIORITY_VALUE_MAX 15
+#else
+ #define LPC24XX_IRQ_PRIORITY_VALUE_MAX 31
+#endif
+#define LPC24XX_IRQ_PRIORITY_COUNT (LPC24XX_IRQ_PRIORITY_VALUE_MAX + 1)
+#define LPC24XX_IRQ_PRIORITY_HIGHEST LPC24XX_IRQ_PRIORITY_VALUE_MIN
+#define LPC24XX_IRQ_PRIORITY_LOWEST LPC24XX_IRQ_PRIORITY_VALUE_MAX
+
+#ifndef ASM
+
+void lpc24xx_irq_set_priority(rtems_vector_number vector, unsigned priority);
+
+unsigned lpc24xx_irq_get_priority(rtems_vector_number vector);
+
+#endif /* ASM */
+
+/** @} */
+
+#endif /* LIBBSP_ARM_LPC24XX_IRQ_H */
diff --git a/include/arm/lpc17xx_ea_ram/bsp/lpc-clock-config.h b/include/arm/lpc17xx_ea_ram/bsp/lpc-clock-config.h
new file mode 100644
index 0000000000..5e6b469e0f
--- /dev/null
+++ b/include/arm/lpc17xx_ea_ram/bsp/lpc-clock-config.h
@@ -0,0 +1,49 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief Clock driver configuration.
+ */
+
+/*
+ * Copyright (c) 2009
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_LPC24XX_LPC_CLOCK_CONFIG_H
+#define LIBBSP_ARM_LPC24XX_LPC_CLOCK_CONFIG_H
+
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <bsp/lpc24xx.h>
+#include <bsp/io.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define LPC_CLOCK_INTERRUPT LPC24XX_IRQ_TIMER_0
+
+#define LPC_CLOCK_TIMER_BASE TMR0_BASE_ADDR
+
+#define LPC_CLOCK_TIMECOUNTER_BASE TMR1_BASE_ADDR
+
+#define LPC_CLOCK_REFERENCE LPC24XX_PCLK
+
+#define LPC_CLOCK_MODULE_ENABLE() \
+ lpc24xx_module_enable(LPC24XX_MODULE_TIMER_0, LPC24XX_MODULE_PCLK_DEFAULT)
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_LPC24XX_LPC_CLOCK_CONFIG_H */
diff --git a/include/arm/lpc17xx_ea_ram/bsp/lpc-ethernet-config.h b/include/arm/lpc17xx_ea_ram/bsp/lpc-ethernet-config.h
new file mode 100644
index 0000000000..d24f132567
--- /dev/null
+++ b/include/arm/lpc17xx_ea_ram/bsp/lpc-ethernet-config.h
@@ -0,0 +1,130 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief Ethernet driver configuration.
+ */
+
+/*
+ * Copyright (c) 2009-2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_LPC24XX_LPC_ETHERNET_CONFIG_H
+#define LIBBSP_ARM_LPC24XX_LPC_ETHERNET_CONFIG_H
+
+#include <bsp.h>
+#include <bsp/io.h>
+#include <bsp/lpc24xx.h>
+
+#include <limits.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define LPC_ETH_CONFIG_INTERRUPT LPC24XX_IRQ_ETHERNET
+
+#define LPC_ETH_CONFIG_REG_BASE MAC_BASE_ADDR
+
+#ifdef ARM_MULTILIB_ARCH_V4
+ #define LPC_ETH_CONFIG_RX_UNIT_COUNT_DEFAULT 16
+ #define LPC_ETH_CONFIG_RX_UNIT_COUNT_MAX 54
+
+ #define LPC_ETH_CONFIG_TX_UNIT_COUNT_DEFAULT 10
+ #define LPC_ETH_CONFIG_TX_UNIT_COUNT_MAX 10
+
+ #define LPC_ETH_CONFIG_UNIT_MULTIPLE 1U
+
+ #define LPC24XX_ETH_RAM_BEGIN 0x7fe00000U
+ #define LPC24XX_ETH_RAM_SIZE (16U * 1024U)
+#else
+ #define LPC_ETH_CONFIG_RX_UNIT_COUNT_DEFAULT 16
+ #define LPC_ETH_CONFIG_RX_UNIT_COUNT_MAX INT_MAX
+
+ #define LPC_ETH_CONFIG_TX_UNIT_COUNT_DEFAULT 32
+ #define LPC_ETH_CONFIG_TX_UNIT_COUNT_MAX INT_MAX
+
+ #define LPC_ETH_CONFIG_UNIT_MULTIPLE 8U
+
+ #define LPC_ETH_CONFIG_USE_TRANSMIT_DMA
+
+ #define LPC24XX_ETH_RAM_BEGIN 0x20000000U
+ #define LPC24XX_ETH_RAM_SIZE (32U * 1024U)
+#endif
+
+#ifdef LPC24XX_ETHERNET_RMII
+ #define LPC_ETH_CONFIG_RMII
+
+ static void lpc_eth_config_module_enable(void)
+ {
+ static const lpc24xx_pin_range pins [] = {
+ #ifdef LPC24XX_PIN_ETHERNET_POWER_DOWN
+ LPC24XX_PIN_ETHERNET_POWER_DOWN,
+ #endif
+ LPC24XX_PIN_ETHERNET_RMII_0,
+ LPC24XX_PIN_ETHERNET_RMII_1,
+ LPC24XX_PIN_ETHERNET_RMII_2,
+ LPC24XX_PIN_ETHERNET_RMII_3,
+ LPC24XX_PIN_TERMINAL
+ };
+
+ lpc24xx_module_enable(LPC24XX_MODULE_ETHERNET, LPC24XX_MODULE_PCLK_DEFAULT);
+ lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
+
+ #ifdef LPC24XX_PIN_ETHERNET_POWER_DOWN
+ {
+ unsigned pin = lpc24xx_pin_get_first_index(&pins[0]);
+
+ lpc24xx_gpio_config(pin, LPC24XX_GPIO_OUTPUT);
+ lpc24xx_gpio_set(pin);
+ }
+ #endif
+ }
+#else
+ static void lpc_eth_config_module_enable(void)
+ {
+ static const lpc24xx_pin_range pins [] = {
+ LPC24XX_PIN_ETHERNET_MII,
+ LPC24XX_PIN_TERMINAL
+ };
+
+ lpc24xx_module_enable(LPC24XX_MODULE_ETHERNET, LPC24XX_MODULE_PCLK_DEFAULT);
+ lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
+ }
+#endif
+
+static void lpc_eth_config_module_disable(void)
+{
+ lpc24xx_module_disable(LPC24XX_MODULE_ETHERNET);
+}
+
+static char *lpc_eth_config_alloc_table_area(size_t size)
+{
+ if (size < LPC24XX_ETH_RAM_SIZE) {
+ return (char *) LPC24XX_ETH_RAM_BEGIN;
+ } else {
+ return NULL;
+ }
+}
+
+static void lpc_eth_config_free_table_area(char *table_area)
+{
+ /* Do nothing */
+}
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_LPC24XX_LPC_ETHERNET_CONFIG_H */
diff --git a/include/arm/lpc17xx_ea_ram/bsp/system-clocks.h b/include/arm/lpc17xx_ea_ram/bsp/system-clocks.h
new file mode 100644
index 0000000000..564d12ec10
--- /dev/null
+++ b/include/arm/lpc17xx_ea_ram/bsp/system-clocks.h
@@ -0,0 +1,89 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx_clocks
+ *
+ * @brief System clocks.
+ */
+
+/*
+ * Copyright (c) 2008, 2009
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_LPC24XX_SYSTEM_CLOCKS_H
+#define LIBBSP_ARM_LPC24XX_SYSTEM_CLOCKS_H
+
+#include <bsp/lpc24xx.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * @defgroup lpc24xx_clock System Clocks
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief System clocks.
+ *
+ * @{
+ */
+
+/**
+ * @brief Initializes the standard timer.
+ *
+ * This function uses Timer 1.
+ */
+void lpc24xx_timer_initialize(void);
+
+/**
+ * @brief Returns current standard timer value in CPU clocks.
+ *
+ * This function uses Timer 1.
+ */
+static inline unsigned lpc24xx_timer(void)
+{
+ return T1TC;
+}
+
+/**
+ * @brief Delay for @a us micro seconds.
+ *
+ * This function uses the standard timer and assumes that the CPU frequency is
+ * in whole MHz numbers. The delay value @a us will be converted to CPU ticks
+ * and there is no protection against integer overflows.
+ *
+ * This function uses Timer 1.
+ */
+void lpc24xx_micro_seconds_delay(unsigned us);
+
+/**
+ * @brief Returns the PLL output clock frequency in [Hz].
+ *
+ * Returns zero in case of an unexpected PLL input frequency.
+ */
+unsigned lpc24xx_pllclk(void);
+
+/**
+ * @brief Returns the CPU clock frequency in [Hz].
+ *
+ * Returns zero in case of an unexpected PLL input frequency.
+ */
+unsigned lpc24xx_cclk(void);
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_LPC24XX_SYSTEM_CLOCKS_H */
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-18 20:05:35 +0000