summaryrefslogtreecommitdiff
path: root/include/arm/altcycv_devkit/bsp.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/arm/altcycv_devkit/bsp.h')
-rw-r--r--include/arm/altcycv_devkit/bsp.h67
1 files changed, 67 insertions, 0 deletions
diff --git a/include/arm/altcycv_devkit/bsp.h b/include/arm/altcycv_devkit/bsp.h
new file mode 100644
index 0000000000..833a63c9c0
--- /dev/null
+++ b/include/arm/altcycv_devkit/bsp.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Dornierstr. 4
+ * 82178 Puchheim
+ * Germany
+ * <info@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H
+#define LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H
+
+#include <bspopts.h>
+
+#define BSP_FEATURE_IRQ_EXTENSION
+
+#ifndef ASM
+
+#include <rtems.h>
+#include <rtems/console.h>
+#include <rtems/clockdrv.h>
+
+#include <bsp/default-initial-extension.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define BSP_ARM_A9MPCORE_SCU_BASE 0xFFFEC000
+
+#define BSP_ARM_GIC_CPUIF_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00000100 )
+
+#define BSP_ARM_A9MPCORE_GT_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00000200 )
+
+#define BSP_ARM_GIC_DIST_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00001000 )
+
+#define BSP_ARM_L2C_310_BASE 0xfffef000
+
+#define BSP_ARM_L2C_310_ID 0x410000c9
+
+/* Forward declaration */
+struct rtems_bsdnet_ifconfig;
+
+/** @brief Network interface attach detach
+ *
+ * Attaches a network interface tp the network stack.
+ * NOTE: Detaching is not supported!
+ */
+int altera_cyclone_v_network_if_attach_detach(
+ struct rtems_bsdnet_ifconfig *config,
+ int attaching );
+
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH altera_cyclone_v_network_if_attach_detach
+#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0"
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* ASM */
+
+#endif /* LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H */