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Diffstat (limited to 'include/arch/mm/cache_spec.h')
-rw-r--r-- | include/arch/mm/cache_spec.h | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/include/arch/mm/cache_spec.h b/include/arch/mm/cache_spec.h new file mode 100644 index 0000000000..1d9199db33 --- /dev/null +++ b/include/arch/mm/cache_spec.h @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2008 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc64_CACHE_SPEC_H_ +#define KERN_sparc64_CACHE_SPEC_H_ + +/* + * The following macros are valid for the following processors: + * + * UltraSPARC, UltraSPARC II, UltraSPARC IIi, UltraSPARC III, + * UltraSPARC III+, UltraSPARC IV, UltraSPARC IV+ + * + * Should we support other UltraSPARC processors, we need to make sure that + * the macros are defined correctly for them. + */ + +#if defined (US) +#define DCACHE_SIZE (16 * 1024) +#elif defined (US3) +#define DCACHE_SIZE (64 * 1024) +#endif +#define DCACHE_LINE_SIZE 32 + +#endif + +/** @} + */ |