diff options
author | Amar Takhar <amar@rtems.org> | 2015-06-09 12:26:48 -0400 |
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committer | Amar Takhar <amar@rtems.org> | 2015-12-11 15:16:15 -0500 |
commit | 020e20fe38a3c1e2199f378bccc00341e0a42156 (patch) | |
tree | 6089581a2bdbe044c87d38edf1d9e021025b4ee0 /py | |
parent | 677d8d9b2cea08fb326228140042b564a57ca241 (diff) |
Move rtems_waf/ to py/ This may be renamed in the future
* rtems_waf/config -> py/config (RTEMS Config)
* rtems_waf/ -> py/waf (Waf build)
Diffstat (limited to 'py')
39 files changed, 7868 insertions, 0 deletions
diff --git a/py/config/__init__.py b/py/config/__init__.py new file mode 100644 index 0000000000..c8c17ede02 --- /dev/null +++ b/py/config/__init__.py @@ -0,0 +1,11 @@ +from .base import BuildConfig, Config, Default, Feature, Disable +from .feature import * +from .options import * + +from rtems_waf import defaults + +#XXX: Fix +# Test to make sure options are sane. +#for option in options_map: +# a = options_map[option]() + diff --git a/py/config/base.py b/py/config/base.py new file mode 100644 index 0000000000..cd8be72cda --- /dev/null +++ b/py/config/base.py @@ -0,0 +1,421 @@ +try: + from configparser import ConfigParser, NoOptionError +except ImportError: + from ConfigParser import ConfigParser, NoOptionError + +from os.path import exists +#from __init__ import options_map, Default, features_list, config_list +from rtems_waf.compat import add_metaclass #2to3 +from sys import version_info + +Default = None # Default value. +Disable = "-DISABLED-" # Disable this option +options_map = {} # Global options map. +features_list = [] # Global features list. +config_list = [] # Global config list. + + +def fatal(str): + print("FATAL: %s" % str) + exit(1) + + +class Value(object): + """Holds an option value internally. This acts in a similar fashion to a dictionary.""" + + def __init__(self): + self.__dict__["options"] = {} + + def __setattr__(self, key, value): + """Set a value, this either fetches the option or sets it if it already exists.""" + self._set_or_get(key, value) + + def __getitem__(self, key): + """Get an option from the internal table.""" + return self.options[key] + + def __getattr__(self, key): + """Allow an option to be fetched as an attribute.""" + return self.options[key] + + def _set_or_get(self, option, value): + """ + Set or get an option. + + :param option: Option name (string) + :param value: Value to set option + """ + + # Disabling an option removes it from the header completely irrespective of its type. + if type(value) == str and value == "-DISABLED-": + del self.options[option] + return + + if option not in self.options: + if option not in options_map: + fatal("Missing default option: %s" % option) + opt = options_map[option] # Get option class + i = opt(value) # Create option with value + self.options[i.name] = i # Set in dictionary + else: + i = self.options[option] + i.set(value) # Set value + + def __str__(self): + """String representation of a value object.""" + return "Value object at %s: %s" % (hex(id(self)), self.value) + + def __iter__(self): + """Allow iteration.""" + return iter(self.options) + + + +# Self register configs. +class ConfigMeta(type): + """Automatically register configs classes.""" + def __new__(cls, name, bases, dct): + new = type.__new__(cls, name, bases, dct) + if hasattr(new, "is_feature") and new.is_feature is True: # XXX: Find a better way to differentiate. + features_list.append(new) + elif hasattr(new, "name"): + config_list.append(new) + return new + +@add_metaclass(ConfigMeta) +class Config(object): + feature = () #: Feature list (XXX: Why is this required?) + feature_default = ("gcc", "debug") #: Default features. + + def __init__(self): + self.base = False #: Whether this is a base config or not. + self.option_header = Value() #: Internal header options + self.option_build = Value() #: Internal build options + + # Iterate over base classes in reverse order so the 'latest' + # defined option is taken. + for i in type(self).__mro__[::-1]: + if hasattr(i, "header"): + i.header(self, self.option_header) + if hasattr(i, "build"): + i.build(self, self.option_build) + + # Make sure features don't conflict with each other. + processed = [] + feature_obj = [x for x in features_list if x.name in self.feature] + for feature in feature_obj: + conflicts = set(processed) & set(feature.conflicts) + processed.append(feature.name) + if conflicts: + raise Exception("Feature %s conflicts with %s" % (feature.name, ", ".join(conflicts))) + feature(self) + + self.feature += self.feature_default # Features in this config + + + def header(self, c): + """ + Header config options. + + :param c: `self.option_header` + """ + pass + + + def build(self, c): + """ + Build config options. + + :param c: `self.build_header` + """ + pass + + # XXX: needs to merge both dictionaries and sort them. + def config_get(self): + """Get the config.cfg (.ini) format for this config.""" + str = "[%s]\n" % self.name + def add(d, str): + for o in sorted(d): + opt = d[o] + str += "%s" % opt.config_get() + str += "\n\n" + return str + + str = add(self.option_header, str) + str = add(self.option_build, str) + return str + + + + +class Feature(Config): + """Build feature base class""" + name = None #: Name of feature + description = None #: Description + exclude = None #: BSPs to exclude + include = None #: BSPs to include + conflicts = None #: Other features this one conflicts with + is_feature = True #: Whether this is a feature or not + + def __init__(self, parent): + self.build(parent.option_build) + self.header(parent.option_header) + + def __str__(self): + return "%s (%s)" % (self, self.name) + + + +class cfg_general(Config): + """[general] block for `config.cfg.`""" + name = "general" + def build(self, c): + c.BSP = Default + c.PREFIX = Default + c.PATH_TOOLS = Default + c.ENABLE_DEBUG = Default + c.CFLAGS = Default + c.LIBS = Default + c.LDFLAGS = Default + + +class cfg_host(Config): + """[host] block for `config.cfg.`""" + name = "host" + def build(self, c): + c.CFLAGS = Default + c.LIBS = Default + c.LDFLAGS = Default + + +class cfg_bsp(Config): + """[bsp] block for `config.cfg` to hold BSP-specific settings""" + name = "bsp" + def build(self, c): + c.ENABLE_DEBUG = Default + c.ENABLE_MP = Default + c.ENABLE_MULTILIB = Default + c.ENABLE_NETWORKING = Default + c.ENABLE_NEWLIB = Default + c.ENABLE_POSIX = Default + c.ENABLE_PTHREADS = Default + c.ENABLE_SERDBG = Default + c.ENABLE_SHELL = Default + c.ENABLE_SMP = Default + c.LINK_START = Default + c.LINK_END = Default + c.LINK_LINK = Default + c.ENABLE_SYSTEM_DEP = Default + + + + +class BuildConfig(object): + """ + This class handles creating and loading `config.cfg`. + """ + file_config = "config.cfg" #: Default config file name. + + def __init__(self, list_bsp=[]): + self.cfg_default = [cfg_general(), cfg_host(), cfg_bsp()] #: Default BSP configuration. + self.cfg = list(self.cfg_default) #: BSP config. + self.list_bsp = [] + + if list_bsp: + self.list_bsp = sorted(list_bsp) + elif not exists(self.file_config): + fatal("Missing config.cfg") + else: + # Load on-disk config. + self.cfg_user = ConfigParser() + self.cfg_user.read(self.file_config) + + # Set BSP list. + # XXX: Far too complicated due to chicken-and-egg issue. + # This will be refactored in the future. + tmp = cfg_general() + opt = tmp.option_build["BSP"] + o = self.cfg_user.get("general", "BSP") + if version_info < (3,) and type(o) is unicode: #2to3 + o = str(o) + opt.set(o) + self.list_bsp = opt.value + + # Parse BSPs + self._parse_bsp(self.list_bsp) + + # Load user configuration + if not list_bsp: + self._cfg_user_load() + + # Make sure BSP= is always set. + self.option_set("general", "BSP", " " .join(self.list_bsp)) + + + def _parse_bsp(self, list_bsp): + """ + Parse BSP config. + + :param: list_bsp: List of BSPs in this config. + """ + + # Make this simplier + bsp_map = {} + for b in self.list_bsp: + bsp = [x for x in config_list if x.name == b][0] + bsp_arch = [x for x in config_list if x.name == bsp.arch][0] + bsp_map.setdefault((bsp_arch.name, bsp_arch), []).append(bsp) + + # Save for usage in config_set + self.bsp_map = bsp_map + + for bsp_name, bsp_arch in sorted(bsp_map): + self.cfg.append(bsp_arch()) + for bsp in bsp_map[(bsp_name, bsp_arch)]: + self.cfg.append(bsp()) + + + def save(self): + """Save config to disk.""" + with open(self.file_config, "w") as fp: + fp.write(self._cfg_get()) + fp.write("\n\n") # Handy. + + + def config_set(self, ctx, cfg_name, arch_name=None): + """ + Apply config internally to waf. + + :param ctx: waf Context. + :param cfg_name: BSP config name (arch/bsp format). + :param arch_name: Architecture name. + """ + cfg = None + if arch_name: +# self.config_set(ctx, arch_name) + cfg_name = "%s/%s" % (arch_name, cfg_name) + + for c in self.cfg: + if c.name == cfg_name: + cfg = c + break + + if not cfg: + fatal("BuildConfig:config_set(): Invalid config: %s" % cfg_name) + + for option in cfg.option_build: + opt = cfg.option_build[option] +# self._set_cfg_user(cfg_name, opt) + opt.set_config_build(ctx) + + for option in cfg.option_header: + opt = cfg.option_header[option] +# self._set_cfg_user(cfg_name, opt) + opt.set_config_header(ctx) + + + def bsp_get_detail(self, arch, bsp): + cfg = None + + for c in config_list: + if c.name == "%s/%s" % (arch, bsp): + cfg = c + break + + if cfg is None: + return "MISSING" # XXX: Throw an exception if this is missing? + + return "." + + + def option_set(self, cfg, option, value): + """ + Set an option within a config + + :param cfg: Config to set. + :param option: Option name. + :param value: Value to set. + """ + for config in self.cfg_default: + if config.name == cfg: + # Only allow build options to be set for now. + for o in config.option_build: + opt = config.option_build[o] + if opt.name == option: + opt.set(value) + + def _cfg_get(self): + """Get config text.""" + cfg = "" + for bsp in self.cfg: + cfg += "\n\n" + cfg += bsp.config_get() + return cfg.strip() + + + #XXX: unused + def _cfg_add(self, str): + self.cfg += "\n" + self.cfg += str + + + def _cfg_user_load(self): + """Load user config from disk.""" + for cfg_bsp in self.cfg: + section = cfg_bsp.name + + if not self.cfg_user.has_section(section): + fatal("Missing section: [%s]" % section) + + for option in cfg_bsp.option_build: + opt = cfg_bsp.option_build[option] + + if not self.cfg_user.has_option(section, opt.name): + fatal("Missing Option in config: %s" % opt.name) + + o = self.cfg_user.get(section, opt.name) + + # configpaser does not convert values anymore. + if o in ["True", "False"]: + o = self.cfg_user.getboolean(section, opt.name) + + # We do not support unicode internally + if version_info < (3,) and type(o) is unicode: #2to3 + o = str(o) + + self._set_cfg_user(section, opt) + +# opt.set(o) + + for option in cfg_bsp.option_header: + opt = cfg_bsp.option_header[option] + self._set_cfg_user(section, opt) +# o = self.cfg_user.get(section, opt.name) +# opt.set(o) + + + def _set_cfg_user(self, section, opt): + if not self.cfg_user.has_section(section): + fatal("Missing section: [%s]" % section) + + o = self.cfg_user.get(section, opt.name) + + # configpaser does not convert values anymore. + if o in ["True", "False"]: + o = self.cfg_user.getboolean(section, opt.name) + + # We do not support unicode internally + if version_info < (3,) and type(o) is unicode: #2to3 + o = str(o) + + opt.set(o) + + + + + + +# This needs to be here to avoid recursive deps, it's more convenient to +# have the features in a seperate file. +#import feature +#import rtems_waf.defaults.bsp diff --git a/py/config/feature.py b/py/config/feature.py new file mode 100644 index 0000000000..58f19dea17 --- /dev/null +++ b/py/config/feature.py @@ -0,0 +1,30 @@ +from .__init__ import Feature + +class FeatureGCC(Feature): + """GCC Compiler.""" + name = "gcc" + description = "GCC Compiler" + conflicts = ("clang",) + + def build(self, c): + c.USE_GCC = True + + +class FeatureClang(Feature): + """Clang Compiler.""" + name = "clang" + description = "Clang Compiler" + conflicts = ("gcc",) + + def build(self, c): + c.USE_CLANG = True + + +class FeatureDebug(Feature): + """Debug Options""" + name = "debug" + description = "Enable debug options" + + def build(self, c): + c.ENABLE_DEBUG = True + diff --git a/py/config/options.py b/py/config/options.py new file mode 100644 index 0000000000..a4724c77d3 --- /dev/null +++ b/py/config/options.py @@ -0,0 +1,297 @@ +from textwrap import TextWrapper +from .base import options_map +from rtems_waf.compat import add_metaclass # 2to3 + +wrapper = TextWrapper() +wrapper.width = 75 +wrapper.initial_indent = "# " +wrapper.subsequent_indent = "# " + + +tag_map = { + "general": "General settings", + "build": "Build options", + "network": "Network option", + "storage": "Storage option" +} + +class OptionMeta(type): + """Self register options.""" + skip = ("Option", "Boolean", "String", "StringList", "Integer") + def __new__(cls, name, bases, dct): + new = type.__new__(cls, name, bases, dct) + if name not in cls.skip: + if name in options_map: + raise Exception("Duplicate option: %s" % name) + options_map[name] = new + return new + +@add_metaclass(OptionMeta) +class Option(object): + """ + Base class for all Options + + .. py:attribute:: undef=True + + Whether to undefine the option in the header file when "disabled". + + .. py:attribute:: limit=None + + List or min,max to restrict the option to. Depends on option type. + + .. py:attribute:: quote=False + + Whether to quote the value in the header. + + .. py:attribute:: tag=list + + List of tags for this option. At least one is required. + """ + + def __init__(self, value=None): + self.name = self.__class__.__name__ + + + # Do not set a default if no_default set. + if not hasattr(self, "no_default"): + self.no_default = True + + # Whether to quote the value + if not hasattr(self, "quote"): + self.quote = False + + # Tag sanity check. + if not hasattr(self, "tag") or not self.tag: + self._fatal("At least one tag is required") + elif type(self.tag) is not list: + self._fatal("%s.tag: must be a list().") + elif not set(self.tag).issubset(tag_map): + missing = [x for x in self.tag if x not in tag_map] + self._fatal("Tag(s) %s do not exist." % missing) + else: + duplicates = set([x for x in self.tag if self.tag.count(x) > 1]) + if duplicates: + self._fatal("duplicate tags: %s" % ", ".join(duplicates)) + + + # Value limit + if not hasattr(self, "limit"): + self.limit = None + + if value is not None: + self.validate(value) + self.value = value + elif self.no_default and not hasattr(self, "value"): + raise Exception("no_default is set you must supply a value in bsp config") + else: + self.validate(self.value) + + def __add__(self, value): + """ + Hack around only a _set. Need a _convert and _set in each type of option. + + :rtype: Depends on subclass + :return: Two options added together + """ + current = self.value + self._set(value) + optsum = self.value + self.value = current + return current + optsum + + + def validate(self, value): + """Validate option.""" + self._fatal("Must be set in subclass.") + + + def set(self, value): + """Set option value""" + if value is None: +# self.value = self.default #XXX: why is this here, a artifact? + return + + self._set(value) + + + def _fatal(self, str): + """Fatal error""" + raise Exception("(%s)%s: %s" % (self.__class__.__bases__[0].__name__, self.__class__.__name__, str)) + + + def config_get(self): + """ + Get string suitable for config.cfg + + :rtype: string + :return: Pre-formatted Windows `.ini` block. + """ + + opt = [] + opt += wrapper.wrap(self.descr.strip()) + opt += ["%s = %s" % (self.__class__.__name__, self._str_value())] + return "\n".join(opt) + + + def _str_value(self): + """ + Get option as a string. + + :rtype: string + :return: Option value as a string. + """ + raise Exception("Needs to be implmented in subclass.") + + + def set_config_header(self, ctx): + """ + 1. If value is an integer always define it beacuse it could be 0. + 2. If value is empty "" or boolean=False undefine it + 3. if self.undef == True (undefine if false) undefine it. + + :param ctx: waf context + """ + if type(self.value) is not int and not self.value and self.undef: + ctx.undefine(self.name) + return + self._set_config_header(ctx) + + + def set_config_build(self, ctx): + """ + Set option inside waf as part of the build. + + :param ctx: waf context + """ + if type(self.value) is list: + ctx.env.append_value(self.name, self.value) + else: + setattr(ctx.env, self.name, self.value) + + + +class Boolean(Option): + """Boolean option value.""" + + def validate(self, value): + """Validate as one of: 1, 0, true, false""" + + if type(value) is not bool: + self._fatal("Not a boolean value (True|False): %s" % type(value)) + + def _str_value(self): + return str(self.value) + + # XXX: This is wrong (works for now!) + def _set(self, value): + + if type(value) is str: + if value.lower() == "true": + value = True + elif value.lower() == "false": + value = False + else: + self._fatal("Internal error in Boolean._set()") + + self.validate(value) + self.value = value + + def _set_config_header(self, ctx): + """Set value in config header.""" + + if self.undef: + ctx.define_cond(self.name, 1 if self.value else 0) + else: + ctx.define(self.name, 0) + + + + +class String(Option): + def validate(self, value): + """Verify value is a string and is in `limit` if defined.""" + if type(value) is not str: + self._fatal("Not a string: %s (%s)" % (value, type(value))) + + if self.limit: + if type(limit) is not list: + self._fatal("Only lists are supported as a limiter for strings.") + + if value not in limit: + self._fatal("%s not in list of accepted values: %s" % (value, limit)) + + def _str_value(self): + return self.value + + def _set(self, value): + """Set string, strips bounding whitespace.""" + self.validate(value) + self.value = value.strip() + + def _set_config_header(self, ctx): + """Define in header.""" + ctx.define(self.name, self.value, quote=self.quote) + + +class StringList(Option): + def validate(self, value): + """Validate list of strings""" + if type(value) is not list: + self._fatal("Not a list: %s (%s)" % (value, type(value))) + + for v in value: + if type(v) is not str: + self._fatal("Value %s is not a String." % v) + +#XXX: Needs to be fixed. +# if self.limit: +# if type(limit) is not list: +# self._fatal("Only lists are supported as a limiter for strings.") + +# if value not in limit: +# self._fatal("%s not in list of accepted values: %s" % (value, limit)) + + def _str_value(self): + return " ".join(self.value) + + def _set(self, value): + """Make sure value is a list otherwise split into one delimited by whitespace.""" + + if type(value) is not list: + value = value.split(" ") + value = [x for x in value if x] + + self.validate(value) + self.value = value + + def _set_config_header(self, ctx): + ctx.define(self.name, self.value, quote=self.quote) + + + +class Integer(Option): + def validate(self, value): + """Verify value is an int and in limit if defined.""" + if type(value) is not int: + self._fatal("Not an integer: %s (%s)" % (value, type(value))) + + if self.limit: + if type(limit) is list: + if value not in limit: + self._fatal("%s not in list of accepted values: %s" % (value, limit)) + + if type(limit) is tuple: + min, max = limit + if value < min or value > max: + self._fatal("%s is outside min/max: %s/%s" % (value, min, max)) + + def _str_value(self): + return str(self.value) + + def _set(self, value): + value = int(value) #XXX: configparser doesn't convert this anymore, sigh. + self.validate(value) + self.value = value + + def _set_config_header(self, ctx): + ctx.define(self.name, self.value, quote=self.quote) diff --git a/py/waf/.gitignore b/py/waf/.gitignore new file mode 100644 index 0000000000..0d20b6487c --- /dev/null +++ b/py/waf/.gitignore @@ -0,0 +1 @@ +*.pyc diff --git a/py/waf/TODO b/py/waf/TODO new file mode 100644 index 0000000000..372f819aa2 --- /dev/null +++ b/py/waf/TODO @@ -0,0 +1,72 @@ +Before Release +~~~~~~~~~~~~~~ + * Add a c.MCFLAGS which seperates machine flags -mXXX and -fXXX into + MCFLAGS and the rest into CFLAGS so machine code can be built + (eg, bootloader). RTEMS build would merge both, rtems-config will offer + them seperately if requested. + + +Configure +~~~~~~~~~ + * SIZEOF_MODE_T, SIZEOF_VOID_P, BLKSIZE_T... need to be dynamically + calculated in rtems_waf/configure.py + * Better warnings if an option or section is missing in config.cfg after + updating when a new option has been added and 'waf config' has not been + run. + + +General +~~~~~ + * Documentation + * Install mode (It can be used in-place w/out installing using rtems-config) + * Distribution (creating a tarball) + * Test runner + * Create a system to force options on/off/unavailable/make them required in a bsp-specific way + * Board targets so you can do waf config --board <name> and have it setup everything + + + +Optimisations +~~~~~~~~~~~~~ + * Usage of ctx.srcnode.abspath() and others should result in one call, eg. + srcnode = ctx.srcnode.abspath() at the top then "%s" % srcnode. + * No BSP should take longer than 30s to build with maximum tests enabled. + * Profile waf when the build is running + + + +Options +~~~~~~~ + * LDFLAGS is LINKERFLAGS, make sure this is changed everywhere. + CCJ - not sure which direction to make the change so made it + LINKFLAGS -> LDFLAGS. + * LIBS may be the wrong variable name to use it is not waf-eqsue. + * Changed the default for the i386/pc586 bsp adding BSP_PRESS_KEY_FOR_RESET. + Did the config, configure, build and build tests and the setting + was not picked up. Changed the default networking setting and waf + rebuilt lots of files and then the bsp reset worked. + * Classes allow duplicate options -- this needs to throw an error to avoid + typos in the case two similar options, eg INTERFACE_TX, INTERFACE_RX. + +Future +~~~~~~ + * Support for building multiple branches at once + - Make previous branches use versioned build directories build-5.1, build-5.2 + + +Includes +~~~~~~~~ + * cache_.h + * Look at c/wscript_arm -> arm/realview_pbx_a9_qemu. + Other BSPs need to be fixed for cache_manager.c and console*, other bsps have been + hacked to include src_include_libcpu and src_include_bsp for all files this is wrong. + + +Enhancements +~~~~~~~~~~~~ + * Seperate logic to convert from string to internal python values in config/options.py + + +Config +~~~~~~ + * --path-tools= cannot be relative otherwise GCC cannot find its header files it must be absolute. diff --git a/py/waf/__init__.py b/py/waf/__init__.py new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/py/waf/__init__.py diff --git a/py/waf/bsp.py b/py/waf/bsp.py new file mode 100644 index 0000000000..2a32a6b01a --- /dev/null +++ b/py/waf/bsp.py @@ -0,0 +1,319 @@ + +list_bsp = { + "arm": [ + "altcycv_devkit", + "altcycv_devkit_smp", + "arm1136jfs", + "arm1136js", + "arm7tdmi", + "arm920", + "armcortexa9", + "bbxm", + "beagleboardorig", + "beagleboardxm", + "beagleboneblack", + "beaglebonewhite", + "csb336", + "csb337", + "csb637", + "edb7312", + "gba", + "gp32", + "gumstix", + "kit637_v6", + "lm3s3749", + "lm3s6965", + "lm3s6965_qemu", + "lm4f120", + "lpc1768_mbed", + "lpc1768_mbed_ahb_ram", + "lpc1768_mbed_ahb_ram_eth", + "lpc17xx_ea_ram", + "lpc17xx_ea_rom_int", + "lpc17xx_plx800_ram", + "lpc17xx_plx800_rom_int", + "lpc2362", + "lpc23xx_tli800", + "lpc24xx_ea", + "lpc24xx_ncs_ram", + "lpc24xx_ncs_rom_ext", + "lpc24xx_ncs_rom_int", + "lpc24xx_plx800_ram", + "lpc24xx_plx800_rom_int", + "lpc32xx_mzx", + "lpc32xx_mzx_stage_1", + "lpc32xx_mzx_stage_2", + "lpc32xx_phycore", + "lpc40xx_ea_ram", + "lpc40xx_ea_rom_int", + "nds", + "raspberrypi", + "realview_pbx_a9_qemu", + "realview_pbx_a9_qemu_smp", + "rtl22xx", + "rtl22xx_t", + "smdk2410", + "stm32f105rc", + "stm32f4", + "tms570ls3137_hdk", + "tms570ls3137_hdk_intram", + "tms570ls3137_hdk_sdram", + "xilinx_zynq_a9_qemu", + "xilinx_zynq_zc702", + "xilinx_zynq_zc706", + "xilinx_zynq_zedboard", + ], + + "avr": [ + "avrtest", + ], + + "bfin": [ + "bf537stamp", + "ezkit533", + "tll6527m", + ], + + "h8300": [ + "h8sim", + "h8sxsim", + ], + + "i386": [ + "pc386", + "pc486", + "pc586", + "pc586-sse", + "pc686", + "pcp4", + ], + + "lm32": [ + "lm32_evr", + "milkymist", + ], + + "m32c": [ + "m32csim", + ], + + "m32r": [ + "m32rsim", + ], + + "m68k": [ + "av5282", + "cobra5475", + "csb360", + "gen68302", + "gen68340", + "gen68360", + "gen68360_040", + "idp", + "m5484fireengine", + "mcf5206elite", + "mcf52235", + "mcf5225x", + "mcf5235", + "mcf5329", + "mrm332", + "mvme136", + "mvme147", + "mvme147s", + "mvme162", + "mvme162lx", + "mvme167", + "ods68302", + "pgh360", + "sim68000", + "simcpu32", + "uc5282", + ], + + "mips": [ + "csb350", + "genmongoosev", + "hurricane", + "jmr3904", + "malta", + "rbtx4925", + "rbtx4938", + ], + + "moxie": [ + "moxiesim", + ], + + "nios2": [ + "nios2_iss", + ], + + "or1k": [ + "or1ksim", + "sim", + ], + + "powerpc": [ + "beatnik", + "br_uid", + "brs5l", + "brs6l", + "dp2", + "ep1a", + "gwlcfm", + "haleakala", + "hsc_cm01", + "icecube", + "mbx821_001", + "mbx821_002", + "mbx821_002b", + "mbx860_001b", + "mbx860_002", + "mbx860_005b", + "mbx860_1b", + "mcp750", + "mpc5566evb", + "mpc5566evb_spe", + "mpc5643l_dpu", + "mpc5643l_evb", + "mpc5668g", + "mpc5674f_ecu508_app", + "mpc5674f_ecu508_boot", + "mpc5674f_rsm6", + "mpc5674fevb", + "mpc5674fevb_spe", + "mpc8260ads", + "mpc8309som", + "mpc8313erdb", + "mpc8349eamds", + "mtx603e", + "mvme2100", + "mvme2307", + "mvme3100", + "mvme5500", + "pghplus", + "phycore_mpc5554", + "pm520_cr825", + "pm520_ze30", + "psim", + "qemuppc", + "qemuprep", + "qemuprep-altivec", + "qoriq_core_0", + "qoriq_core_1", + "qoriq_p1020rdb", + "score603e", + "ss555", + "t32mppc", + "tqm8xx_stk8xx", + "virtex", + "virtex4", + "virtex5", + ], + + "sh": [ + "gensh1", + "gensh2", + "gensh4", + "simsh1", + "simsh2", + "simsh2e", + "simsh4", + ], + + "sparc": [ + "erc32", + "leon2", + "leon3", + "ngmp", + "sis", + ], + + "sparc64": [ + "niagara", + "usiii", + ], + + "v850": [ + "v850e1sim", + "v850e2sim", + "v850e2v3sim", + "v850esim", + "v850essim", + "v850sim", + ] +} + + + +""" +list_bsp = { + "arm": [ + "lm3s3749", + "lm3s6965", + "lm3s6965_qemu", + "lpc17xx_ea_ram", + "lpc17xx_ea_rom_int", + "lpc17xx_plx800_ram", + "lpc17xx_plx800_rom_int", + "lpc24xx_plx800_ram", + "lpc24xx_plx800_rom_int", + "raspberrypi", + "realview_pbx_a9_qemu", + "stm32f4", + "xilinx_zynq_a9_qemu", + ], + + "i386": [ + "pcp4", + ], + + "mips": [ + "malta", + ], + + "moxie": [ + "moxiesim", + ], + + "nios2": [ + "nios2_iss", + ], + + "powerpc": [ + "br_uid", + "brs6l", + "mpc5566evb_spe", + "mpc5643l_dpu", + "mpc5643l_evb", + "mpc5674f_ecu508_app", + "mpc5674f_ecu508_boot", + "mpc5674f_rsm6", + "mpc5674fevb", + "mpc5674fevb_spe", + "mpc8309som", + "phycore_mpc5554", + "qemuprep", + "qemuprep-altivec", + "qoriq_core_0", + "qoriq_core_1", + "qoriq_p1020rdb", + "t32mppc", + "virtex4", + "virtex5", + ], + + "v850": [ + "v850e1sim", + "v850e2sim", + "v850e2v3sim", + "v850esim", + "v850essim", + "v850sim", + ] +} +""" + +#for arch in sorted(list_bsp): +# for bsp in sorted(list_bsp[arch]): +# print "%s/%s" % (arch, bsp) diff --git a/py/waf/builder.py b/py/waf/builder.py new file mode 100644 index 0000000000..e1e944bf5c --- /dev/null +++ b/py/waf/builder.py @@ -0,0 +1,125 @@ +class rtems_base(object): + name = None + + def __init__(self, ctx): + self.ctx = ctx + + if ctx.env.ENABLE_PTHREADS and not ctx.env.ENABLE_POSIX: + raise ValueError("ENABLE_POSIX required for ENABLE_PTHREADS") + + self.ctx( + name = "auto_%s_objects" % self.name, + use = [] + ) + + + def _get_id(self, name): + name_id = "auto_%s" % name + + try: + counter = self.ctx.counter + except AttributeError: + counter = self.ctx.counter = {} + + if name_id not in counter: + counter[name_id] = 0 + return "%s_0" % name_id + else: + counter[name_id] += 1 + return "%s_%d" % (name_id, counter[name_id]) + + + def _obj_add(self, name, source, **kwarg): + + if "test" in kwarg: + if not kwarg["test"]: + return + + if "alias" in kwarg: + name = "%s_%s" % (name, kwarg["alias"]) + + id = self._get_id(name) + + self.ctx.rtems_obj( + id, + source, + **kwarg + ) + + #XXX: Is this OK? + for g in self.ctx.groups[0]: + if g.get_name() == "auto_%s_objects" % self.name: + g.use.append(id) + + def start(self, source, defines=[]): + from os.path import splitext, basename + + for s in source: + file = splitext(basename(s))[0] + self.ctx( + rule = '${CC} -DASM ${CFLAGS} ${CPPFLAGS} ${DEFINES_ST:DEFINES} ${CPPPATH_ST:INCPATHS} -c -o ${TGT} ${SRC}', + source = s, + target = "%s.o" % file, + name = "start_%s_o" % file, + features = "c casm bld_include src_include", + defines = defines, + ) + + def source(self, source, **kwarg): + self._obj_add(self.name, source, **kwarg) + + def debug(self, source, **kwarg): + if self.ctx.env.ENABLE_DEBUG: + self._obj_add("%s_debug" % self.name, source, **kwarg) + + def mp(self, source, **kwarg): + if self.ctx.env.ENABLE_MP: + self._obj_add("%s_mp" % self.name, source, **kwarg) + + def multilib(self, source, **kwarg): + if self.ctx.env.ENABLE_MULTILIB: + self._obj_add("%s_multilib" % self.name, source, **kwarg) + + def networking(self, source, **kwarg): + if self.ctx.env.ENABLE_NETWORKING: + self._obj_add("%s_networking" % self.name, source, **kwarg) + + def newlib(self, source, **kwarg): + if self.ctx.env.ENABLE_NEWLIB: + self._obj_add("%s_newlib" % self.name, source, **kwarg) + + def posix(self, source, **kwarg): + if self.ctx.env.ENABLE_POSIX: + self._obj_add("%s_posix" % self.name, source, **kwarg) + + def pthreads(self, source, **kwarg): + # pthreads requires POSIX + if self.ctx.env.ENABLE_PTHREADS and self.ctx.env.ENABLE_POSIX: + self._obj_add("%s_pthreads" % self.name, source, **kwarg) + + def rpc(self, source, **kwarg): + if self.ctx.env.ENABLE_RPC: + self._obj_add("%s_rpc" % self.name, source, **kwarg) + + def serdbg(self, source, **kwarg): + if self.ctx.env.ENABLE_SERDBG: + self._obj_add("%s_serdbg" % self.name, source, **kwarg) + + def shell(self, source, **kwarg): + if self.ctx.env.ENABLE_SHELL: + self._obj_add("%s_shell" % self.name, source, **kwarg) + + def smp(self, source, **kwarg): + if self.ctx.env.ENABLE_SMP: + self._obj_add("%s_smp" % self.name, source, **kwarg) + + +class libcpu(rtems_base): + name = "libcpu" + +class libbsp(rtems_base): + name = "libbsp" + + def fpsp(self, source, **kwarg): + if self.ctx.env.ENABLE_FPSP: + self._obj_add("%s_fpsp" % self.name, source, **kwarg) diff --git a/py/waf/compat.py b/py/waf/compat.py new file mode 100644 index 0000000000..5c58f9b9bb --- /dev/null +++ b/py/waf/compat.py @@ -0,0 +1,20 @@ +# Compat code for python 2<->3. + + +# Borrowed from the Six package: https://pypi.python.org/pypi/six +# Copyright (c) 2010-2015 Benjamin Peterson +def add_metaclass(metaclass): + """Class decorator for creating a class with a metaclass.""" + def wrapper(cls): + orig_vars = cls.__dict__.copy() + slots = orig_vars.get('__slots__') + if slots is not None: + if isinstance(slots, str): + slots = [slots] + for slots_var in slots: + orig_vars.pop(slots_var) + orig_vars.pop('__dict__', None) + orig_vars.pop('__weakref__', None) + return metaclass(cls.__name__, cls.__bases__, orig_vars) + return wrapper + diff --git a/py/waf/configure.py b/py/waf/configure.py new file mode 100644 index 0000000000..3f00c4e0f3 --- /dev/null +++ b/py/waf/configure.py @@ -0,0 +1,437 @@ +from waflib.Logs import pprint +pprint.__doc__ = None # Make sure waf doesn't see this as a command. +from waflib.Utils import subprocess + +# TODO +# __attribute__((weak) will not work on a cross compile. +# __RTEMS_SIZEOF_VOID_P__ + + +# XXX: BSP hacks that need to be addressed / resolved. +def bsp_hack(ctx, bsp): + if bsp == "m68k/mvme167": + # PowerPC unfortunatly uses macros to define this instead of an integer. + # We need to choose one or the other. + ctx.define('CONSOLE_MINOR', 1) + ctx.define('PRINTK_MINOR', 1) + + # I have no idea why it was done this way. + if bsp.startswith("arm/xilinx_zynq_") and ctx.env.ENABLE_SMP: + ctx.env.ZYNQ_CPUS = 2 + + + +# general +def config_h(ctx): + # Are these even needed? + ctx.define_cond('ENABLE_DEBUG', ctx.env.ENABLE_DEBUG) + ctx.define_cond('ENABLE_MP', ctx.env.ENABLE_MP) + ctx.define_cond('ENABLE_MULTILIB', ctx.env.ENABLE_MULTILIB) + ctx.define_cond('ENABLE_NETWORKING', ctx.env.ENABLE_NETWORKING) + ctx.define_cond('ENABLE_NEWLIB', ctx.env.ENABLE_NEWLIB) + ctx.define_cond('ENABLE_POSIX', ctx.env.ENABLE_POSIX) + ctx.define_cond('ENABLE_PTHREADS', ctx.env.ENABLE_PTHREADS) + ctx.define_cond('ENABLE_SERDB', ctx.env.ENABLE_SERDB) + ctx.define_cond('ENABLE_SHELL', ctx.env.ENABLE_SHELL) + ctx.define_cond('ENABLE_SMP', ctx.env.ENABLE_SMP) + + header = ["sys/types.h", "sys/stat.h", "stdlib.h", "memory.h", "string.h", "strings.h", "inttypes.h", "stdint.h", "unistd.h", "getopt.h", "libgen.h"] + for file in header: + ctx.check(header_name=file, features='c cprogram', mandatory=False) + + ctx.check_inline() + ctx.check_cc(function_name='strerror', header_name="string.h", mandatory=True) + ctx.check_cc(function_name='strtol', header_name=["stdlib.h", "limits.h"], mandatory=True) + ctx.check_cc(function_name='basename', header_name="libgen.h", mandatory=True) + + +# cpukit/ +def config_h_libcpu(ctx): + # Mandated by POSIX, decls not present in some versions of newlib, + # some versions stubbed in newlib's rtems crt0 + files = ["seteuid", "geteuid", "setegid", "getegid", "setuid", "getuid", "setgid", "getgid", "setsid", "getsid", "setpgid", "getpgid", "setpgrp", "getpgrp"] + for f in files: + ctx.check_cc(function_name=f, header_name="unistd.h", mandatory=False) + + # Mandated by POSIX, decls not present in some versions of newlib + ctx.check_cc(function_name='flockfile', header_name="stdio.h", mandatory=False) + ctx.check_cc(function_name='funlockfile', header_name="stdio.h", mandatory=False) + ctx.check_cc(function_name='ftrylockfile', header_name="stdio.h", mandatory=False) + + # BSD-isms, used throughout the sources. + func = ["strsep", "strcasecmp", "snprintf", "strdup", "strndup", "strncasecmp", "bcopy", "bcmp", "isascii", "fileno", "strlcpy", "strlcat", "sbrk"] + + # Check for functions supplied by newlib >= 1.17.0 Newlib's posix/ directory + func += ["readdir_r", "isatty", "creat", "opendir", "closedir", "readdir", "rewinddir", "scandir", "seekdir", "sleep", "telldir", "usleep", "__assert", "execl", "execlp", "execle", "execv", "execvp", "execve", "regcomp", "regexec", "regerror", "regfree"] + + # Newlib's unix/ directory + func += ["ttyname", "getcwd"] + for f in func: + ctx.check_func(f, mandatory=False) + + header = ["tar.h", "errno.h", "sched.h", "sys/cdefs.h", "sys/queue.h", "stdint.h", "inttypes.h", "pthread.h"] + for file in header: + ctx.check(header_name=file, features='c cprogram') + + ctx.check(header_name="pthread.h", features='c cprogram') + ctx.check_cc(type_name='pthread_rwlock_t', header_name="pthread.h", mandatory=False) + ctx.check_cc(type_name='pthread_barrier_t', header_name="pthread.h", mandatory=False) + ctx.check_cc(type_name='pthread_spinlock_t', header_name="pthread.h", mandatory=False) + # pthread-functions not declared in some versions of newlib. + ctx.check_cc(function_name='pthread_attr_getguardsize', header_name="pthread.h", mandatory=False) + ctx.check_cc(function_name='pthread_attr_setguardsize', header_name="pthread.h", mandatory=False) + ctx.check_cc(function_name='pthread_attr_setstack', header_name="pthread.h", mandatory=False) + ctx.check_cc(function_name='pthread_attr_getstack', header_name="pthread.h", mandatory=False) + + ctx.check(header_name="signal.h", features='c cprogram') + ctx.check_cc(type_name='sighandler_t', header_name="signal.h", mandatory=False) + + # FIXME: Mandatory in SUSv4, optional in SUSv3. + # Not implemented in GCC/newlib, so far. + ctx.check_define("WORD_BIT", "limits.h") + ctx.check_define("LONG_BIT", "limits.h") + +# ctx.check_define("CLOCK_PROCESS_CPUTIME_ID", "time.h") +# ctx.check_define("CLOCK_THREAD_CPUTIME_ID", "time.h") + + types = [ + "uint8_t", "int8_t", + "uint16_t", "int16_t", + "uint32_t", "int32_t", + "uint64_t", "int64_t", + "uintmax_t", "intmax_t", + "uintptr_t", "intptr_t" + ] + for type in types: + ctx.check_cc(type_name=type, header_name="stdint.h", mandatory=False) + +# ctx.check_size("mode_t") +# ctx.define_cond('HAVE_MD5', True) # XXX: hack for cpukit/mghttpd/mongoose.c + ctx.define('SIZEOF_MODE_T', 4) # XXX: This is a hack for cpukit/libfs/src/nfsclient/src/dirutils.c + ctx.define('SIZEOF_VOID_P', 4) + ctx.define('SIZEOF_OFF_T', 8) + ctx.define('SIZEOF_TIME_T', 4) # XXX: hack for cpukit/libmisc/uuid/gen_uuid.c + ctx.define('SIZEOF_BLKSIZE_T', 4) # XXX: hack for tests +# ctx.check_size("off_t") +# ctx.check_size("void *", define_name="SIZEOF_VOID_P") + + ctx.define('__RTEMS_HAVE_DECL_SIGALTSTACK__', 1) + + +def version_header_info(ctx, config): + ctx.define('__RTEMS_MAJOR__', config["rtems_version_major"]) + ctx.define('__RTEMS_MINOR__', config["rtems_version_minor"]) + ctx.define('__RTEMS_REVISION__', config["rtems_version_revision"]) + ctx.define('RTEMS_VERSION', ctx.env.RTEMS_VERSION) + ctx.define('RTEMS_BSP', ctx.env.RTEMS_BSP) + + +# c/ +def config_h_libbsp(ctx): + ctx.define('__RTEMS_SIZEOF_VOID_P__', 4) + + +def cpuopts_h(ctx): + ctx.define_cond('__RTEMS_USE_TICKS_FOR_STATISTICS__', False) # disable nanosecond granularity for statistics + ctx.define_cond('__RTEMS_USE_TICKS_CPU_USAGE_STATISTICS__', False) # disable nanosecond granularity for cpu usage statistics + ctx.define_cond('__RTEMS_USE_TICKS_RATE_MONOTONIC_STATISTICS__', False) # disable nanosecond granularity for period statistics + ctx.define_cond('__RTEMS_DO_NOT_INLINE_THREAD_ENABLE_DISPATCH__', False) # disable inlining _Thread_Enable_dispatch (This improves both the size and coverage analysis.) + ctx.define_cond('__RTEMS_DO_NOT_INLINE_CORE_MUTEX_SEIZE__', False) # disable inlining _Thread_Enable_dispatch (This improves both the size and coverage analysis.) + ctx.define_cond('__RTEMS_DO_NOT_UNROLL_THREADQ_ENQUEUE_PRIORITY__', False) # disable inlining _Thread_queue_Enqueue_priority (This improves both the size and coverage analysis.) + ctx.define_cond('__RTEMS_STRICT_ORDER_MUTEX__', False) # disable strict order mutex (This gives the same behavior as 4.8 and older) + ctx.define_cond('__RTEMS_ADA__', False) # ada/gnat bindings are built-in (Deactivate ada bindings) + + ctx.define_cond('RTEMS_DEBUG', ctx.env.ENABLE_DEBUG) + ctx.define_cond('RTEMS_MULTIPROCESSING', ctx.env.ENABLE_MP) + ctx.define_cond('RTEMS_NETWORKING', ctx.env.ENABLE_NETWORKING) + ctx.define_cond('RTEMS_NEWLIB', ctx.env.ENABLE_NEWLIB) + ctx.define_cond('RTEMS_POSIX_API', ctx.env.ENABLE_POSIX) + ctx.define_cond('RTEMS_SMP', ctx.env.ENABLE_SMP) + + +def depend_version(ctx): + ctx.start_msg("Checking GCC version") + ctx.get_cc_version(ctx.env.CC, gcc=True) + ctx.end_msg(".".join(ctx.env.CC_VERSION)) + + ctx.start_msg("Checking Binutils version") + cmd = ctx.env.BIN_RTEMS_LD + ["-v"] + ctx.env.LD_VERSION = ctx.cmd_and_log(cmd, quiet=0).strip().split(" ")[-1] + ctx.end_msg(ctx.env.LD_VERSION) + + +def build_config(ctx): + ctx.start_msg("DEVEL: Collecting compiler configuration") + cmd = ctx.env.CC + ["-dM", "-E", "-"] + p = subprocess.Popen(cmd, stdin=subprocess.PIPE, stdout=subprocess.PIPE, stderr=subprocess.PIPE, env=None) + p.stdin.write("\n") + gcc_config, stderr = p.communicate() + ctx.end_msg("Done") + + ctx.start_msg("DEVEL: Getting revision") + cmd = ["git", "log", "-1", "--format=%H"] + p = subprocess.Popen(cmd, stdin=subprocess.PIPE, stdout=subprocess.PIPE, stderr=subprocess.PIPE, env=None) + ctx.env.REVISION, stderr = p.communicate() + ctx.env.REVISION = ctx.env.REVISION.replace("\n", "") + ctx.end_msg(ctx.env.REVISION) + + with open("build/c4che/%s/%s_cache.py" % (ctx.env.RTEMS_ARCH, ctx.env.RTEMS_BSP), "r") as fp: + cache_data = fp.read() + + ctx.start_msg("DEVEL: Writing build information") + from json import JSONEncoder + from time import strftime + + data = JSONEncoder(sort_keys=True).encode({ + "time": int(strftime("%s")), # There is no better way to get seconds across lal platforms? + "revision": ctx.env.REVISION, + "bsp": ctx.env.RTEMS_BSP, + "architecture": ctx.env.RTEMS_ARCH, + "version": { + "gcc": ".".join(ctx.env.CC_VERSION), + "binutils": ctx.env.LD_VERSION + }, + "waf_cache": cache_data, + "gcc_config": gcc_config + }) + file = "build/c4che/%s/build_%s.json" % (ctx.env.RTEMS_ARCH, ctx.env.RTEMS_BSP) + with open(file, "w") as fp: + fp.write(data) + ctx.end_msg(file) + + +def cmd_configure(ctx, config): + ctx.load('waf', tooldir='rtems_waf') + + from rtems_waf.config import BuildConfig + cfg = BuildConfig() + + + # Misc funcs + def yesno(val): + return "Yes" if val else "No" + + def write_header(header): + ctx.start_msg("Writing configuration header:") + ctx.write_config_header(header) + ctx.end_msg(header, "PINK") + + def msg(str): + pprint("YELLOW", str) + + def msg_setting(name, val): + pprint("NORMAL", " %-30s: " % name, sep="") + pprint("YELLOW", val) + + + ###### + # HOST + ###### + + msg("") + msg("--- General Settings ---") + cfg.config_set(ctx, "general") + + ctx.env.RTEMS_VERSION = "%d.%d.%d" % (config["rtems_version_major"], config["rtems_version_minor"], config["rtems_version_revision"]) + ctx.env.RTEMS_VERSION_DATA = "%d.%d" % (config["rtems_version_major"], config["rtems_version_minor"]) + + ctx.env.LIBDIR = "%s/lib" % ctx.env.PREFIX + ctx.env.BINDIR = "%s/bin" % ctx.env.PREFIX + + + + msg("") + msg("--- Host Settings ---") + ctx.setenv('host', ctx.env.derive()) + ctx.load('compiler_c') + ctx.load('compiler_cxx') + + + if ctx.options.build_config: + ctx.start_msg('BUILD: Gathering build platform details.') + + # General + from socket import gethostname + from waflib.Utils import unversioned_sys_platform + import platform + + ctx.env.BUILD_HOSTNAME = gethostname() + ctx.env.BUILD_PLATFORM = unversioned_sys_platform() + ctx.env.BUILD_ARCHITECTURE = platform.architecture() + ctx.env.BUILD_MACHINE = platform.machine() + ctx.env.BUILD_PLATFORM = platform.platform() + ctx.env.BUILD_PYTHON_BUILD = platform.python_build() + ctx.env.BUILD_SYSTEM = platform.system() + + # Unix + ctx.env.BUILD_SIGNATURE = platform.uname() + + # Linux + #platform.libc_ver() + #platform.linux_distribution() + + # Windows + #platform.win32_ver() + + ctx.end_msg("Done") + + + ctx.check_library() + ctx.check_cc(function_name='strerror', header_name="string.h", mandatory=True) + ctx.check_cc(function_name='strtol', header_name=["stdlib.h", "limits.h"], mandatory=True) + ctx.check_cc(function_name='basename', header_name="libgen.h", mandatory=True) + + files = ["getopt.h", "libgen.h"] + for f in files: + ctx.check(header_name=f, features='c cprogram') + + # Locate python binary for rtems-config + ctx.find_program("python", var='BIN_PYTHON') + + # Debug + if ctx.options.build_json: + ctx.env.BUILD_JSON = True + + #XXX: TEMP! + if ctx.options.enable_tests: + ctx.env.ENABLE_TESTS = True + + cfg.config_set(ctx, "host") + write_header("host/include/config.h") + + # Set general BSP options + cfg.config_set(ctx, "bsp") + + # Set timetstamp of config.cfg to enforce re-running configure if it is changed. + from .tools import get_file_mtime + ctx.env.CONFIG_TIMESTAMP = get_file_mtime("config.cfg") + + # Always start with a pristeen env while looping. + env_orig = ctx.env + for bsp in ctx.env.BSP: + +# if ctx.env.ENABLE_SYSTEM_DEP: +# from waflib.Tools import c_preproc +# c_preproc.go_absolute=True + + msg("") + msg("--- Configuring %s ---" % bsp) + ctx.setenv(bsp, env_orig.derive()) + + (ctx.env.RTEMS_ARCH, ctx.env.RTEMS_BSP) = bsp.split("/") + + if ctx.env.ENABLE_PTHREADS and not ctx.env.ENABLE_POSIX: + ctx.fatal("Must be built with posix support (ENABLE_POSIX) when using pthreads (ENABLE_PTHREADS)") + + # XXX: Joel says this shouldn't be nessicary. + if ctx.env.ENABLE_MP and not ctx.env.ENABLE_POSIX: + ctx.fatal("Must be built with posix support (ENABLE_POSIX) when using MP (ENABLE_MP)") + + + # Miscellanous setup. + ctx.env.RTEMS_VERSION = "%d.%d.%d.%d" % (config["rtems_version_major"], config["rtems_version_minor"], config["rtems_version_revision"], config["rtems_version_patch"]) + ctx.env.RTEMS_VERSION_DATA = "%d.%d" % (config["rtems_version_major"], config["rtems_version_minor"]) + ctx.env.RTEMS_TOOL_VERSION = config["rtems_tool_version"] + ctx.env.append_value('CFLAGS', '-DHAVE_CONFIG_H') + ctx.env.append_value('CFLAGS', '-D__rtems_%s_%s__' % (ctx.env.RTEMS_ARCH, ctx.env.RTEMS_BSP.replace("-", "_"))) + ctx.env.LIBDIR = "%s/lib/rtems/%s/%s-%s/" % (ctx.env.PREFIX, ctx.env.RTEMS_VERSION_DATA, ctx.env.RTEMS_ARCH, ctx.env.RTEMS_BSP) + ctx.env.BINDIR = ctx.env.LIBDIR + +#XXX: Re-add after things are fixed. + # Enforce required values. +# required = ["LINKCMDS", "LINK_START", "LINK_END"] +# for value in required: +# if not ctx.env[value]: +# ctx.fatal("%s must be defined in [%s]" % (value, bsp)) + + #XXX: ARM hack + if ctx.env.RTEMS_ARCH == "arm": + ctx.env.LDFLAGS = ctx.env.CFLAGS + + + # Tools. + ctx.find_program('%s-rtems%s-ar' % (ctx.env.RTEMS_ARCH, ctx.env.RTEMS_TOOL_VERSION), var='BIN_RTEMS_AR', path_list=ctx.env.PATH_TOOLS) + ctx.find_program('%s-rtems%s-as' % (ctx.env.RTEMS_ARCH, ctx.env.RTEMS_TOOL_VERSION), var='BIN_RTEMS_AS', path_list=ctx.env.PATH_TOOLS) + ctx.find_program('%s-rtems%s-g++' % (ctx.env.RTEMS_ARCH, ctx.env.RTEMS_TOOL_VERSION), var='BIN_RTEMS_CPP', path_list=ctx.env.PATH_TOOLS, mandatory=False) + ctx.find_program('%s-rtems%s-gcc' % (ctx.env.RTEMS_ARCH, ctx.env.RTEMS_TOOL_VERSION), var='BIN_RTEMS_CC', path_list=ctx.env.PATH_TOOLS) + ctx.find_program('%s-rtems%s-ld' % (ctx.env.RTEMS_ARCH, ctx.env.RTEMS_TOOL_VERSION), var='BIN_RTEMS_LD', path_list=ctx.env.PATH_TOOLS) + ctx.find_program('%s-rtems%s-nm' % (ctx.env.RTEMS_ARCH, ctx.env.RTEMS_TOOL_VERSION), var='BIN_RTEMS_NM', path_list=ctx.env.PATH_TOOLS) + ctx.find_program('%s-rtems%s-ranlib' % (ctx.env.RTEMS_ARCH, ctx.env.RTEMS_TOOL_VERSION), var='BIN_RTEMS_RANLIB', path_list=ctx.env.PATH_TOOLS) + ctx.find_program('%s-rtems%s-strip' % (ctx.env.RTEMS_ARCH, ctx.env.RTEMS_TOOL_VERSION), var='BIN_RTEMS_STRIP', path_list=ctx.env.PATH_TOOLS) + ctx.env.AR = ctx.env.BIN_RTEMS_AR + ctx.env.AS = ctx.env.BIN_RTEMS_AS + ctx.env.CC = ctx.env.BIN_RTEMS_CC + ctx.env.CPP = ctx.env.BIN_RTEMS_CPP + ctx.env.RANLIB = ctx.env.BIN_RTEMS_RANLIB + ctx.env.STRIP = ctx.env.BIN_RTEMS_STRIP + ctx.env.LD = ctx.env.BIN_RTEMS_LD + ctx.env.LINK_CC = ctx.env.BIN_RTEMS_CC + ctx.env.LINK_CXX = ctx.env.BIN_RTEMS_CCP + + # Config (config.h) + config_h(ctx) + config_h_libcpu(ctx) + version_header_info(ctx, config) + cpuopts_h(ctx) #XXX: duplicate info. + write_header("%s/include/config.h" % bsp) + + # BSP options. + cfg.config_set(ctx, ctx.env.RTEMS_BSP, ctx.env.RTEMS_ARCH) + bsp_hack(ctx, bsp) + write_header("%s/include/bspopts.h" % ctx.variant) + config_h_libbsp(ctx) # Eventually there will be an option to exclude this and replace it with something custom. + + # CPU options. + cpuopts_h(ctx) + version_header_info(ctx, config) + write_header("%s/include/rtems/score/cpuopts.h" % bsp) + + ctx.start_msg('Generating GCC spec file') + from rtems_waf.tools import generate_gcc_spec_file + spec_file = generate_gcc_spec_file(ctx, devel=True) + ctx.end_msg(spec_file) + + + depend_version(ctx) + if ctx.options.build_config: + build_config(ctx) + + + msg("") + msg("--- Settings for %s ---" % bsp) + msg_setting("Enable Networking", yesno(ctx.env.ENABLE_NETWORKING)) + msg_setting("Enable Multiprocessing", yesno(ctx.env.ENABLE_MP)) + msg_setting("Enable Multilib", yesno(ctx.env.ENABLE_MULTILIB)) + msg_setting("Enable POSIX", yesno(ctx.env.ENABLE_POSIX)) + msg_setting("Enable SMP", yesno(ctx.env.ENABLE_SMP)) + msg_setting("Enable pthreads", "%s (Depends on POSIX)" % yesno(ctx.env.ENABLE_PTHREADS)) + msg("") + msg("Build Options") + msg_setting("CC", " ".join(ctx.env.CC)) + msg_setting("CFLAGS", " ".join(ctx.env.CFLAGS)) + msg_setting("LDFLAGS", " ".join(ctx.env.LDFLAGS)) + + + # Reset the env back to the original in order to print the proper settings below. + ctx.setenv("host", env_orig.derive()) + + msg("") + ctx.start_msg('Generating rtems-config') + from rtems_waf.tools import generate_rtems_config + generate_rtems_config(ctx, "rtems_waf/rtems_config.py", "rtems-config", devel=True) + ctx.end_msg("Done") + + + msg("") + msg("--- General Settings (applies to all) --- ") + msg_setting("Enabled BSPs", ", ".join(ctx.env.BSP)) + msg_setting("Install Prefix", ctx.env.PREFIX) + msg_setting("Tool Directory", ctx.env.PATH_TOOLS) + msg("") + msg("Build Options") + msg_setting("CFLAGS", " ".join(ctx.env.CFLAGS)) + msg_setting("LDFLAGS", " ".join(ctx.env.LDFLAGS)) + msg_setting("Enable Debug", yesno(ctx.env.ENABLE_DEBUG)) + + + diff --git a/py/waf/debug.py b/py/waf/debug.py new file mode 100644 index 0000000000..d0c2a02ce9 --- /dev/null +++ b/py/waf/debug.py @@ -0,0 +1,95 @@ +from hashlib import sha256 +from os.path import exists +from json import JSONEncoder +from time import time +import logging +from logging.handlers import MemoryHandler +from waflib.Task import Task +from waflib.Utils import subprocess, check_dir +from waflib.Logs import debug + +from os.path import dirname + +#from cStringIO import StringIO +#from waflib import Utils + +def logger_json_create(ctx): + logger = logging.getLogger('build.json') + logger.setLevel(logging.INFO) + + if ctx.variant == "host": + file = "%s/logs/host.json" % ctx.out_dir + else: + file = "%s/logs/%s.json" % (ctx.out_dir, ctx.variant) + + check_dir(dirname(file)) + filetarget = logging.FileHandler(file, mode="w") + memoryhandler = MemoryHandler(1048576, target=filetarget) + + logger.addHandler(memoryhandler) + + return logger + + +def hash_files(files): + h = [] + for file in files: + if exists(file): + fp = open(file, "r") + h.append((file, sha256(fp.read()).hexdigest())) + fp.close() + return h + + +def exec_command_json(self, cmd, **kw): +# subprocess = Utils.subprocess + kw['shell'] = isinstance(cmd, str) + + debug('runner_env: kw=%s' % kw) + + try: + record = {} + record["time"] = time() + record["command"] = cmd + recoard["variant"] = ctx.variant + + task_self = kw["json_task_self"] + record["type"] = task_self.__class__.__name__ + + del kw["json_task_self"] + + record["inputs"] = [x.srcpath() for x in task_self.inputs] + record["outputs"] = [x.srcpath() for x in task_self.outputs] + record["cflags"] = self.env.CFLAGS + record["cc"] = self.env.CC + + kw['stdout'] = kw['stderr'] = subprocess.PIPE + + time_start = time() + p = subprocess.Popen(cmd, **kw) + (stdout, stderr) = p.communicate() + record["time_duration"] = time() - time_start + + if stdout: + record["stdout"] = stdout + if stderr: + record["stderr"] = stderr + + record["hash"] = {} + record["hash"]["inputs"] = hash_files(record["inputs"]) + record["hash"]["outputs"] = hash_files(record["outputs"]) + + record["retval"] = p.returncode + data = JSONEncoder(sort_keys=False, indent=False).encode(record) + + self.logger_json.info(data) + + return p.returncode + + except OSError: + return -1 + + +def exec_command_json_extra(self, cmd, **kw): + kw["json_task_self"] = self + self.exec_command_real(cmd, **kw) diff --git a/py/waf/defaults/__init__.py b/py/waf/defaults/__init__.py new file mode 100644 index 0000000000..4bad4a5dbd --- /dev/null +++ b/py/waf/defaults/__init__.py @@ -0,0 +1,2 @@ +from .options import * +from .bsp import * diff --git a/py/waf/defaults/bsp/__init__.py b/py/waf/defaults/bsp/__init__.py new file mode 100644 index 0000000000..e71761df16 --- /dev/null +++ b/py/waf/defaults/bsp/__init__.py @@ -0,0 +1,17 @@ +from . import arm +from . import avr +from . import bfin +from . import h8300 +from . import i386 +from . import lm32 +from . import m32c +from . import m32r +from . import m68k +from . import mips +from . import moxie +from . import nios2 +from . import powerpc +from . import sh +from . import sparc +from . import sparc64 +from . import v850 diff --git a/py/waf/defaults/bsp/arm.py b/py/waf/defaults/bsp/arm.py new file mode 100644 index 0000000000..2f86cde4db --- /dev/null +++ b/py/waf/defaults/bsp/arm.py @@ -0,0 +1,720 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "arm" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o', '-e', '_start'] + c.LINK_END = ['crtend.o', 'crtn.o'] + + +class csb336(Base): + name = "arm/csb336" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm920', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/csb336/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class csb337_shared(Base): + def build(self, c): + c.CFLAGS = ['-mcpu=arm920', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/csb337/startup/linkcmds.csb337', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + c.ENABLE_LCD = Default + c.ENABLE_UMON = True + c.ENABLE_UMON_CONSOLE = True + + def header(self, c): + c.ENABLE_USART0 = True + c.ENABLE_USART1 = True + c.ENABLE_USART2 = True + c.ENABLE_USART3 = True + c.csb637 = Default + + + +class csb637(csb337_shared): + name = "arm/csb637" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm920', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/csb337/startup/linkcmds.csb637', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.csb637 = True + + + +class csb337(csb337_shared): + name = "arm/csb337" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm920', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/csb337/startup/linkcmds.csb337', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + + +class kit637_v6(csb337_shared): + name = "arm/kit637_v6" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm920', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/csb337/startup/linkcmds.csb337', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.csb637 = True + + + + +class lm3s_shared(Base): + def build(self, c): + c.CFLAGS = ['-march=armv7-m', '-mthumb'] + + def header(self, c): + c.BSP_SMALL_MEMORY = True + c.LM3S69XX_ENABLE_UART_0 = Default + c.LM3S69XX_ENABLE_UART_1 = Default + c.LM3S69XX_ENABLE_UART_2 = Default + c.LM3S69XX_HAS_UDMA = Default + c.LM3S69XX_MCU_LM3S3749 = Default + c.LM3S69XX_MCU_LM3S6965 = Default + c.LM3S69XX_SSI_CLOCK = Default + c.LM3S69XX_SYSTEM_CLOCK = Default + c.LM3S69XX_UART_BAUD = Default + c.LM3S69XX_USE_AHB_FOR_GPIO = Default + + +class lm3s3749(lm3s_shared): + name = "arm/lm3s3749" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lm3s69xx/startup/linkcmds.lm3s3749', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m', 'src/lib/libbsp/arm/shared/startup/linkcmds.base'] + + def header(self, c): + c.LM3S69XX_HAS_UDMA = True + c.LM3S69XX_XTAL_CONFIG = Default + c.LM3S69XX_MCU_LM3S3749 = True + c.LM3S69XX_NUM_GPIO_BLOCKS = 8 + c.LM3S69XX_NUM_SSI_BLOCKS = 2 + c.LM3S69XX_USE_AHB_FOR_GPIO = True + +class lm3s6965(lm3s_shared): + name = "arm/lm3s6965" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lm3s69xx/startup/linkcmds.lm3s6965', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m', 'src/lib/libbsp/arm/shared/startup/linkcmds.base'] + + def header(self, c): + c.LM3S69XX_XTAL_CONFIG = "0xE" + c.LM3S69XX_MCU_LM3S6965 = True + c.LM3S69XX_NUM_GPIO_BLOCKS = 7 + + +class lm3s6965_qemu(lm3s_shared): + name = "arm/lm3s6965_qemu" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lm3s69xx/startup/linkcmds.lm3s6965_qemu', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m', 'src/lib/libbsp/arm/shared/startup/linkcmds.base'] + + def header(self, c): + c.LM3S69XX_XTAL_CONFIG = "0xE" + c.LM3S69XX_MCU_LM3S6965 = True + c.LM3S69XX_NUM_GPIO_BLOCKS = 7 + + +class lpc17xx_shared(Base): + def build(self, c): + c.CFLAGS = ['-march=armv7-m', '-mthumb'] + + def header(self, c): + c.BSP_SMALL_MEMORY = Default + c.LPC24XX_CCLK = Default + c.LPC24XX_CONFIG_CONSOLE = Default + c.LPC24XX_CONFIG_I2C_2 = Default + c.LPC24XX_CONFIG_UART_1 = Default + c.LPC24XX_EMC_TEST = Default + c.LPC24XX_ETHERNET_RMII = Default + c.LPC24XX_OSCILLATOR_MAIN = Default + c.LPC24XX_OSCILLATOR_RTC = Default + c.LPC24XX_STOP_ETHERNET = Default + c.LPC24XX_STOP_GPDMA = Default + c.LPC24XX_STOP_USB = Default + c.LPC24XX_UART_BAUD = Default + c.LPC24XX_PCLKDIV = Default + c.LPC24XX_EMCCLKDIV = Default + c.LPC24XX_EMC_MT48LC4M16A2 = Default + c.LPC24XX_EMC_W9825G2JB75I = Default + c.LPC24XX_EMC_IS42S32800D7 = Default + c.LPC24XX_EMC_IS42S32800B = Default + c.LPC24XX_EMC_M29W160E = Default + c.LPC24XX_EMC_M29W320E70 = Default + c.LPC24XX_EMC_SST39VF3201 = Default + c.LPC24XX_CONFIG_UART_2 = Default + c.LPC24XX_CONFIG_UART_3 = Default + c.LPC24XX_CONFIG_I2C_0 = Default + c.LPC24XX_CONFIG_I2C_1 = Default + c.LPC_DMA_CHANNEL_COUNT = 8 + c.BSP_START_RESET_VECTOR = Default + c.BSP_USB_OTG_TRANSCEIVER_I2C_ADDR = "(0x2f << 1)" + + + +class lpc17xx_ea_ram(lpc17xx_shared): + name = "arm/lpc17xx_ea_ram" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_ram', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_CCLK = "96000000U" + c.LPC24XX_PCLKDIV = "2U" + c.LPC24XX_EMCCLKDIV = "2U" + + +class lpc17xx_ea_rom_int(lpc17xx_shared): + name = "arm/lpc17xx_ea_rom_int" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_rom_int', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_CCLK = "96000000U" + c.LPC24XX_PCLKDIV = "2U" + c.LPC24XX_EMC_IS42S32800B = True + +class lpc17xx_plx800_ram(lpc17xx_shared): + name = "arm/lpc17xx_plx800_ram" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_plx800_ram', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + pass + +class lpc17xx_plx800_rom_int(lpc17xx_shared): + name = "arm/lpc17xx_plx800_rom_int" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_plx800_rom_int', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_EMC_M29W320E70 = True + + +class edb7312(Base): + name = "arm/edb7312" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm7tdmi', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/edb7312/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.ON_SKYEYE = Default + + + +class gba(Base): + name = "arm/gba" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm7tdmi', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/gba/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class gdbarmsim_shared(Base): + def build(self, c): + pass + + +class arm1136jfs(gdbarmsim_shared): + name = "arm/arm1136jfs" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm1136jf-s'] + c.LINKCMDS = ['src/lib/libbsp/arm/gdbarmsim/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class arm1136js(gdbarmsim_shared): + name = "arm/arm1136js" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm1136j-s'] + c.LINKCMDS = ['src/lib/libbsp/arm/gdbarmsim/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class armcortexa9(gdbarmsim_shared): + name = "arm/armcortexa9" + + def build(self, c): + c.CFLAGS = ['-mcpu=cortex-a9'] + c.LINKCMDS = ['src/lib/libbsp/arm/gdbarmsim/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class arm7tdmi(gdbarmsim_shared): + name = "arm/arm7tdmi" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm7tdmi'] + c.LINKCMDS = ['src/lib/libbsp/arm/gdbarmsim/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class arm920(gdbarmsim_shared): + name = "arm/arm920" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm920', '-mfloat-abi=soft', '-mfpu=vfp'] + c.LINKCMDS = ['src/lib/libbsp/arm/gdbarmsim/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class gp32(Base): + name = "arm/gp32" + + def build(self, c): + c.CFLAGS = ['-DCPU_S3C2400', '-mcpu=arm920t', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=32'] + c.LINKCMDS = ['src/lib/libbsp/arm/gp32/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class gumstix(Base): + name = "arm/gumstix" + + def build(self, c): + c.CFLAGS = ['-mcpu=xscale', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/gumstix/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + c.ON_SKYEYE = Default + + def header(self, c): + c.ON_SKYEYE = Default + + + +class lpc24xx_shared(Base): + + def build(self, c): + c.CFLAGS = ['-mcpu=arm7tdmi-s', '-mthumb', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-Os'] + + + def header(self, c): + c.BSP_SMALL_MEMORY = Default + c.LPC24XX_CCLK = Default + c.LPC24XX_CONFIG_CONSOLE = Default + c.LPC24XX_CONFIG_I2C_2 = Default + c.LPC24XX_CONFIG_UART_1 = Default + c.LPC24XX_EMC_TEST = Default + c.LPC24XX_ETHERNET_RMII = Default + c.LPC24XX_OSCILLATOR_MAIN = Default + c.LPC24XX_OSCILLATOR_RTC = Default + c.LPC24XX_STOP_ETHERNET = Default + c.LPC24XX_STOP_GPDMA = Default + c.LPC24XX_STOP_USB = Default + c.LPC24XX_UART_BAUD = Default + c.LPC24XX_PCLKDIV = Default + c.LPC24XX_EMCCLKDIV = Default + c.LPC24XX_EMC_MT48LC4M16A2 = Default + c.LPC24XX_EMC_W9825G2JB75I = Default + c.LPC24XX_EMC_IS42S32800D7 = Default + c.LPC24XX_EMC_IS42S32800B = Default + c.LPC24XX_EMC_M29W160E = Default + c.LPC24XX_EMC_M29W320E70 = Default + c.LPC24XX_EMC_SST39VF3201 = Default + c.LPC24XX_CONFIG_UART_2 = Default + c.LPC24XX_CONFIG_UART_3 = Default + c.LPC24XX_CONFIG_I2C_0 = Default + c.LPC24XX_CONFIG_I2C_1 = Default + c.LPC_DMA_CHANNEL_COUNT = Default + c.BSP_START_RESET_VECTOR = Default + c.BSP_USB_OTG_TRANSCEIVER_I2C_ADDR = Default + + +class lpc24xx_ncs_rom_ext(lpc24xx_shared): + name = "arm/lpc24xx_ncs_rom_ext" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc24xx_ncs_rom_ext', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.BSP_START_RESET_VECTOR = "0x80000040" + c.LPC24XX_EMC_MT48LC4M16A2 = True + c.BSP_START_RESET_VECTOR = "0x80000040" + +class lpc24xx_ncs_rom_int(lpc24xx_shared): + name = "arm/lpc24xx_ncs_rom_int" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc24xx_ncs_rom_int', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_EMC_M29W320E70 = True + c.BSP_START_RESET_VECTOR = "0x80000040" + + +class lpc24xx_plx800_ram(lpc24xx_shared): + name = "arm/lpc24xx_plx800_ram" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc24xx_plx800_ram', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_CCLK = "51612800U" + c.LPC24XX_CONFIG_UART_1 = False + c.LPC24XX_CONFIG_UART_2 = Default + + +class lpc24xx_plx800_rom_int(lpc24xx_shared): + name = "arm/lpc24xx_plx800_rom_int" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc24xx_plx800_rom_int', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_CCLK = "51612800U" + c.LPC24XX_CONFIG_UART_1 = False + c.LPC24XX_CONFIG_UART_2 = Default + + +class lpc24xx_ea(lpc24xx_shared): + name = "arm/lpc24xx_ea" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc24xx_ea', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_ETHERNET_RMII = True + c.BSP_START_RESET_VECTOR = "0x80000040" + + +class lpc23xx_tli800(lpc24xx_shared): + name = "arm/lpc23xx_tli800" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm7tdmi-s', '-mthumb', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-Os'] + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc23xx_tli800', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_OSCILLATOR_MAIN = "3686400U" + c.LPC24XX_CCLK = "58982400U" + c.LPC24XX_HEAP_EXTEND = True + +class lpc2362(lpc24xx_shared): + name = "arm/lpc2362" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm7tdmi-s', '-mthumb', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-Os'] + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2362', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_OSCILLATOR_MAIN = "3686400U" + c.LPC24XX_CCLK = "58982400U" + c.LPC24XX_HEAP_EXTEND = True + + +#XXX: Some of the armv4 linkcmds are unnessicary (when armv7 is used) +class lpc24xx_ncs_ram(lpc24xx_shared): + name = "arm/lpc24xx_ncs_ram" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm7tdmi-s', '-mthumb', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-Os'] + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc24xx_ncs_ram', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_CONFIG_I2C_1 = 1 + + +class lpc32xx_shared(Base): + + def header(self, c): + c.BSP_SMALL_MEMORY = Default + c.BSP_START_RESET_VECTOR = "" + c.LPC32XX_ARM_CLK = Default + c.LPC32XX_CONFIG_U3CLK = Default + c.LPC32XX_CONFIG_U4CLK = Default + c.LPC32XX_CONFIG_U5CLK = Default + c.LPC32XX_CONFIG_U6CLK = Default + c.LPC32XX_CONFIG_UART_CLKMODE = Default + c.LPC32XX_DISABLE_MMU = Default + c.LPC32XX_DISABLE_READ_ONLY_PROTECTION = Default + c.LPC32XX_DISABLE_READ_WRITE_DATA_CACHE = Default + c.LPC32XX_ENABLE_WATCHDOG_RESET = Default + c.LPC32XX_ETHERNET_RMII = Default + c.LPC32XX_HCLK = Default + c.LPC32XX_OSCILLATOR_MAIN = Default + c.LPC32XX_OSCILLATOR_RTC = Default + c.LPC32XX_PERIPH_CLK = Default + c.LPC32XX_STOP_ETHERNET = Default + c.LPC32XX_STOP_GPDMA = Default + c.LPC32XX_STOP_USB = Default + c.LPC32XX_UART_1_BAUD = Default + c.LPC32XX_UART_2_BAUD = Default + c.LPC32XX_UART_7_BAUD = Default + c.TESTS_USE_PRINTK = True + + + +class lpc32xx_mzx_stage_1(lpc32xx_shared): + name = "arm/lpc32xx_mzx_stage_1" + + def build(self, c): + # XXX: -Os was added as a hack to fix test builds (results were too huge resulting in an error) + c.CFLAGS = ['-fno-schedule-insns2', '-mcpu=arm926ej-s', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-mthumb', '-Os'] + c.LINKCMDS = ['src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_1', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.BSP_SMALL_MEMORY = True + c.LPC_DMA_CHANNEL_COUNT = Default + + +class lpc32xx_mzx_stage_2(lpc32xx_shared): + name = "arm/lpc32xx_mzx_stage_2" + + def build(self, c): + c.CFLAGS = ['-fno-schedule-insns2', '-mcpu=arm926ej-s', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-mthumb'] + c.LINKCMDS = ['src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_2', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC_DMA_CHANNEL_COUNT = 8 + + +class lpc32xx_phycore(lpc32xx_shared): + name = "arm/lpc32xx_phycore" + + def build(self, c): + c.CFLAGS = ['-fno-schedule-insns2', '-mcpu=arm926ej-s', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-mthumb'] + c.LINKCMDS = ['src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_phycore', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC_DMA_CHANNEL_COUNT = 8 + + +class lpc32xx_mzx(lpc32xx_shared): + name = "arm/lpc32xx_mzx" + + def build(self, c): + c.CFLAGS = ['-fno-schedule-insns2', '-mcpu=arm926ej-s', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-mthumb'] + c.LINKCMDS = ['src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC_DMA_CHANNEL_COUNT = 8 + + +class nds(Base): + name = "arm/nds" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm9tdmi', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-mthumb-interwork'] + c.LINKCMDS = ['src/lib/libbsp/arm/nds/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class rtl22xx_shared(Base): + def build(self, c): + c.CFLAGS = ['-mapcs-frame', '-mcpu=arm7tdmi', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/rtl22xx/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + c.ON_SKYEYE = Default + + def header(self, c): + c.ON_SKYEYE = Default + + +class raspberrypi(Base): + name = "arm/raspberrypi" + def build(self, c): + c.CFLAGS = ['-mcpu=arm1176jzf-s'] + c.LINKCMDS = ['src/lib/libbsp/arm/raspberrypi/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4'] + + def header(self, c): + c.BSP_START_RESET_VECTOR = "" + + +class realview_pbx_a9_qemu(Base): + name = "arm/realview_pbx_a9_qemu" + + def build(self, c): + c.CFLAGS = ['-march=armv7-a', '-mthumb', '-mfpu=neon', '-mfloat-abi=hard', '-mtune=cortex-a9'] + c.LINKCMDS = ['src/lib/libbsp/arm/realview-pbx-a9/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4'] + + def header(self, c): + c.BSP_START_RESET_VECTOR = "" + c.BSP_ARM_A9MPCORE_PERIPHCLK = "100000000U" + + +class rtl22xx(rtl22xx_shared): + name = "arm/rtl22xx" + + def build(self, c): + c.CFLAGS = ['-mapcs-frame', '-mcpu=arm7tdmi', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/rtl22xx/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class rtl22xx_t(rtl22xx_shared): + name = "arm/rtl22xx_t" + + def build(self, c): + c.CFLAGS = ['-mapcs-frame', '-mcpu=arm7tdmi', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-mthumb', '-fno-schedule-insns2'] + c.LINKCMDS = ['src/lib/libbsp/arm/rtl22xx/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class smdk2410(Base): + name = "arm/smdk2410" + + def build(self, c): + c.CFLAGS = ['-DCPU_S3C2410', '-mcpu=arm920t', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=32'] + c.LINKCMDS = ['src/lib/libbsp/arm/smdk2410/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.ON_SKYEYE = Default + + +class stm32f4(Base): + name = "arm/stm32f4" + + def build(self, c): + c.CFLAGS = ['-march=armv7-m', '-mthumb'] + c.LINKCMDS = ['src/lib/libbsp/arm/stm32f4/startup/linkcmds.stm32f4', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.STM32F4_HSE_OSCILLATOR = Default + c.STM32F4_SYSCLK = Default + c.STM32F4_HCLK = Default + c.STM32F4_PCLK1 = Default + c.STM32F4_PCLK2 = Default + c.STM32F4_USART_BAUD = Default + c.STM32F4_ENABLE_USART_1 = Default + c.STM32F4_ENABLE_USART_2 = Default + c.STM32F4_ENABLE_USART_3 = Default + c.STM32F4_ENABLE_UART_4 = Default + c.STM32F4_ENABLE_UART_5 = Default + c.STM32F4_ENABLE_USART_6 = Default + + +class xilinx_zynq_a9_qemu(Base): + name = "arm/xilinx_zynq_a9_qemu" + + def build(self, c): + c.CFLAGS = ['-march=armv7-a', '-mthumb', '-mfpu=neon', '-mfloat-abi=hard', '-mtune=cortex-a9'] + c.LINKCMDS = ['src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.in', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.BSP_START_RESET_VECTOR = "" + c.BSP_ARM_A9MPCORE_PERIPHCLK = "100000000U" + + +class xilinx_zynq_shared(Base): + + def build(self, c): + c.CFLAGS = ['-march=armv7-a', '-mthumb', '-mfpu=neon', '-mfloat-abi=hard', '-mtune=cortex-a9'] + c.LINKCMDS = ['src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.in', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + c.ZYNQ_RAM_ORIGIN = Default + c.ZYNQ_RAM_MMU = Default + c.ZYNQ_RAM_MMU_LENGTH = Default + c.ZYNQ_RAM_ORIGIN_AVAILABLE = Default + c.ZYNQ_RAM_LENGTH_AVAILABLE = Default + c.ZYNQ_RAM_INT_0_ORIGIN = Default + c.ZYNQ_RAM_INT_0_LENGTH = Default + c.ZYNQ_RAM_INT_1_ORIGIN = Default + c.ZYNQ_RAM_INT_1_LENGTH = Default + c.ZYNQ_CPUS = Default + c.ZYNQ_RAM_NOCACHE_LENGTH = Default + c.CLOCK_DRIVER_USE_FAST_IDLE = Default + + + def header(self, c): + c.BSP_START_RESET_VECTOR = Default + c.BSP_DATA_CACHE_ENABLED = Default + c.BSP_INSTRUCTION_CACHE_ENABLED = Default + c.BSP_ARM_A9MPCORE_PERIPHCLK = Default + c.ZYNQ_CLOCK_UART = Default + c.ZYNQ_CLOCK_CPU_1X = Default + + +class xilinx_zynq_a9_qemu(xilinx_zynq_shared): + name = "arm/xilinx_zynq_a9_qemu" + + def build(self, c): + c.CLOCK_DRIVER_USE_FAST_IDLE = True + c.BSP_ZYNQ_RAM_LENGTH = Default + c.ZYNQ_RAM_ORIGIN = "0x00000000" + c.ZYNQ_RAM_MMU = "0x0fffc000" + c.ZYNQ_RAM_ORIGIN_AVAILABLE = "%(ZYNQ_RAM_ORIGIN)s" + c.ZYNQ_RAM_LENGTH_AVAILABLE = "%(BSP_ZYNQ_RAM_LENGTH)s - 16k" + + def header(self, c): + c.BSP_DATA_CACHE_ENABLED = False + + +class xilinx_zynq_zc702(xilinx_zynq_shared): + name = "arm/xilinx_zynq_zc702" + + def build(self, c): + c.BSP_ARM_A9MPCORE_PERIPHCLK = "333333333U" + c.ZYNQ_RAM_ORIGIN = "0x00100000" + + def header(self, c): + c.ZYNQ_CLOCK_UART = "50000000UL" + c.BSP_ZYNQ_RAM_LENGTH = "1024M" + + +class xilinx_zynq_zc706(xilinx_zynq_shared): + name = "arm/xilinx_zynq_zc706" + + def build(self, c): + c.BSP_ZYNQ_RAM_LENGTH = "1024M" + c.ZYNQ_RAM_LENGTH_AVAILABLE = "%(BSP_ZYNQ_RAM_LENGTH)s - 4M - 16k" + + +class xilinx_zynq_zedboard(xilinx_zynq_shared): + name = "arm/xilinx_zynq_zedboard" + + def build(self, c): + c.BSP_ZYNQ_RAM_LENGTH = "512M" + c.ZYNQ_RAM_ORIGIN = "0x00100000" + + def header(self, c): + c.BSP_ARM_A9MPCORE_PERIPHCLK = "666666667U" + c.ZYNQ_CLOCK_UART = "50000000UL" + + +class beagle_shared(Base): + def build(self, c): + c.CFLAGS = ['-mcpu=cortex-a8'] + c.LINKCMDS = ['src/lib/libbsp/arm/beagle/startup/linkcmds.beagle', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.base'] + + def header(self, c): + c.CONSOLE_POLLED = Default + c.CONSOLE_BAUD = Default + +class beagleboardorig(beagle_shared): + name = "arm/beagleboardorig" + + def header(self, c): + c.IS_DM3730 = True + + +class beagleboardxm(beagle_shared): + name = "arm/beagleboardxm" + + def header(self, c): + c.IS_DM3730 = True + + +class beaglebonewhite(beagle_shared): + name = "arm/beaglebonewhite" + + def header(self, c): + c.IS_AM335X = True + + +class beagleboneblack(beagle_shared): + name = "arm/beagleboneblack" + + def header(self, c): + c.IS_AM335X = True + + +class raspberrypi(Base): + name = "arm/raspberrypi" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm1176jzf-s'] + c.LINKCMDS = ['src/lib/libbsp/arm/beagle/startup/linkcmds.beagle', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.base'] + + diff --git a/py/waf/defaults/bsp/avr.py b/py/waf/defaults/bsp/avr.py new file mode 100644 index 0000000000..c06ed02f4f --- /dev/null +++ b/py/waf/defaults/bsp/avr.py @@ -0,0 +1,15 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "avr" + conflicts=("clang",) + + + +class avrtest(Base): + name = "avr/avrtest" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/avr/avrtest/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', '-e', '__init'] + diff --git a/py/waf/defaults/bsp/bfin.py b/py/waf/defaults/bsp/bfin.py new file mode 100644 index 0000000000..18a4b9519c --- /dev/null +++ b/py/waf/defaults/bsp/bfin.py @@ -0,0 +1,48 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "bfin" + conflicts=("clang",) + + + +class bf537stamp(Base): + name = "bfin/bf537stamp" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/bfin/bf537Stamp/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', '-e', '__start'] + + def header(self, c): + c.BFIN_ON_SKYEYE = Default + c.CONSOLE_USE_INTERRUPTS = Default + + + +class ezkit533(Base): + name = "bfin/ezkit533" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/bfin/eZKit533/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', '-e', '__start'] + + def header(self, c): + c.BFIN_ON_SKYEYE = Default + c.CONSOLE_USE_INTERRUPTS = Default + + + +class tll6527m(Base): + name = "bfin/tll6527m" + + def build(self, c): + c.CFLAGS = ['-mcpu=bf527'] + c.LINKCMDS = ['src/lib/libbsp/bfin/TLL6527M/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', '-e', '__start'] + + def header(self, c): + c.BFIN_ON_SKYEYE = Default + c.CONSOLE_BAUDRATE = 9600 + c.CONSOLE_USE_INTERRUPTS = False + c.INTERRUPT_USE_TABLE = Default + c.UART_USE_DMA = Default diff --git a/py/waf/defaults/bsp/h8300.py b/py/waf/defaults/bsp/h8300.py new file mode 100644 index 0000000000..faa147536a --- /dev/null +++ b/py/waf/defaults/bsp/h8300.py @@ -0,0 +1,27 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "h8300" + conflicts=("clang",) + + + +class h8sim_shared(Base): + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/h8300/h8sim/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', '-e', '_start'] + +class h8sxsim(h8sim_shared): + name = "h8300/h8sxsim" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/h8300/h8sim/startup/linkcmds'] + + +class h8sim(h8sim_shared): + name = "h8300/h8sim" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/h8300/h8sim/startup/linkcmds'] + + diff --git a/py/waf/defaults/bsp/i386.py b/py/waf/defaults/bsp/i386.py new file mode 100644 index 0000000000..59ce98cee4 --- /dev/null +++ b/py/waf/defaults/bsp/i386.py @@ -0,0 +1,74 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "i386" + conflicts=("clang",) + + + +class pc386_shared(Base): + def build(self, c): + c.CFLAGS = ['-mtune=i386'] + c.LDFLAGS = ['-Wl,-Ttext,0x00100000'] + c.LINKCMDS = ['src/lib/libbsp/i386/pc386/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o', '-e', 'start'] + c.LINK_END = ['crtend.o', 'crtn.o'] + c.ENABLE_NETWORKING = True + + def header(self, c): + c.BSP_HAS_SMP = Default + c.BSP_VIDEO_80x50 = Default + c.CLOCK_DRIVER_USE_8254 = Default + c.CLOCK_DRIVER_USE_TSC = Default + c.IDE_USE_PRIMARY_INTERFACE = Default + c.IDE_USE_SECONDARY_INTERFACE = Default + c.USE_COM1_AS_CONSOLE = Default + c.BSP_PRESS_KEY_FOR_RESET = True + + +class pc486(pc386_shared): + name = "i386/pc486" + + def build(self, c): + c.CFLAGS = ['-mtune=i486'] + c.LINKCMDS = ['src/lib/libbsp/i386/pc386/startup/linkcmds'] + + +class pc386(pc386_shared): + name = "i386/pc386" + + def build(self, c): + c.CFLAGS = ['-mtune=i386'] + c.LINKCMDS = ['src/lib/libbsp/i386/pc386/startup/linkcmds'] + + + +class pc686(pc386_shared): + name = "i386/pc686" + + def build(self, c): + c.CFLAGS = ['-mtune=pentiumpro'] + c.LINKCMDS = ['src/lib/libbsp/i386/pc386/startup/linkcmds'] + + +class pc586_sse(pc386_shared): + name = "i386/pc586-sse" + + def build(self, c): + c.CFLAGS = ['-mtune=i386'] + c.LINKCMDS = ['src/lib/libbsp/i386/pc386/startup/linkcmds'] + + +class pc586(pc386_shared): + name = "i386/pc586" + + def build(self, c): + c.CFLAGS = ['-mtune=pentium'] + c.LINKCMDS = ['src/lib/libbsp/i386/pc386/startup/linkcmds'] + + +class pcp4(pc386_shared): + name = "i386/pcp4" + + def build(self, c): + c.CFLAGS = ['-mtune=pentium4', '-march=pentium4', '-msse3'] diff --git a/py/waf/defaults/bsp/lm32.py b/py/waf/defaults/bsp/lm32.py new file mode 100644 index 0000000000..7caf519587 --- /dev/null +++ b/py/waf/defaults/bsp/lm32.py @@ -0,0 +1,36 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "lm32" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o', '-e', 'start'] + c.LINK_END = ['crtend.o', 'crtn.o'] + c.LINK_LINK = ['-dc', '-dp', '-N'] + + + +class lm32_evr(Base): + name = "lm32/lm32_evr" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/lm32/lm32_evr/startup/linkcmds'] + + def header(self, c): + c.ON_SIMULATOR = Default + + + +class milkymist(Base): + name = "lm32/milkymist" + + def build(self, c): + c.CFLAGS = ['-mbarrel-shift-enabled', '-mmultiply-enabled', '-mdivide-enabled', '-msign-extend-enabled'] + c.LINKCMDS = ['src/lib/libbsp/lm32/milkymist/startup/linkcmds'] + + def header(self, c): + c.ON_SIMULATOR = Default + + + diff --git a/py/waf/defaults/bsp/m32c.py b/py/waf/defaults/bsp/m32c.py new file mode 100644 index 0000000000..aa51d7344b --- /dev/null +++ b/py/waf/defaults/bsp/m32c.py @@ -0,0 +1,17 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "m32c" + conflicts=("clang",) + + + +class m32csim(Base): + name = "m32c/m32csim" + + def build(self, c): + c.CFLAGS = ["-mcpu=m32cm"] + c.LINKCMDS = ['src/lib/libbsp/m32c/m32cbsp/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', 'crtbegin.o', '-e', '_start'] + c.LINK_END = ['crtend.o'] + c.LINK_LINK = ['-dc', '-dp', '-N'] diff --git a/py/waf/defaults/bsp/m32r.py b/py/waf/defaults/bsp/m32r.py new file mode 100644 index 0000000000..9ad5fad991 --- /dev/null +++ b/py/waf/defaults/bsp/m32r.py @@ -0,0 +1,15 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "m32r" + conflicts=("clang",) + + + +class m32rsim(Base): + name = "m32r/m32rsim" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/m32r/m32rsim/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', 'crtinit.o', '-e', '_start'] + diff --git a/py/waf/defaults/bsp/m68k.py b/py/waf/defaults/bsp/m68k.py new file mode 100644 index 0000000000..a6551b1647 --- /dev/null +++ b/py/waf/defaults/bsp/m68k.py @@ -0,0 +1,271 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "m68k" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o', '-e', 'start'] + c.LINK_END = ['crtend.o', 'crtn.o'] + + +class av5282(Base): + name = "m68k/av5282" + + def build(self, c): + c.CFLAGS = ['-mcpu=528x'] + c.LINKCMDS = ['src/lib/libbsp/m68k/av5282/startup/linkcmds'] + +class csb360(Base): + name = "m68k/csb360" + + def build(self, c): + c.CFLAGS = ['-mcpu=5272'] + c.LINKCMDS = ['src/lib/libbsp/m68k/csb360/startup/linkcmds'] + + +class gen68302(Base): + name = "m68k/gen68302" + + def build(self, c): + c.CFLAGS = ['-mcpu=68302'] + c.LINKCMDS = ['src/lib/libbsp/m68k/gen68302/startup/linkcmds'] + + +class gen68340(Base): + name = "m68k/gen68340" + + def build(self, c): + c.CFLAGS = ['-mcpu=cpu32'] + c.LINKCMDS = ['src/lib/libbsp/m68k/gen68340/startup/linkcmds'] + + +class gen68360_shared(Base): + def build(self, c): + c.CFLAGS = ['-mcpu=cpu32'] + c.LINKCMDS = ['src/lib/libbsp/m68k/gen68360/startup/linkcmds', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.bootp', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.prom'] + + def header(self, c): + c.GEN68360 = True + + + +class gen68360_040(gen68360_shared): + name = "m68k/gen68360_040" + + def build(self, c): + c.CFLAGS = ['-mcpu=68040'] + c.LINKCMDS = ['src/lib/libbsp/m68k/gen68360/startup/linkcmds', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.bootp', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.prom'] + + def header(self, c): + c.GEN68360_040 = True + + + +class pgh360(gen68360_shared): + name = "m68k/pgh360" + + def build(self, c): + c.CFLAGS = ['-mcpu=cpu32'] + c.LINKCMDS = ['src/lib/libbsp/m68k/gen68360/startup/linkcmds', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.bootp', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.prom'] + + def header(self, c): + c.PGH360 = True + + + +class gen68360(gen68360_shared): + name = "m68k/gen68360" + + def build(self, c): + c.CFLAGS = ['-mcpu=cpu32'] + c.LINKCMDS = ['src/lib/libbsp/m68k/gen68360/startup/linkcmds', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.bootp', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.prom'] + + + +class genmcf548x_shared(Base): + + def header(self, c): + c.BSP_CONSOLE_BAUD = 9600 + c.BSP_CPU_CLOCK_SPEED = 100000000 + c.HAS_DBUG = Default + c.HAS_LOW_LEVEL_INIT = Default + + + +class cobra5475(genmcf548x_shared): + name = "m68k/cobra5475" + + def build(self, c): + c.CFLAGS = ['-mcfv4e', '-Wa,-memac'] + c.LINKCMDS = ['src/lib/libbsp/m68k/genmcf548x/startup/linkcmds.COBRA5475'] + + +class m5484fireengine(genmcf548x_shared): + name = "m68k/m5484fireengine" + + def build(self, c): + c.CFLAGS = ['-mcfv4e', '-Wa,-memac'] + c.LINKCMDS = ['src/lib/libbsp/m68k/genmcf548x/startup/linkcmds.m5484FireEngine', 'src/lib/libbsp/m68k/genmcf548x/startup/linkcmds.m5484FireEngine.flash'] + + +class idp(Base): + name = "m68k/idp" + + def build(self, c): + c.CFLAGS = ['-mcpu=68040', '-msoft-float'] + c.LINKCMDS = ['src/lib/libbsp/m68k/idp/startup/linkcmds'] + + +class mcf5206elite(Base): + name = "m68k/mcf5206elite" + + def build(self, c): + c.CFLAGS = ['-mcpu=5206e'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mcf5206elite/startup/linkcmds', 'src/lib/libbsp/m68k/mcf5206elite/startup/linkcmds.flash'] + + +class mcf52235(Base): + name = "m68k/mcf52235" + + def build(self, c): + c.CFLAGS = ['-mcpu=52235'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mcf52235/startup/linkcmds'] + + +class mcf5225x(Base): + name = "m68k/mcf5225x" + + def build(self, c): + c.CFLAGS = ['-mcpu=52235'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mcf5225x/startup/linkcmds'] + + +class mcf5235(Base): + name = "m68k/mcf5235" + + def build(self, c): + c.CFLAGS = ['-mcpu=5235'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mcf5235/startup/linkcmds', 'src/lib/libbsp/m68k/mcf5235/startup/linkcmdsflash', 'src/lib/libbsp/m68k/mcf5235/startup/linkcmdsram'] + + +class mcf5329(Base): + name = "m68k/mcf5329" + + def build(self, c): + c.CFLAGS = ['-mcpu=5307'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mcf5329/startup/linkcmds', 'src/lib/libbsp/m68k/mcf5329/startup/linkcmdsflash'] + + +class mrm332(Base): + name = "m68k/mrm332" + + def build(self, c): + c.CFLAGS = ['-mcpu=cpu32'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mrm332/startup/linkcmds', 'src/lib/libbsp/m68k/mrm332/startup/linkcmds_ROM'] + + +class mvme136(Base): + name = "m68k/mvme136" + + def build(self, c): + c.CFLAGS = ['-mcpu=68020'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mvme136/startup/linkcmds'] + + +class mvme147(Base): + name = "m68k/mvme147" + + def build(self, c): + c.CFLAGS = ['-mcpu=68030'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mvme147/startup/linkcmds'] + + +class mvme147s(Base): + name = "m68k/mvme147s" + + def build(self, c): + c.CFLAGS = ['-mcpu=68030'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mvme147s/startup/linkcmds'] + + +class mvme162_shared(Base): + def build(self, c): + c.CFLAGS = ['-mcpu=68040'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mvme162/startup/linkcmds'] + + +class mvme162lx(mvme162_shared): + name = "m68k/mvme162lx" + + def build(self, c): + c.CFLAGS = ['-mcpu=68040'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mvme162/startup/linkcmds'] + + +class mvme162(mvme162_shared): + name = "m68k/mvme162" + + def build(self, c): + c.CFLAGS = ['-mcpu=68040'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mvme162/startup/linkcmds'] + + +class mvme167(Base): + name = "m68k/mvme167" + + def build(self, c): + c.CFLAGS = ['-mcpu=68040'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mvme167/startup/linkcmds'] + + def header(self, c): + c.mvme167 = True + c.CD2401_INT_LEVEL = Default + c.CD2401_IO_MODE = Default + c.CD2401_USE_TERMIOS = Default + c.CONSOLE_MINOR = Default + c.PRINTK_MINOR = Default + + +class ods68302(Base): + name = "m68k/ods68302" + + def build(self, c): + c.CFLAGS = ['-mcpu=68302'] + c.LINKCMDS = ['src/lib/libbsp/m68k/ods68302/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/reset.o', 'crti.o', 'crtbegin.o', '-e', 'start'] + + +class sim68000_shared(Base): + def build(self, c): + c.CFLAGS = ['-mcpu=68000'] + c.LINKCMDS = ['src/lib/libbsp/m68k/sim68000/startup/linkcmds'] + + def header(self, c): + c.CONSOLE_USE_INTERRUPTS = Default + + + +class sim68000(sim68000_shared): + name = "m68k/sim68000" + + def build(self, c): + c.CFLAGS = ['-mcpu=68000'] + c.LINKCMDS = ['src/lib/libbsp/m68k/sim68000/startup/linkcmds'] + + + +class simcpu32(sim68000_shared): + name = "m68k/simcpu32" + + def build(self, c): + c.CFLAGS = ['-mcpu=cpu32'] + c.LINKCMDS = ['src/lib/libbsp/m68k/sim68000/startup/linkcmds'] + + +class uc5282(Base): + name = "m68k/uc5282" + + def build(self, c): + c.CFLAGS = ['-mcpu=5282'] + c.LINKCMDS = ['src/lib/libbsp/m68k/uC5282/startup/linkcmds'] diff --git a/py/waf/defaults/bsp/mips.py b/py/waf/defaults/bsp/mips.py new file mode 100644 index 0000000000..d3f7e7f051 --- /dev/null +++ b/py/waf/defaults/bsp/mips.py @@ -0,0 +1,80 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "mips" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o', '-e', 'start'] + c.LINK_END = ['crtend.o', 'crtn.o'] + + +class csb350(Base): + name = "mips/csb350" + + def build(self, c): + c.CFLAGS = ['-mips32', '-G0', '-msoft-float'] + c.LDFLAGS = ['-msoft-float'] + c.LINKCMDS = ['src/lib/libbsp/mips/csb350/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o', '-e', '_start'] + + +class genmongoosev(Base): + name = "mips/genmongoosev" + + def build(self, c): + c.CFLAGS = ['-mips1', '-G0'] + c.LINKCMDS = ['src/lib/libbsp/mips/genmongoosev/startup/linkcmds'] + + +class hurricane(Base): + name = "mips/hurricane" + + def build(self, c): + c.CFLAGS = ['-mips3', '-G0', '-EL'] + c.LINKCMDS = ['src/lib/libbsp/mips/hurricane/startup/linkcmds'] + c.LINK_LINK = ['-EL'] # work around gcc driver bug + + def header(self, c): + c.BSP_HAS_RM52xx = Default + c.BSP_HAS_USC320 = Default + + + +class jmr3904(Base): + name = "mips/jmr3904" + + def build(self, c): + c.CFLAGS = ['-march=r3900', '-Wa,-xgot', '-G0'] + c.LINKCMDS = ['src/lib/libbsp/mips/jmr3904/startup/linkcmds'] + + + +class malta(Base): + name = "mips/malta" + + def build(self, c): + c.CFLAGS = ['-march=24kf1_1', '-Wa,-xgot', '-G0'] + c.LINKCMDS = ['src/lib/libbsp/mips/malta/startup/linkcmds'] + + +class rbtx4925(Base): + name = "mips/rbtx4925" + + def build(self, c): + c.CFLAGS = ['-mips3', '-G0', '-EL'] + c.LINKCMDS = ['src/lib/libbsp/mips/rbtx4925/startup/linkcmds'] + c.LINK_LINK = ['-EL'] # work around gcc driver bug + + def header(self, c): + c.BSP_HAS_TX49xx = Default + + + +class rbtx4938(Base): + name = "mips/rbtx4938" + + def build(self, c): + c.CFLAGS = ['-mips3', '-G0', '-EL'] + c.LINKCMDS = ['src/lib/libbsp/mips/rbtx4938/startup/linkcmds'] + c.LINK_LINK = ['-EL'] # work around gcc driver bug diff --git a/py/waf/defaults/bsp/moxie.py b/py/waf/defaults/bsp/moxie.py new file mode 100644 index 0000000000..9516b344fe --- /dev/null +++ b/py/waf/defaults/bsp/moxie.py @@ -0,0 +1,17 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "moxie" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['${RTEMS}/start.o', '-e', '_start'] + + +class moxiesim(Base): + name = "moxie/moxiesim" + + def build(self, c): + c.LDFLAGS = ['-Wl,--gc-sections'] + c.LINKCMDS = ['src/lib/libbsp/moxie/moxiesim/startup/linkcmds'] + diff --git a/py/waf/defaults/bsp/nios2.py b/py/waf/defaults/bsp/nios2.py new file mode 100644 index 0000000000..1bc451e878 --- /dev/null +++ b/py/waf/defaults/bsp/nios2.py @@ -0,0 +1,16 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "nios2" + conflicts=("clang",) + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/nios2/nios2_iss/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o', '-e', 'start'] + c.LINK_END = ['crtend.o', '${RTEMS}/crtnn.o'] + +class nios2_iss(Base): + name = "nios2/nios2_iss" + + def build(self, c): + c.CFLAGS = ["-mno-hw-mul", "-mno-hw-div"] diff --git a/py/waf/defaults/bsp/powerpc.py b/py/waf/defaults/bsp/powerpc.py new file mode 100644 index 0000000000..00c4b287a9 --- /dev/null +++ b/py/waf/defaults/bsp/powerpc.py @@ -0,0 +1,914 @@ +from rtems_waf.config import Default, Config, Disable + +class Base(Config): + arch = name = "powerpc" + conflicts=("clang",) + + + +class beatnik(Base): + name = "powerpc/beatnik" + + def build(self, c): + c.CFLAGS = ['-mcpu=7400', '-D__ppc_generic'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/shared/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '-e', '__rtems_entry_point', '-u', '__vectors', '${RTEMS}/vectors_entry.o', '${RTEMS}/preload.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + + def header(self, c): + c.CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK = Default + + + +class ep1a(Base): + name = "powerpc/ep1a" + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-Dppc603e', '-mmultiple', '-mstring', '-mstrict-align'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/ep1a/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '${RTEMS}/start.o', '-e', '__rtems_entry_point', '-u', '__vectors'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + + def header(self, c): + c.CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK = Default + c.CONSOLE_USE_INTERRUPTS = Default + + +class gen5200_shared(Base): + def header(self, c): + c.ALLOW_IRQ_NESTING = True + c.BENCHMARK_IRQ_PROCESSING = False + c.BSP_GPIOPCR_INITMASK = Default + c.BSP_GPIOPCR_INITVAL = Default + c.BSP_PRESS_KEY_FOR_RESET = Default + c.BSP_RESET_BOARD_AT_EXIT = Default + c.BSP_UART_AVAIL_MASK = Default + c.PRINTK_MINOR = "0" + c.SINGLE_CHAR_MODE = Default + c.UARTS_USE_TERMIOS_INT = Default + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-mstrict-align', '-meabi', '-msdata', '-fno-common'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + + +class icecube(gen5200_shared): + name = "powerpc/icecube" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen5200/startup/linkcmds.icecube', + 'src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base'] + + def header(self, c): + c.ALLOW_IRQ_NESTING = False + c.BSP_PRESS_KEY_FOR_RESET = True + c.BSP_RESET_BOARD_AT_EXIT = True + c.HAS_UBOOT = True + c.MPC5200_BOARD_ICECUBE = True + + +class dp2(gen5200_shared): + name = "powerpc/dp2" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen5200/startup/linkcmds.dp2', 'src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base'] + + def header(self, c): + c.BSP_GPIOPCR_INITMASK = "0x337F3F77" + c.BSP_GPIOPCR_INITVAL = "0x03550040" + c.BSP_TYPE_DP2 = True + c.BSP_UART_AVAIL_MASK = "0x22" + c.HAS_UBOOT = True + c.MPC5200_BOARD_DP2 = True + c.MPC5200_PSC_INDEX_FOR_GPS_MODULE = 5 + c.PRINTK_MINOR = "1" + + +class pm520_ze30(gen5200_shared): + name = "powerpc/pm520_ze30" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen5200/startup/linkcmds.pm520_ze30', 'src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base'] + + def header(self, c): + c.BSP_GPIOPCR_INITMASK = "0x037F3F07" + c.BSP_GPIOPCR_INITVAL = "0x01552104" + c.BSP_UART_AVAIL_MASK = "0x39" + c.HAS_UBOOT = True + c.MPC5200_BOARD_PM520_ZE30 = True + + +class pm520_cr825(gen5200_shared): + name = "powerpc/pm520_cr825" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen5200/startup/linkcmds.pm520_cr825', 'src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base'] + + def header(self, c): + c.BSP_RESET_BOARD_AT_EXIT = True + c.BSP_UART_AVAIL_MASK = "0x07" + c.HAS_UBOOT = True + c.MPC5200_BOARD_PM520_CR825 = True + + + +class brs5l(gen5200_shared): + name = "powerpc/brs5l" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen5200/startup/linkcmds.brs5l', 'src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base'] + + def header(self, c): + c.MPC5200_BOARD_BRS5L = True + c.BSP_GPIOPCR_INITMASK = "0xb30F0F77" + c.BSP_GPIOPCR_INITVAL = "0x91050444" + c.BSP_RESET_BOARD_AT_EXIT = True + c.BSP_UART_AVAIL_MASK = "0x07" + + +class brs6l(gen5200_shared): + name = "powerpc/brs6l" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen5200/startup/linkcmds.brs6l', 'src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base'] + + def header(self, c): + c.MPC5200_BOARD_BRS6L = True + + +class gen83xx_shared(Base): + def header(self, c): + c.BSP_CONSOLE_BAUD = 9600 + c.GEN83XX_ENABLE_INTERRUPT_NESTING = Default + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-meabi', '-msdata', '-fno-common', '-mstrict-align'] + # XXX: These extra linkcmds need to move below. + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.hsc_cm01', + 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', + 'src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc83xx', + 'src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc8349eamds', + 'src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc8313erdb'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-u', '__vectors'] + + + +class br_uid(gen83xx_shared): + name = "powerpc/br_uid" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.br_uid', 'src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc83xx', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + + def header(self, c): + c.MPC83XX_BOARD_BR_UID = True + c.MPC83XX_NETWORK_INTERFACE_0_PHY_ADDR = "-1" + c.MPC83XX_CHIP_TYPE = 8309 + c.MPC83XX_HAS_NAND_LP_FLASH_ON_CS0 = True + + +class mpc8349eamds(gen83xx_shared): + name = "powerpc/mpc8349eamds" + + def header(self, c): + c.BSP_USE_UART2 = True + c.HAS_UBOOT = True + c.MPC8349 = True + c.MPC8349EAMDS = True + + + +class mpc8313erdb(gen83xx_shared): + name = "powerpc/mpc8313erdb" + + def header(self, c): + c.BSP_CONSOLE_BAUD = 115200 + c.BSP_USE_UART2 = True + c.BSP_USE_UART_INTERRUPTS = Default + c.HAS_UBOOT = True + c.MPC8313ERDB = True + c.MPC8349 = True + + + +class hsc_cm01(gen83xx_shared): + name = "powerpc/hsc_cm01" + + def header(self, c): + c.BSP_USE_UART2 = True + c.HSC_CM01 = True + c.MPC8349 = True + c.MPC83XX_BOARD_HSC_CM01 = Default + + +class mpc8309som(gen83xx_shared): + name = "powerpc/mpc8309som" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc8309som', 'src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc83xx', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + + def header(self, c): + c.MPC83XX_BOARD_MPC8309SOM = True + c.MPC83XX_NETWORK_INTERFACE_0_PHY_ADDR = "0x11" + c.MPC83XX_CHIP_TYPE = 8309 + c.HAS_UBOOT = True + + + +class haleakala(Base): + name = "powerpc/haleakala" + + def build(self, c): + c.CFLAGS = ['-mcpu=405', '-Dppc405'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/haleakala/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-u', '__vectors', '-u', 'download_entry'] + + def header(self, c): + c.PPC_USE_SPRG = Default + c.PPC_VECTOR_FILE_BASE = Default + + +class mbx8xx_shared(Base): + def header(self, c): + c.CONSOLE_MINOR = "SMC2_MINOR" + c.DISPATCH_HANDLER_STAT = True + c.EPPCBUG_SMC1 = Default + c.EPPCBUG_VECTORS = Default + c.NVRAM_CONFIGURE = Default + c.PRINTK_IO_MODE = Default + c.PRINTK_MINOR = "SMC2_MINOR" + c.UARTS_IO_MODE = Default + c.UARTS_USE_TERMIOS = Default + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mbx8xx/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '-e', 'start'] + c.LINK_END = ['ecrtn.o'] + c.LINK_LINK = ['-u', '__vectors'] + + +class mbx860_005b(mbx8xx_shared): + name = "powerpc/mbx860_005b" + + def build(self, c): + c.CFLAGS = ['-mcpu=860', '-Dmpc860', '-Dmbx860_005b', '-meabi', '-msdata', '-fno-common'] + + def header(self, c): + c.CONSOLE_MINOR = "SMC1_MINOR" + c.EPPCBUG_SMC1 = Default + c.EPPCBUG_VECTORS = Default + c.NVRAM_CONFIGURE = False + c.PRINTK_MINOR = "SMC1_MINOR" + c.UARTS_USE_TERMIOS = True + + + +class mbx821_002(mbx8xx_shared): + name = "powerpc/mbx821_002" + + def build(self, c): + c.CFLAGS = ['-mcpu=821', '-Dmpc821', '-Dmbx821_002', '-meabi', '-msdata', '-fno-common'] + + +class mbx821_001(mbx8xx_shared): + name = "powerpc/mbx821_001" + + def build(self, c): + c.CFLAGS = ['-mcpu=821', '-Dmpc821', '-Dmbx821_001', '-meabi', '-msdata', '-fno-common'] + + +class mbx860_1b(mbx8xx_shared): + name = "powerpc/mbx860_1b" + + def build(self, c): + c.CFLAGS = ['-mcpu=860', '-Dmpc860', '-Dmbx860_001b', '-meabi', '-msdata', '-fno-common'] + + +class mbx860_002(mbx8xx_shared): + name = "powerpc/mbx860_002" + + def build(self, c): + c.CFLAGS = ['-mcpu=860', '-Dmpc860', '-Dmbx860_002', '-meabi', '-msdata', '-fno-common'] + + +class mbx821_002b(mbx8xx_shared): + name = "powerpc/mbx821_002b" + + def build(self, c): + c.CFLAGS = ['-mcpu=821', '-Dmpc821', '-Dmbx821_002b', '-meabi', '-msdata', '-fno-common'] + + +class mbx860_001b(mbx8xx_shared): + name = "powerpc/mbx860_001b" + + def build(self, c): + c.CFLAGS = ['-mcpu=860', '-Dmpc860', '-Dmbx860_001b', '-meabi', '-msdata', '-fno-common'] + + +class motorola_powerpc_shared(Base): + def header(self, c): + c.CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK = Default + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/shared/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '${RTEMS}/vectors_entry.o', '${RTEMS}/start.o', '-e', '__rtems_entry_point', '-u', '__vectors'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + + +class mvme2307(motorola_powerpc_shared): + name = "powerpc/mvme2307" + + def build(self, c): + c.CFLAGS = ['-mcpu=604', '-mmultiple', '-mstring', '-mstrict-align', '-meabi'] + + def header(self, c): + c.mpc8240 = True + +class mvme2100(motorola_powerpc_shared): + name = "powerpc/mvme2100" + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-Dppc603e'] + + def header(self, c): + c.mvme2100 = True + + + +class mtx603e(motorola_powerpc_shared): + name = "powerpc/mtx603e" + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-Dppc603e'] + + +class mcp750(motorola_powerpc_shared): + name = "powerpc/mcp750" + + def build(self, c): + c.CFLAGS = ['-mcpu=750', '-Dmpc750'] + + +class qemuprep(motorola_powerpc_shared): + name = "powerpc/qemuprep" + + def build(self, c): + c.CFLAGS = ['-mcpu=powerpc', '-mmultiple', '-mstring', '-mstrict-align', '-D__ppc_generic'] + + def header(self, c): + c.qemu = True + + +class qemuprep_altivec(motorola_powerpc_shared): + name = "powerpc/qemuprep-altivec" + + def build(self, c): + c.CFLAGS = ['-mcpu=7400', '-mmultiple', '-mstring', '-mstrict-align', '-D__ppc_generic'] + + def header(self, c): + c.qemu = True + + +class mpc55xxevb_shared(Base): + def header(self, c): + c.MPC55XX_BOOTFLAGS = Default + c.MPC55XX_CHIP_TYPE = 5554 + c.MPC55XX_CHIP_FAMILY = Default + c.MPC55XX_CLOCK_EMIOS_CHANNEL = "(MPC55XX_EMIOS_CHANNEL_NUMBER-1)" + c.MPC55XX_EMIOS_PRESCALER = Default + c.MPC55XX_ESCI_CONSOLE_MINOR = Default + c.MPC55XX_ESCI_USE_INTERRUPTS = Default + c.MPC55XX_FMPLL_CLK_OUT = 128000000 + c.MPC55XX_FMPLL_MFD = 12 + c.MPC55XX_FMPLL_PREDIV = Default + c.MPC55XX_FMPLL_REF_CLOCK = 8000000 + c.SMSC9218I_EDMA_RX_CHANNEL = Default + c.SMSC9218I_EDMA_TX_CHANNEL = Default + c.SMSC9218I_BIG_ENDIAN_SUPPORT = Default + c.SMSC9218I_ENABLE_LED_OUTPUTS = Default + c.SMSC9218I_RESET_PIN = Default + c.SMSC9218I_IRQ_PIN = Default + c.MPC55XX_SYSTEM_CLOCK_DIVIDER = Default + c.MPC55XX_FMPLL_ESYNCR1_CLKCFG = Default + c.MPC55XX_CONSOLE_MINOR = Default + c.BSP_DEFAULT_BAUD_RATE = Default + c.MPC55XX_EARLY_STACK_SIZE = Default + c.MPC55XX_REFERENCE_CLOCK = Default + + def build(self, c): + c.CFLAGS = ['-mcpu=8540', '-meabi', '-msdata', '-fno-common', '-msoft-float', '-D__ppc_generic', '-mstrict-align'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + + +class gwlcfm(mpc55xxevb_shared): + name = "powerpc/gwlcfm" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.gwlcfm', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + + def header(self, c): + c.MPC55XX_BOARD_GWLCFM = True + c.MPC55XX_CHIP_TYPE = 5516 + c.MPC55XX_EMIOS_PRESCALER = 66 + c.MPC55XX_FMPLL_CLK_OUT = 66000000 + c.MPC55XX_FMPLL_MFD = 99 + c.MPC55XX_FMPLL_PREDIV = 10 + c.MPC55XX_FMPLL_REF_CLOCK = 40000000 + c.RTEMS_BSP_I2C_EEPROM_DEVICE_NAME = "'\"eeprom\"'" + c.RTEMS_BSP_I2C_EEPROM_DEVICE_PATH = "'\"/dev/i2c1.eeprom\"'" + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_SYSTEM_CLOCK = 66000000 + + +class mpc5566evb(mpc55xxevb_shared): + name = "powerpc/mpc5566evb" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5566evb', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.MPC55XX_BOARD_MPC5566EVB = True + c.MPC55XX_CHIP_TYPE = 5566 + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_SYSTEM_CLOCK = Default + c.MPC55XX_REFERENCE_CLOCK = 40000000 + +class mpc5566evb_spe(mpc55xxevb_shared): + name = "powerpc/mpc5566evb_spe" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5566evb_spe', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5566evb', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674fevb', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 127 + c.MPC55XX_NULL_POINTER_PROTECTION = True + c.MPC55XX_CHIP_TYPE = 5566 + c.MPC55XX_BOARD_MPC5566EVB = True + c.MPC55XX_REFERENCE_CLOCK = 40000000 + + +class mpc5643l_dpu(mpc55xxevb_shared): + name = "powerpc/mpc5643l_dpu" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5643l_dpu', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5643l_evb', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 127 + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_EMIOS_PRESCALER = Disable + c.MPC55XX_CLOCK_EMIOS_CHANNEL = Disable + c.MPC55XX_CLOCK_PIT_CHANNEL = 3 + c.MPC55XX_CHIP_TYPE = 5643 + c.BSP_DATA_CACHE_ENABLED = False + +class mpc5643l_evb(mpc55xxevb_shared): + name = "powerpc/mpc5643l_evb" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5643l_evb', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 127 + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_EMIOS_PRESCALER = Disable + c.MPC55XX_CLOCK_EMIOS_CHANNEL = Disable + c.MPC55XX_CLOCK_PIT_CHANNEL = 3 + c.MPC55XX_CHIP_TYPE = 5643 + c.BSP_DATA_CACHE_ENABLED = False + + +class mpc5674f_ecu508_app(mpc55xxevb_shared): + name = "powerpc/mpc5674f_ecu508_app" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674f_ecu508_app', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674f_ecu508', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 255 + c.MPC55XX_CHIP_TYPE = 5674 + c.MPC55XX_CLOCK_EMIOS_CHANNEL = "31" + c.MPC55XX_FMPLL_MFD = 66 + c.MPC55XX_FMPLL_PREDIV = 5 + c.MPC55XX_NULL_POINTER_PROTECTION = True + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_SYSTEM_CLOCK = 264000000 + c.MPC55XX_SYSTEM_CLOCK_DIVIDER = 2 + c.MPC55XX_NEEDS_LOW_LEVEL_INIT = Default + c.BSP_DATA_CACHE_USE_WRITE_THROUGH = True + c.MPC55XX_BOARD_MPC5674F_ECU508 = True + c.MPC55XX_CONSOLE_MINOR = 2 + c.SMSC9218I_BIG_ENDIAN_SUPPORT = True + c.SMSC9218I_ENABLE_LED_OUTPUTS = True + c.SMSC9218I_IRQ_PIN = 450 + c.SMSC9218I_RESET_PIN = 433 + + +class mpc5674f_ecu508_boot(mpc55xxevb_shared): + name = "powerpc/mpc5674f_ecu508_boot" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674f_ecu508_boot', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674f_ecu508', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 255 + c.MPC55XX_CHIP_TYPE = 5674 + c.MPC55XX_CLOCK_EMIOS_CHANNEL = "31" + c.MPC55XX_FMPLL_MFD = 66 + c.MPC55XX_FMPLL_PREDIV = 5 + c.MPC55XX_NULL_POINTER_PROTECTION = True + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_SYSTEM_CLOCK = 264000000 + c.MPC55XX_SYSTEM_CLOCK_DIVIDER = 2 + c.BSP_DATA_CACHE_USE_WRITE_THROUGH = True + c.MPC55XX_BOARD_MPC5674F_ECU508 = True + c.MPC55XX_CONSOLE_MINOR = 2 + c.SMSC9218I_BIG_ENDIAN_SUPPORT = True + c.SMSC9218I_ENABLE_LED_OUTPUTS = True + c.SMSC9218I_IRQ_PIN = 450 + c.SMSC9218I_RESET_PIN = 433 + + + +class mpc5674f_rsm6(mpc55xxevb_shared): + name = "powerpc/mpc5674f_rsm6" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674f_rsm6', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674f_rsm6_base', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 255 + c.MPC55XX_CHIP_TYPE = 5674 + c.MPC55XX_CLOCK_EMIOS_CHANNEL = "31" + c.MPC55XX_FMPLL_MFD = 66 + c.MPC55XX_FMPLL_PREDIV = 5 + c.MPC55XX_NULL_POINTER_PROTECTION = True + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_SYSTEM_CLOCK = 264000000 + c.MPC55XX_SYSTEM_CLOCK_DIVIDER = 2 + c.MPC55XX_BOARD_MPC5674F_RSM6 = True + c.MPC55XX_ENABLE_START_PROLOGUE = True + c.MPC55XX_FMPLL_ESYNCR1_CLKCFG = 6 + + + +class mpc5674fevb(mpc55xxevb_shared): + name = "powerpc/mpc5674fevb" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674fevb', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 255 + c.MPC55XX_CHIP_TYPE = 5674 + c.MPC55XX_CLOCK_EMIOS_CHANNEL = "31" + c.MPC55XX_FMPLL_MFD = 66 + c.MPC55XX_FMPLL_PREDIV = 5 + c.MPC55XX_NULL_POINTER_PROTECTION = True + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_SYSTEM_CLOCK = 264000000 + c.MPC55XX_SYSTEM_CLOCK_DIVIDER = 2 + c.MPC55XX_BOARD_MPC5674FEVB = True + + +class mpc5674fevb_spe(mpc55xxevb_shared): + name = "powerpc/mpc5674fevb_spe" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674fevb_spe', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674fevb', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 255 + c.MPC55XX_CHIP_TYPE = 5674 + c.MPC55XX_CLOCK_EMIOS_CHANNEL = "31" + c.MPC55XX_FMPLL_MFD = 66 + c.MPC55XX_FMPLL_PREDIV = 5 + c.MPC55XX_NULL_POINTER_PROTECTION = True + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_SYSTEM_CLOCK = 264000000 + c.MPC55XX_SYSTEM_CLOCK_DIVIDER = 2 + c.MPC55XX_BOARD_MPC5674FEVB = True + + + +class phycore_mpc5554(mpc55xxevb_shared): + name = "powerpc/phycore_mpc5554" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.phycore_mpc5554', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.HAS_SMC91111 = True + c.SMC91111_ENADDR_IS_SETUP = True + c.MPC55XX_BOARD_PHYCORE_MPC5554 = True + + + +class mpc8260ads(Base): + name = "powerpc/mpc8260ads" + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-mstrict-align', '-Dmpc8260', '-meabi', '-msdata', '-fno-common'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc8260ads/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/start.o', '-e', 'start', '-u', '__vectors'] + c.LINK_END = ['ecrtn.o'] + + def header(self, c): + c.CONSOLE_MINOR = "SCC2_MINOR" + c.DISPATCH_HANDLER_STAT = True + c.PRINTK_MINOR = "SMC2_MINOR" + c.UARTS_IO_MODE = Default + c.UARTS_USE_TERMIOS = Default + + + +class mvme3100(Base): + name = "powerpc/mvme3100" + + def build(self, c): + c.CFLAGS = ['-mcpu=powerpc', '-msoft-float', '-D__ppc_generic'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/shared/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', + '-e', '__rtems_entry_point', '-u', '__vectors', + '${RTEMS}/preload.o', '${RTEMS}/vectors_entry.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + + def header(self, c): + c.CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK = Default + + + +class mvme5500(Base): + name = "powerpc/mvme5500" + + def build(self, c): + c.CFLAGS = ['-mcpu=7450', '-mtune=7450', '-Dmpc7455'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/shared/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', + '-e', '__rtems_entry_point', '-u', '__vectors', + '${RTEMS}/preload.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + c.ENABLE_NETWORKING = False # broken VPD.h header + + def header(self, c): + c.CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK = Default + + + +class psim(Base): + name = "powerpc/psim" + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-Dppc603e'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/psim/startup/linkcmds', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', + '${RTEMS}/start.o', '-e', '_start', '-u', '__vectors'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + + def header(self, c): + c.CLOCK_DRIVER_USE_FAST_IDLE = True + c.CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK = Default + c.PPC_USE_SPRG = False + c.PPC_VECTOR_FILE_BASE = "0xFFF00100" + + + +class qemuppc(Base): + name = "powerpc/qemuppc" + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-Dppc603e'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/qemuppc/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', + '${RTEMS}/start.o', '-e', '_start', '-u', '__vectors'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + + + +class qoriq_shared(Base): + name = "powerpc/qoriq" + + def build(self, c): + c.CFLAGS = ['-mcpu=8540', '-meabi', '-msdata', '-fno-common', '-mstrict-align', '-mspe', '-mabi=spe', '-mfloat-gprs=double', '-D__ppc_generic'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-u', '__vectors'] + + def header(self, c): + c.BSP_CONSOLE_BAUD = 115200 + c.BSP_DISABLE_UBOOT_WORK_AREA_CONFIG = Default + c.BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN = Default + c.BSP_USE_UART_INTERRUPTS = Default + c.HAS_UBOOT = True + c.QORIQ_CLOCK_TIMER = Default + c.QORIQ_ETSEC_1_PHY_ADDR = -1 + c.QORIQ_ETSEC_2_PHY_ADDR = Default + c.QORIQ_ETSEC_3_PHY_ADDR = Default + c.QORIQ_INITIAL_MSR = Default + c.QORIQ_INITIAL_SPEFSCR = Default + c.QORIQ_INTERCOM_AREA_BEGIN = Default + c.QORIQ_INTERCOM_AREA_SIZE = Default + c.QORIQ_UART_0_ENABLE = Default + c.QORIQ_UART_1_ENABLE = Default + c.QORIQ_UART_BRIDGE_0_ENABLE = Default + c.QORIQ_UART_BRIDGE_1_ENABLE = Default + c.QORIQ_UART_BRIDGE_MASTER_CORE = Default + c.QORIQ_UART_BRIDGE_SLAVE_CORE = Default + c.QORIQ_UART_BRIDGE_TASK_PRIORITY = 250 + + +class qoriq_core_0(qoriq_shared): + name = "powerpc/qoriq_core_0" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/qoriq/startup/linkcmds.qoriq_core_0', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + + def header(self, c): + c.QORIQ_UART_0_ENABLE = True + c.QORIQ_UART_1_ENABLE = True + c.QORIQ_UART_BRIDGE_1_ENABLE = Default + + +class qoriq_core_1(qoriq_shared): + name = "powerpc/qoriq_core_1" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/qoriq/startup/linkcmds.qoriq_core_1', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + + def header(self, c): + c.QORIQ_UART_BRIDGE_1_ENABLE = True + c.QORIQ_CLOCK_TIMER = 4 + + +class qoriq_p1020rdb(qoriq_shared): + name = "powerpc/qoriq_p1020rdb" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/qoriq/startup/linkcmds.qoriq_p1020rdb', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + + def header(self, c): + c.QORIQ_UART_0_ENABLE = True + c.QORIQ_UART_1_ENABLE = True + + +class score603e(Base): + name = "powerpc/score603e" + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-Dppc603e'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/score603e/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/start.o', '-e', '_start', '-u', '__vectors'] + c.LINK_END = ['ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + + def header(self, c): + c.CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK = Default + c.CONSOLE_USE_INTERRUPTS = Default + c.HAS_PMC_PSC8 = True + c.INITIALIZE_COM_PORTS = False + c.PPC_USE_SPRG = False + c.PPC_VECTOR_FILE_BASE = Default + c.SCORE603E_OPEN_FIRMWARE = Default + c.SCORE603E_USE_DINK = True + c.SCORE603E_USE_NONE = Default + c.SCORE603E_USE_SDS = Default + + + +class ss555(Base): + name = "powerpc/ss555" + + def build(self, c): + c.CFLAGS = ['-mcpu=505', '-Dmpc555'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/ss555/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '-u', '__vectors', '-N', '-u', 'start', '-e', 'start'] + c.LINK_END = ['ecrtn.o'] + + def header(self, c): + c.CONSOLE_MINOR = "SCI2_MINOR" + c.PRINTK_MINOR = "SCI2_MINOR" + c.UARTS_IO_MODE = Default + c.UARTS_USE_TERMIOS = Default + c.WATCHDOG_TIMEOUT = Default + + +class t32mppc(Base): + name = "powerpc/t32mppc" + + def build(self, c): + c.CFLAGS = ['-mcpu=8540', '-meabi', '-msdata', '-fno-common', '-msoft-float', '-D__ppc_generic'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/t32mppc/startup/linkcmds.t32mppc', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-dc', '-dp', '-u', '__vectors', '-N'] + + def header(self, c): + c.BSP_INSTRUCTION_CACHE_ENABLED = True + c.BSP_DATA_CACHE_ENABLED = True + + + +class tqm8xx_shared(Base): + def header(self, c): + c.BSP_USE_NETWORK_FEC = Default + c.BSP_USE_NETWORK_SCC = True + c.CONSOLE_CHN = "CONS_CHN_SMC1" + c.CONS_SCC1_MODE = Default + c.CONS_SCC2_MODE = Default + c.CONS_SCC3_MODE = Default + c.CONS_SCC4_MODE = Default + c.CONS_SMC1_MODE = Default + c.CONS_SMC2_MODE = Default + c.PRINTK_CHN = "CONS_CHN_SMC1" + c.SPI_BOARD_INIT_FNC = Default + c.SPI_SEND_ADDR_FNC = Default + c.SPI_SEND_STOP_FNC = Default + + def build(self, c): + c.CFLAGS = ['-mcpu=860', '-Dmpc860', '-mstrict-align', '-fno-strict-aliasing', + '-meabi', '-msdata', '-fno-common'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/tqm8xx/startup/linkcmds.tqm8xx', + 'src/lib/libbsp/powerpc/tqm8xx/startup/linkcmds.base'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', + '${RTEMS}/start.o', '-u', '__vectors'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + + +class pghplus(tqm8xx_shared): + name = "powerpc/pghplus" + + def header(self, c): + c.BSP_USE_NETWORK_FEC = True + c.BSP_USE_NETWORK_SCC = Default + c.CONS_SMC1_MODE = "CONS_MODE_IRQ" + c.SPI_BOARD_INIT_FNC = "bsp_pghplus_spi_init" + c.SPI_SEND_ADDR_FNC = "bsp_pghplus_spi_sel_addr" + c.SPI_SEND_STOP_FNC = "bsp_pghplus_spi_send_stop" + +class tqm8xx_stk8xx(tqm8xx_shared): + name = "powerpc/tqm8xx_stk8xx" + + def header(self, c): + c.CONS_SMC1_MODE = "CONS_MODE_POLLED" + c.CONS_SMC2_MODE = "CONS_MODE_POLLED" + + + +class virtex(Base): + name = "powerpc/virtex" + + def build(self, c): + c.CFLAGS = ['-mcpu=403', '-Dppc405'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/virtex/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '-u', '__vectors', '-u', 'download_entry'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + + def header(self, c): + c.PPC_USE_SPRG = Default + c.PPC_VECTOR_FILE_BASE = Default + c.RTEMS_XPARAMETERS_H = Default + c.RTEMS_XPPC_BASE = Default + + +class virtex4(Base): + name = "powerpc/virtex4" + + def build(self, c): + c.CFLAGS = ['-mcpu=405', '-Dppc405'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/virtex4/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-dc', '-dp', '-Bstatic', '-u', '__vectors', '-u', 'download_entry', '-N'] + + def header(self, c): + c.PPC_USE_DATA_CACHE = True + c.PPC_USE_SPRG = True + c.PPC_VECTOR_FILE_BASE = "0x0100" + + +class virtex5(Base): + name = "powerpc/virtex5" + + def build(self, c): + c.CFLAGS = ['-mcpu=440', '-Dppc440', '-msoft-float'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/virtex5/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-dc', '-dp', '-Bstatic', '-u', '__vectors', '-u', 'download_entry', '-N'] + + def header(self, c): + c.PPC_USE_DATA_CACHE = True + c.PPC_USE_SPRG = True + c.PPC_VECTOR_FILE_BASE = "0x0100" diff --git a/py/waf/defaults/bsp/sh.py b/py/waf/defaults/bsp/sh.py new file mode 100644 index 0000000000..ad919404cb --- /dev/null +++ b/py/waf/defaults/bsp/sh.py @@ -0,0 +1,87 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "sh" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['${RTEMS}/start.o', '-e', '_start'] + + +class gensh1(Base): + name = "sh/gensh1" + + def build(self, c): + c.CFLAGS = ['-m1'] + c.LINKCMDS = ['src/lib/libbsp/sh/gensh1/startup/linkcmds'] + + def header(self, c): + c.CPU_CLOCK_RATE_HZ = Default + c.START_HW_INIT = Default + + + +class gensh2(Base): + name = "sh/gensh2" + + def build(self, c): + c.CFLAGS = ['-m2'] + c.LINKCMDS = ['src/lib/libbsp/sh/gensh2/startup/linkcmds', + 'src/lib/libbsp/sh/gensh2/startup/linkcmds.ram', + 'src/lib/libbsp/sh/gensh2/startup/linkcmds.rom'] + + def header(self, c): + c.CPU_CLOCK_RATE_HZ = 29491200 + c.STANDALONE_EVB = Default + c.START_HW_INIT = Default + + + +class gensh4(Base): + name = "sh/gensh4" + + def build(self, c): + c.CFLAGS = ['-m4', '-ml'] + c.LDFLAGS = ['-m4', '-ml'] + c.LINKCMDS = ['src/lib/libbsp/sh/gensh4/startup/linkcmds', + 'src/lib/libbsp/sh/gensh4/startup/linkcmds.rom', + 'src/lib/libbsp/sh/gensh4/startup/linkcmds.rom2ram'] + c.LINK_LINK = ['-EL'] + + def header(self, c): + c.CPU_CLOCK_RATE_HZ = 29491200 + c.START_HW_INIT = Default + + +class shsim_shared(Base): + def header(self, c): + c.CPU_CLOCK_RATE_HZ = Default + c.START_HW_INIT = Default + + def build(self, c): + c.CFLAGS = ['-m1'] + c.LINKCMDS = ['src/lib/libbsp/sh/shsim/startup/linkcmds', + 'src/lib/libbsp/sh/shsim/startup/linkcmds.sim'] + + +class simsh1(shsim_shared): + name = "sh/simsh1" + + def build(self, c): + c.CFLAGS = ['-m1'] + + +class simsh2(shsim_shared): + name = "sh/simsh2" + + def build(self, c): + c.CFLAGS = ['-m2'] + + +class simsh4(shsim_shared): + name = "sh/simsh4" + + + +class simsh2e(shsim_shared): + name = "sh/simsh2e" diff --git a/py/waf/defaults/bsp/sparc.py b/py/waf/defaults/bsp/sparc.py new file mode 100644 index 0000000000..3d24fd70c9 --- /dev/null +++ b/py/waf/defaults/bsp/sparc.py @@ -0,0 +1,62 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "sparc" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o'] + c.LINK_END = ['crtend.o', 'crtn.o'] + + + +class erc32_shared(Base): + def build(self, c): + c.CFLAGS = ['-mcpu=cypress'] + c.LINKCMDS = ['src/lib/libbsp/sparc/erc32/startup/linkcmds', + 'src/lib/libbsp/sparc/shared/startup/linkcmds.base'] + + def header(self, c): + c.CONSOLE_USE_INTERRUPTS = False + c.ENABLE_SIS_QUIRKS = Default + c.SIMSPARC_FAST_IDLE = Default + + + +class erc32(erc32_shared): + name = "sparc/erc32" + + +class sis(erc32_shared): + name = "sparc/sis" + + def header(self, c): + c.ENABLE_SIS_QUIRKS = True + + + +class leon2(Base): + name = "sparc/leon2" + + def build(self, c): + c.CFLAGS = ['-mcpu=cypress'] + c.LINKCMDS = ['src/lib/libbsp/sparc/leon2/startup/linkcmds', + 'src/lib/libbsp/sparc/shared/startup/linkcmds.base'] + + def header(self, c): + c.CONSOLE_USE_INTERRUPTS = False + c.SIMSPARC_FAST_IDLE = Default + + +class leon3(Base): + name = "sparc/leon3" + + def build(self, c): + c.CFLAGS = ['-mcpu=cypress'] + c.LINKCMDS = ['src/lib/libbsp/sparc/leon3/startup/linkcmds.leon3', + 'src/lib/libbsp/sparc/shared/startup/linkcmds.base'] + + def header(self, c): + c.BSP_LEON3_SMP = Default + c.CONSOLE_USE_INTERRUPTS = False + c.SIMSPARC_FAST_IDLE = Default diff --git a/py/waf/defaults/bsp/sparc64.py b/py/waf/defaults/bsp/sparc64.py new file mode 100644 index 0000000000..73003200fb --- /dev/null +++ b/py/waf/defaults/bsp/sparc64.py @@ -0,0 +1,27 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "sparc64" + conflicts=("clang",) + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/sparc64/shared/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', 'crtbegin.o', '-e', '_start'] + c.LINK_END = ['crtend.o'] + + +class niagara(Base): + name = "sparc64/niagara" + + def build(self, c): + c.CFLAGS = ['-mcpu=niagara', '-DSUN4V'] + + +class usiii(Base): + name = "sparc64/usiii" + + def build(self, c): + c.CFLAGS = ['-mcpu=ultrasparc3', '-DUS3', '-DSUN4U'] + + def header(self, c): + c.SIMSPARC_FAST_IDLE = Default diff --git a/py/waf/defaults/bsp/v850.py b/py/waf/defaults/bsp/v850.py new file mode 100644 index 0000000000..8d1a22da31 --- /dev/null +++ b/py/waf/defaults/bsp/v850.py @@ -0,0 +1,70 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "v850" + conflicts=("clang",) + + + +class v850_shared(Base): + def build(self, c): + c.CFLAGS = ['-mtune=i386'] +# c.LDFLAGS = ['-Wl,-Ttext,0x00100000'] + c.LINKCMDS = ['src/lib/libbsp/v850/gdbv850sim/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', '-e', 'start'] +# c.LINK_END = ['crtend.o', 'crtn.o'] +# c.ENABLE_NETWORKING = True + +# def header(self, c): +# c.BSP_HAS_SMP = Default +# c.BSP_VIDEO_80x50 = Default +# c.CLOCK_DRIVER_USE_8254 = Default +# c.CLOCK_DRIVER_USE_TSC = Default +# c.IDE_USE_PRIMARY_INTERFACE = Default +# c.IDE_USE_SECONDARY_INTERFACE = Default +# c.USE_COM1_AS_CONSOLE = Default +# c.BSP_PRESS_KEY_FOR_RESET = True + + +class v850e1sim(v850_shared): + name = "v850/v850e1sim" + + def build(self, c): + c.CFLAGS = ["-mv850e1",] + + +class v850e2sim(v850_shared): + name = "v850/v850e2sim" + + def build(self, c): + c.CFLAGS = ["-mv850e2",] + + +class v850e2v3sim(v850_shared): + name = "v850/v850e2v3sim" + + def build(self, c): + c.CFLAGS = ["-mv850e2v3",] + + +class v850esim(v850_shared): + name = "v850/v850esim" + + def build(self, c): + c.CFLAGS = ["-mv850e",] + + +class v850essim(v850_shared): + name = "v850/v850essim" + + def build(self, c): + c.CFLAGS = ["-mv850es",] + + +class v850sim(v850_shared): + name = "v850/v850sim" + + def build(self, c): + c.CFLAGS = ["-mv850",] + + diff --git a/py/waf/defaults/options.py b/py/waf/defaults/options.py new file mode 100644 index 0000000000..7ea9dc7139 --- /dev/null +++ b/py/waf/defaults/options.py @@ -0,0 +1,2700 @@ +from rtems_waf.config.options import Boolean, Integer, String, StringList + + +class ALLOW_IRQ_NESTING(Boolean): + value = True + tag = ["build"] + undef = True + descr = "If set to !0, allow nested irq processing" + + +class ARM_CLK(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Arm clock in hz" + + +class BENCHMARK_IRQ_PROCESSING(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If set to !0, enable code to benchmark irq processing" + + +class BFIN_ON_SKYEYE(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined, disable features which are not supported on skyeye. + """ + + +class BSP(StringList): + value = [] + tag = ["general"] + undef = True + descr = "List of bsps to build, comma delimited." + + +class BSP_CONSOLE_BAUD(Integer): + value = 9600 + tag = ["general"] + undef = True + descr = "The default console baud rate." + + +class BSP_CPU_CLOCK_SPEED(Integer): + value = 0 + tag = ["general"] + undef = True + descr = "The cpu clock frequency." + + +class BSP_DATA_CACHE_ENABLED(Boolean): + value = True + tag = ["storage"] + undef = True + descr = "Enables the data cache, if defined to a value other than zero" + + +class BSP_DIRTY_MEMORY(Boolean): + value = False + tag = ["storage"] + undef = True + descr = """ +If defined, then the bsp framework will put a non-zero pattern into the rtems +workspace and C program heap. This should assist in finding code that assumes +memory starts set to zero. + """ + + +class BSP_DISABLE_UBOOT_WORK_AREA_CONFIG(Integer): + value = 1 + tag = ["general"] + undef = True + descr = "Disable u-boot work area configuration" + + +class BSP_GPIOPCR_INITMASK(String): + value = "0x330F0F77" + tag = ["general"] + undef = True + descr = """ +Defines the bits modified in the mpc5200 gpiopcr register during init. Must +match the hardware requirements + """ + + +class BSP_GPIOPCR_INITVAL(String): + value = "0x01050444" + tag = ["general"] + undef = True + descr = """ +Defines the bit values written in the mpc5200 gpiopcr register during init. +Must match the hardware requirements + """ + + +class BSP_HAS_RM52xx(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "This bsp has a rm52xx compatible cpu." + + +class BSP_HAS_SMP(Integer): + value = 1 + tag = ["build"] + undef = True + descr = """ +Always defined when on a pc386 to enable the pc386 support for determining +the cpu core number in an smp configuration. + """ + + +class BSP_HAS_TX49xx(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "This bsp has a rm52xx compatible cpu." + + +class BSP_HAS_USC320(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "This bsp has a v3 usc320 system controller chip." + + +class BSP_INSTRUCTION_CACHE_ENABLED(Boolean): + value = True + tag = ["storage"] + undef = True + descr = """ +Enables the instruction cache, if defined to a value other than zero + """ + + +class BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN(Integer): + value = 1 + tag = ["general"] + undef = True + descr = "Indicate that the interrupt stack is at the work area begin" + + +class BSP_LEON3_SMP(Integer): + value = 1 + tag = ["build"] + undef = True + descr = """ +Always defined when on a leon3 to enable the leon3 support for determining +the cpu core number in an smp configuration. + """ + + +class BSP_PRESS_KEY_FOR_RESET(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined, print a message and wait until pressed before resetting board when +application exits. + """ + + +class BSP_RESET_BOARD_AT_EXIT(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, reset the board when the application exits." + + +class BSP_SMALL_MEMORY(Boolean): + value = False + tag = ["storage"] + undef = True + descr = "Disable testsuite samples with high memory demands" + + +class BSP_START_RESET_VECTOR(String): + value = "" + tag = ["general"] + undef = True + descr = "Reset vector address for bsp start" + + +class BSP_UART_AVAIL_MASK(String): + value = "0x01" + tag = ["network"] + undef = True + descr = """ +Bit mask to specify the uarts (pscs), which should be enabled on this board. +Must match the hardware requirements. Psc1 corresponds to the lsb + """ + + +class BSP_USE_NETWORK_FEC(Boolean): + value = False + tag = ["network"] + undef = True + descr = """ +If defined, then the bsp will use the fast ethernet controller for 10/100mbit +networking and used as primary networking interface. + """ + + +class BSP_USE_NETWORK_SCC(Boolean): + value = False + tag = ["network"] + undef = True + descr = """ +If defined, then the bsp will use the serial communications controller (scc1) +for 10mbit networking. + """ + + +class BSP_USE_UART2(Boolean): + value = False + tag = ["network"] + undef = True + descr = "If defined, enables uart2." + + +class BSP_USE_UART_INTERRUPTS(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Enable usage of interrupts for the uart modules" + + +class BSP_VIDEO_80x50(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, set the vga display to 80x50." + + +class CC(String): + value = "" + tag = ["build"] + undef = True + descr = "C compiler command" + + +class CCAS(String): + value = "" + tag = ["build"] + undef = True + descr = "Assembler compiler command (defaults to CC)" + + +class CCASFLAGS(String): + value = "" + tag = ["build"] + undef = True + descr = "Assembler compiler flags (defaults to cflags)" + + +class CCLK(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Cpu clock in hz" + + +class CD2401_INT_LEVEL(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "Interrupt level for the cd2401 (when cd2401_io_mode == 1)." + + +class CD2401_IO_MODE(Integer): + value = 0 + tag = ["build"] + undef = True + descr = "0 for polled I/O, 1 for interrupt-driven." + + +class CD2401_USE_TERMIOS(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Enable using termios based console." + + +class CFLAGS(StringList): + value = [] + tag = ["build"] + undef = True + descr = "C compiler flags" + + +class CFLAGS_DEBUG(String): + value = "" + tag = ["build"] + undef = True + descr = "Debug compiler flags." + + +class CFLAGS_OPTIMISE(String): + value = "" + tag = ["build"] + undef = True + descr = "Compiler flags for optimisation" + + +class CLOCK_DRIVER_USE_8254(Integer): + value = 0 + tag = ["general"] + undef = True + descr = """ +If enabled, the clock driver will use the good old 8254 chip to report +microsecond-accuracy clock times. Enable it, if: - you have nanosecond +timing enabled (you do not have use_ticks_for_cpu_usage_statistics enabled) +- you do not have clock_driver_use_tsc enabled (use one, the other, or +neither) - you do not mind adding roughly 5 microseconds to each context +switch. + """ + + +class CLOCK_DRIVER_USE_8254CLOCK_DRIVER_USE_TSC(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If enabled, the clock driver will use the good old 8254 chip to report +microsecond-accuracy clock times. Enable it, if: 1, you have nanosecond timing +enabled (you do not have use_ticks_for_cpu_usage_statistics enabled) 2, you +do not have clock_driver_use_tsc enabled (use one, the other, or neither 3, +you do not mind adding roughly 5 microseconds to each context switch. + """ + + +class CLOCK_DRIVER_USE_FAST_IDLE(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +This sets a mode where the time runs as fast as possible when a clock isr +occurs while the idle thread is executing. This can significantly reduce +simulation times. + """ + + +class CLOCK_DRIVER_USE_TSC(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If enabled, the clock driver will use the tsc register available with pentium- +class cpus to report close to nanosecond-accuracy clock times. Enable it, if: +1, you have nanosecond timing enabled (you do not have +use_ticks_for_cpu_usage_statistics enabled 2, you do not have +clock_driver_use_8254 enabled (use one, the other, or neither 3, you have a +pentium which supports tsc (all intels, and probably all or most clones 4, you +do not have a variable-speed cpu clock. Note that some motherboard bios will +automatically vary clock speed for thermal control. Note also, however, that +really new pentium-class chips from intel and amd will maintain a constant- +rate tsc regardless. + """ + + +class CONFIG_CFLAGS(StringList): + value = [] + tag = ["build"] + undef = True + descr = "Default compiler flags for rtems-config" + + +class CONFIG_CONSOLE(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for console (uart 0)" + + +class CONFIG_FPSP(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined enables the motorola floating point support package (fpsp) + """ + + +class CONFIG_I2C_0(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for i2c 0" + + +class CONFIG_I2C_1(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for i2c 1" + + +class CONFIG_I2C_2(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for i2c 2" + + +class CONFIG_LDFLAGS(StringList): + value = [] + tag = ["build"] + undef = True + descr = "Default linker flags for rtems-config" + + +class CONFIG_LIBS(StringList): + value = [] + tag = ["build"] + undef = True + descr = "= Default libraries for rtems-config" + + +class CONFIG_U3CLK(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Clock configuration for uart 3" + + +class CONFIG_U4CLK(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Clock configuration for uart 4" + + +class CONFIG_U5CLK(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Clock configuration for uart 5" + + +class CONFIG_U6CLK(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Clock configuration for uart 6" + + +class CONFIG_UART_1(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for uart 1" + + +class CONFIG_UART_2(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for uart 2" + + +class CONFIG_UART_3(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for uart 3" + + +class CONFIG_UART_CLKMODE(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Clock mode configuration for uarts" + + +class CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK(Boolean): + value = True + tag = ["general"] + undef = True + descr = """ +If defined then the bsp may reduce the available memory size initially. This +can be useful for debugging (reduce the core size) or dynamic loading (std gcc +text offsets/Jumps are < +/-32m). Note that the policy can still be defined by +the application (see sbrk.C, bsp_sbrk_policy). By undefining +configure_malloc_bsp_supports_sbrk this feature is removed and a little memory +is saved. + """ + + +class CONS_SCC1_MODE(String): + value = "CONS_MODE_UNUSED" + tag = ["network"] + undef = True + descr = """ +(Bsp--scc1 uart if mode) must be defined if scc1 is used as a tty (uart) +channel. Set it to cons_mode_polled for polled operation, cons_mode_irq for +interrupt driven (spooled) operation. Set it to cons_mode_unused, if not used + """ + + +class CONS_SCC2_MODE(String): + value = "CONS_MODE_UNUSED" + tag = ["network"] + undef = True + descr = """ +(Bsp--scc2 uart if mode) must be defined if scc2 is used as a tty (uart) +channel. Set it to cons_mode_polled for polled operation, cons_mode_irq for +interrupt driven (spooled) operation. Set it to cons_mode_unused, if not used + """ + + +class CONS_SCC3_MODE(String): + value = "CONS_MODE_UNUSED" + tag = ["network"] + undef = True + descr = """ +(Bsp--scc3 uart if mode) must be defined if scc3 is used as a tty (uart) +channel. Set it to cons_mode_polled for polled operation, cons_mode_irq for +interrupt driven (spooled) operation. Set it to cons_mode_unused, if not used + """ + + +class CONS_SCC4_MODE(String): + value = "CONS_MODE_UNUSED" + tag = ["network"] + undef = True + descr = """ +(Bsp--scc4 uart if mode) must be defined if scc4 is used as a tty (uart) +channel. Set it to cons_mode_polled for polled operation, cons_mode_irq for +interrupt driven (spooled) operation. Set it to cons_mode_unused, if not used + """ + + +class CONS_SMC1_MODE(String): + value = "CONS_MODE_UNUSED" + tag = ["network"] + undef = True + descr = """ +(Bsp--smc1 uart if mode) must be defined if smc1 is used as a tty (uart) +channel. Set it to cons_mode_polled for polled operation, cons_mode_irq for +interrupt driven (spooled) operation. Set it to cons_mode_unused, if not +used]) + """ + + +class CONS_SMC2_MODE(String): + value = "CONS_MODE_UNUSED" + tag = ["network"] + undef = True + descr = """ +(Bsp--smc2 uart if mode) must be defined if smc2 is used as a tty (uart) +channel. Set it to cons_mode_polled for polled operation, cons_mode_irq for +interrupt driven (spooled) operation. Set it to cons_mode_unused, if not used + """ + + +class CONSOLE_BAUDRATE(Integer): + value = 9600 + tag = ["general"] + undef = True + descr = "The baudrate of the console uart." + + +class CONSOLE_CHN(String): + value = "CONS_CHN_SMC1" + tag = ["general"] + undef = True + descr = """ +Bsp--console driver) must be defined to be one of cons_chn_smc1, +cons_chn_smc2, cons_chn_scc1, cons_chn_scc2, cons_chn_scc3, or cons_chn_scc4. +Determines which device will be registered as /Dev/Console. + """ + + +class CONSOLE_MINOR(String): + value = "SMC1_MINOR" + tag = ["general"] + undef = True + descr = """ +Port to use for the rtems console: 0 - /Dev/Tty0, serial port 1/Console on the +mvme712m, 1 - /Dev/Tty1, serial port 2/Tty01 on the mvme712m, 2 - /Dev/Tty2, +serial port 3 on the mvme712m, 3 - /Dev/Tty3, serial port 4 on the mvme712m.]) + """ + + +class CONSOLE_MINOR_DUPLICATE(String): + value = "SMC2_MINOR" + tag = ["general"] + undef = True + descr = """ +Bsp--console driver) must be defined to be one of smc1_minor, smc2_minor, +scc2_minor, scc3_minor, or scc4_minor. Determines which device will be +registered as /Dev/Console. + """ + + +class CONSOLE_USE_INTERRUPTS(Boolean): + value = True + tag = ["general"] + undef = False + descr = """ +The erc32 console driver can operate in either polled or interrupt mode. Under +the simulator (especially when fast_uart is defined), polled seems to operate +better. It is common for a task to print a line (like the end of test message) +and then exit. In this case, the program returns control to the simulator +command line before the program has even queued the output to the uart. Thus +sis has no chance of getting the data out. + """ + + +class CPU_CLOCK_RATE_HZ(Integer): + value = 20000000 + tag = ["general"] + undef = True + descr = "Cpu clock rate in hz" + + +class DISABLE_MMU(Boolean): + value = False + tag = ["storage"] + undef = True + descr = "Disable mmu" + + +class DISABLE_READ_ONLY_PROTECTION(Boolean): + value = False + tag = ["storage"] + undef = True + descr = "Disable mmu protection of read-only sections" + + +class DISABLE_READ_WRITE_DATA_CACHE(Boolean): + value = False + tag = ["storage"] + undef = True + descr = "Disable cache for read-write data sections" + + +class DISPATCH_HANDLER_STAT(Boolean): + value = True + tag = ["build"] + undef = True + descr = "Used by irq/Irq.C" + + +class EMC_MICRON(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable micron configuration for emc" + + +class EMC_NUMONYX(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable numonyx configuration for emc" + + +class EMC_TEST(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable tests for emc" + + +class ENABLE(Boolean): + value = True + tag = ["general"] + undef = True + descr = "Whether a bsp is enabled or disabled for use." + + +class ENABLE_DEBUG(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Enable debug build." + + +class ENABLE_FPSP(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Motorola floating point support package (fpsp)" + + +class ENABLE_LCD(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, enable use of the sed1356 controller and LCD." + + +class ENABLE_MP(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Enable multiprocessing." + + +class ENABLE_MULTILIB(Boolean): + value = True + tag = ["general"] + undef = True + descr = "???" + + +class ENABLE_NETWORKING(Boolean): + value = True + tag = ["general"] + undef = True + descr = "Enable tcp/Ip stack." + + +class ENABLE_NEWLIB(Boolean): + value = True + tag = ["general"] + undef = True + descr = "???" + + +class ENABLE_POSIX(Boolean): + value = True + tag = ["general"] + undef = True + descr = "Enable posix." + + +class ENABLE_PTHREADS(Boolean): + value = True + tag = ["general"] + undef = True + descr = "Enable pthreads, requires posix." + + +class ENABLE_SERDBG(Boolean): + value = False + tag = ["general"] + undef = True + descr = "???" + + +class ENABLE_SHELL(Boolean): + value = True + tag = ["general"] + undef = True + descr = "???" + + +class ENABLE_SIS_QUIRKS(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined, then the sis simulator specific code in the bsp will be enabled. +In particular, sis requires special initialization not used on real erc32 + """ + + +class ENABLE_SMP(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Enable smp, available for i386/Sparc only." + + +class ENABLE_UMON(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, enable use of the umon console." + + +class ENABLE_UMON_CONSOLE(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, enable use of the micromonitor console device." + + +class ENABLE_USART0(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, enable use of the usart 0." + + +class ENABLE_USART1(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, enable use of the usart 1." + + +class ENABLE_USART2(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, enable use of the usart 2." + + +class ENABLE_USART3(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, enable use of the usart 3." + + +class ENABLE_WATCHDOG_RESET(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Bsp_reset() will use the watchdog to reset the chip" + + +class EPPCBUG_SMC1(Boolean): + value = True + tag = ["build"] + undef = True + descr = """ +If defined, smc1 is in use by eppc-bug. The console driver will not re- +initialize that port. + """ + + +class EPPCBUG_VECTORS(Boolean): + value = True + tag = ["build"] + undef = True + descr = """ +(Bsp--rtems) if defined, vectors branch to eppcbug, except the following: +0x500 (external interrupt), 0x900 (decrementer).]) + """ + + +class ETHERNET_RMII(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Enable rmii for ethernet" + + +class GEN83XX_ENABLE_INTERRUPT_NESTING(Boolean): + value = True + tag = ["build"] + undef = True + descr = "Enable interrupt nesting" + + +class HAS_DBUG(Integer): + value = 0 + tag = ["general"] + undef = True + descr = """ +If defined, we will not boot from reset, but from freescale dbug monitor. + """ + + +class HAS_LOW_LEVEL_INIT(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined, we will do all the low level init of the chip (like +bus/Memory...). + """ + + +class HAS_PMC_PSC8(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Whether has a psc8 pmc board attached to pmc slot" + + +class HAS_SMC91111(Boolean): + value = False + tag = ["network"] + undef = True + descr = "If defined the board has the smc91111 networking chip." + + +class HAS_UBOOT(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable u-boot startup" + + +class HAVE_SHSIM_IOMEM_PATCH(Boolean): + value = True + tag = ["build"] + undef = True + descr = """ +Whether support for functional iomem in shsim/Gdb shall be enabled + """ + + +class HCLK(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Ahb bus clock in hz" + + +class HEAP_EXTEND(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Enable heap extend by ethernet and usb regions" + + +class IDE_USE_PRIMARY_INTERFACE(Boolean): + value = True + tag = ["general"] + undef = True + descr = """ +Determines, whether rtems will try to use the primary ide interface. Disable +it, if: 1, you have no primary ide interface. 2, you have no disk attached to +this interface or 3, you do not want to access disks attached to this +interface. + """ + + +class IDE_USE_SECONDARY_INTERFACE(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +Determines, whether rtems will try to use the secondary ide interface. Enable +it, if: 1, you have a secondary ide interface 2, you have at least one disk +attached to this interface 3, you do want to access disks attached to this +interface. + """ + + +class INITIALIZE_COM_PORTS(Boolean): + value = False + tag = ["general"] + undef = True + descr = "???" + + +class INTERRUPT_USE_TABLE(Boolean): + value = True + tag = ["build"] + undef = True + descr = "Select if interrupt use table or link list" + + +class LDFLAGS(StringList): + value = [] + tag = ["build"] + undef = True + descr = """ +Linker flags only, do not use this for directories or libraries + """ + + +class LIBS(StringList): + value = [] + tag = ["build"] + undef = True + descr = "Libraries to pass to the linker, e.G. -L<library>" + + +class LINK_END(StringList): + value = [] + tag = ["build"] + undef = True + descr = "Objects linked last" + + +class LINK_START(StringList): + value = [] + tag = ["build"] + undef = True + descr = "Objects linked first" + + +class LINK_LINK(StringList): + value = ["-L${RTEMS} -T ${RTEMS}/linkcmds -dc -dp -N"] + tag = ["build"] + undef = True + descr = "Linker link flags" + + +class LINKCMDS(StringList): + value = [] + tag = ["build"] + undef = True + descr = "Linker command files, first one is installed as linkcmds" + + +class LPC24XX_CCLK(String): + value = "72000000U" + tag = ["general"] + undef = True + descr = "Cpu clock in hz" + + +class LPC24XX_CONFIG_CONSOLE(Integer): + value = 0 + tag = ["network"] + undef = True + descr = "Configuration for console (uart 0)" + + +class LPC24XX_CONFIG_I2C_0(Integer): + value = 0 + tag = ["network"] + undef = True + descr = "Configuration for i2c 0" + + +class LPC24XX_CONFIG_I2C_1(Integer): + value = 1 + tag = ["network"] + undef = True + descr = "Configuration for i2c 1" + + +class LPC24XX_CONFIG_I2C_2(String): + value = "" + tag = ["network"] + undef = True + descr = "Configuration for i2c 2" + + +class LPC24XX_CONFIG_UART_1(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Configuration for uart 1" + + +class LPC24XX_CONFIG_UART_2(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for uart 2" + + +class LPC24XX_CONFIG_UART_3(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for uart 3" + + +class LPC24XX_EMC_MICRON(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "Enable micron configuration for emc" + + +class LPC24XX_EMC_NUMONYX(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "Enable numonyx configuration for emc" + + +class LPC24XX_EMC_TEST(String): + value = "" + tag = ["general"] + undef = True + descr = "Enable tests for emc" + + +class LPC24XX_ETHERNET_RMII(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Enable rmii for ethernet" + + +class LPC24XX_HEAP_EXTEND(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Enable heap extend by ethernet and usb regions" + + +class LPC24XX_OSCILLATOR_MAIN(String): + value = "12000000U" + tag = ["general"] + undef = True + descr = "Main oscillator frequency in hz" + + +class LPC24XX_OSCILLATOR_RTC(String): + value = "32768U" + tag = ["general"] + undef = True + descr = "Rtc oscillator frequency in hz" + + +class LPC24XX_SPECIAL_TASK_STACKS_SUPPORT(Integer): + value = 1 + tag = ["general"] + undef = True + descr = """ +Enable special task stack support for task stacks in internal ram + """ + + +class LPC24XX_STOP_ETHERNET(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "Stop ethernet controller at start-up to avoid dma interference" + + +class LPC24XX_STOP_GPDMA(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "Stop general purpose dma at start-up to avoid dma interference" + + +class LPC24XX_STOP_USB(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "Stop usb controller at start-up to avoid dma interference" + + +class LPC24XX_UART_BAUD(String): + value = "115200U" + tag = ["general"] + undef = True + descr = "Baud for uarts" + + +class LPC32XX_ARM_CLK(String): + value = "208000000U" + tag = ["general"] + undef = True + descr = "Arm clock in hz" + + +class LPC32XX_CONFIG_U3CLK(String): + value = "" + tag = ["network"] + undef = True + descr = "Clock configuration for uart 3" + + +class LPC32XX_CONFIG_U4CLK(String): + value = "" + tag = ["network"] + undef = True + descr = "Clock configuration for uart 4" + + +class LPC32XX_CONFIG_U5CLK(String): + value = "0x00001386U" + tag = ["network"] + undef = True + descr = "Clock configuration for uart 5" + + +class LPC32XX_CONFIG_U6CLK(String): + value = "" + tag = ["network"] + undef = True + descr = "Clock configuration for uart 6" + + +class LPC32XX_CONFIG_UART_CLKMODE(String): + value = "0x00000200U" + tag = ["network"] + undef = True + descr = "Clock mode configuration for uarts" + + +class LPC32XX_DISABLE_MMU(Boolean): + value = False + tag = ["storage"] + undef = True + descr = "Disable mmu" + + +class LPC32XX_DISABLE_READ_ONLY_PROTECTION(Boolean): + value = False + tag = ["storage"] + undef = True + descr = "Disable mmu protection of read-only sections" + + +class LPC32XX_DISABLE_READ_WRITE_DATA_CACHE(Boolean): + value = False + tag = ["storage"] + undef = True + descr = "Disable cache for read-write data sections" + + +class LPC32XX_ENABLE_WATCHDOG_RESET(Boolean): + value = True + tag = ["general"] + undef = True + descr = "Enable watchdog reset" + + +class LPC32XX_ETHERNET_RMII(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Enable rmii for ethernet" + + +class LPC32XX_HCLK(String): + value = "104000000U" + tag = ["general"] + undef = True + descr = "Ahb bus clock in hz" + + +class LPC32XX_OSCILLATOR_MAIN(String): + value = "13000000U" + tag = ["general"] + undef = True + descr = "Main oscillator frequency in hz" + + +class LPC32XX_OSCILLATOR_RTC(String): + value = "32768U" + tag = ["general"] + undef = True + descr = "Rtc oscillator frequency in hz" + + +class LPC32XX_PERIPH_CLK(String): + value = "13000000U" + tag = ["geenral"] + undef = True + descr = "Peripheral clock in hz" + + +class LPC32XX_SCRATCH_AREA_SIZE(Integer): + value = 4096 + tag = ["general"] + undef = True + descr = "Size of scratch area" + + +class LPC32XX_STOP_ETHERNET(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Stop ethernet controller at start-up to avoid dma interference" + + +class LPC32XX_STOP_GPDMA(Boolean): + value = True + tag = ["general"] + undef = True + descr = "Stop general purpose dma at start-up to avoid dma interference" + + +class LPC32XX_STOP_USB(Boolean): + value = True + tag = ["general"] + undef = True + descr = "Stop usb controller at start-up to avoid dma interference" + + +class LPC32XX_UART_1_BAUD(String): + value = "" + tag = ["network"] + undef = True + descr = "Baud for uart 1" + + +class LPC32XX_UART_2_BAUD(String): + value = "" + tag = ["network"] + undef = True + descr = "Baud for uart 2" + + +class LPC32XX_UART_7_BAUD(String): + value = "" + tag = ["network"] + undef = True + descr = "Baud for uart 7" + + +class MPC5200_PSC_INDEX_FOR_GPS_MODULE(Integer): + value = 0 + tag = ["build"] + undef = True + descr = "Psc index for gps module, if defined results in '/Dev/Gps'" + + +class MPC55XX_BOARD_GWLCFM(Boolean): + value = True + tag = ["build"] + undef = True + descr = "If defined, use custom settings for gwlcfm board" + + +class MPC55XX_BOARD_MPC5566EVB(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for mpc5566evb board" + + +class MPC55XX_BOARD_MPC5674FEVB(Boolean): + value = True + tag = ["build"] + undef = True + descr = "If defined, use custom settings for mpc5674fevb board" + + +class MPC55XX_BOARD_PHYCORE_MPC5554(Boolean): + value = True + tag = ["build"] + undef = True + descr = "If defined, use custom settings for phycore mpc5554 board" + + +class MPC55XX_BOOTFLAGS(String): + value = "" + tag = ["build"] + undef = True + descr = """ +If defined, builds in bootflags above the rchw for setup in a debugger to +avoid startup mmu setup + """ + + +class MPC55XX_CHIP_TYPE(Integer): + value = 5554 + tag = ["build"] + undef = True + descr = "Specifies the chip type in use (e.G. 5554 for mpc5554" + + +class MPC55XX_CLOCK_EMIOS_CHANNEL(String): + value = "MPC55XX_EMIOS_CHANNEL_NUMBER-1" + tag = ["build"] + undef = True + descr = """ +Define to the emios channel to use for the bsp clock. The default is the last +channel. + """ + + +class MPC55XX_EMIOS_PRESCALER(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "Must be defined to set the emios prescaler" + + +class MPC55XX_ESCI_CONSOLE_MINOR(Integer): + value = 0 + tag = ["general"] + undef = True + descr = """ +Determines which esci device will be registered as /Dev/Console + """ + + +class MPC55XX_ESCI_USE_INTERRUPTS(Boolean): + value = True + tag = ["build"] + undef = True + descr = """ +Define to zero or one to disable or enable interrupts for the esci devices + """ + + +class MPC55XX_FMPLL_CLK_OUT(Integer): + value = 128000000 + tag = ["general"] + undef = True + descr = """ +Must be defined to be the pll output clock (in hz) for clock generation + """ + + +class MPC55XX_FMPLL_MFD(Integer): + value = 12 + tag = ["general"] + undef = True + descr = """ +Must be defined to be the pll multiplication factor for clock generation + """ + + +class MPC55XX_FMPLL_PREDIV(Integer): + value = 1 + tag = ["general"] + undef = True + descr = """ +Must be defined to be the pll predivider factor for clock generation + """ + + +class MPC55XX_FMPLL_REF_CLOCK(Integer): + value = 8000000 + tag = ["general"] + undef = True + descr = """ +Must be defined to be the external reference clock (in hz) for clock +generation + """ + + +class NVRAM_CONFIGURE(Boolean): + value = True + tag = ["storage"] + undef = True + descr = """ +Define to 1 if you want the console driver, network driver and caches +configured at boot time from parameters stored in nvram. If set to 1, most +parameters below are ignored during the build. If not set to 1, then the +console driver is configured at build time, the network host information is +obtained from application supplied data structures, and the caches are +configured at boot time based on the information supplied in this file. + """ + + +class ON_SIMULATOR(Boolean): + value = False + tag = ["build"] + undef = True + descr = """ +If defined, this indicates the bsp is being built to run on the lm32 simulator +in gdb. This enables fast idle support which speeds up the clock ticks while +the idle task is running so time spent in the idle task is minimized. This +significantly reduces the wall time required to execute the rtems test suites. +It also enables a special exit and alternate printk support. + """ + + +class ON_SKYEYE(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined, enable options which optimize executingon the skyeye simulator. +Speed up the clock ticks while the idle task is running so time spent in the +idle task is minimized. This significantly reduces the wall time required to +execute the rtems test suites. + """ + + +class OSCILLATOR_MAIN(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Main oscillator frequency in hz" + + +class OSCILLATOR_RTC(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Rtc oscillator frequency in hz" + + +class PATH_TOOLS(String): + value = "" + tag = ["general"] + undef = True + descr = "Location of rtems tools." + + +class PERIPH_CLK(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Peripheral clock in hz" + + +class PPC_USE_SPRG(Boolean): + value = True + tag = ["build"] + undef = True + descr = """ +If defined, then the powerpc specific code in rtems will use some of the +special purpose registers to slightly optimize interrupt response time. The +use of these registers can conflict with other tools like debuggers. + """ + + +class PPC_VECTOR_FILE_BASE(String): + value = "0x0100" + tag = ["build"] + undef = True + descr = """ +This defines the base address of the exception table. Note: vectors are +actually at 0xfff00000 but file starts at offset. + """ + + +class PREFIX(String): + value = "" + tag = ["general"] + undef = True + descr = "Install prefix." + + +class PRINTK_CHN(String): + value = "NOT_DEFINED_IN_BSP" + tag = ["general"] + undef = True + descr = """ +(Bsp--console driver) must be defined to be one of cons_chn_smc1, +cons_chn_smc2, cons_chn_scc2, cons_chn_scc3, or cons_chn_scc4. Determines +which device is used for output y printk(). If the port that printk() uses is +also used for other I/O (e.G. If printk_chn == console_chn), then both ports +should use the same type of I/O, otherwise the drivers will likely conflict +with each other. + """ + + +class PRINTK_IO_MODE(Integer): + value = 0 + tag = ["general"] + undef = True + descr = """ +(Bsp--console driver) define to 0 or 1 if you want polled I/O performed by +rtems. Define to 2 if you want polled I/O performed by eppcbug. The printk() +port is not configured to use termios. With eppcbug 1.1, if mode 2 is +selected, printk_minor must be set to smc1_minor. This is a deficiency of the +firmware: it does not perform serial I/O on any port other than its default +debug port, which must be smc1. Printk always uses polled output. + """ + + +class PRINTK_MINOR(String): + value = "NOT_DEFINED_IN_BSP" + tag = ["general"] + undef = True + descr = """ +Port to use for the rtems console: 0 - /Dev/Tty0, serial port 1/Console on the +mvme712m, 1 - /Dev/Tty1, serial port 2/Tty01 on the mvme712m, 2 - /Dev/Tty2, +serial port 3 on the mvme712m, 3 - /Dev/Tty3, serial port 4 on the mvme712m.]) + """ + + +class PRINTK_MINOR_DUPLICATE(String): + value = "SMC2_MINOR" + tag = ["general"] + undef = True + descr = """ +(Bsp--console driver) must be defined to be one of smc1_minor, smc2_minor, +scc2_minor, scc3_minor, or scc4_minor. Determines which device is used for +output by printk(). If the port that printk() uses is also used for other I/O +(e.G. If printk_minor == \$console_minor), then both ports should use the +same type of I/O, otherwise the drivers will likely conflict with each other. + """ + + +class QORIQ_CLOCK_TIMER(Integer): + value = 0 + tag = ["general"] + undef = True + descr = """ +Global timer used for system clock, 0..3 maps to a0..a3, and 4..7 maps to +b0..b3 + """ + + +class QORIQ_ETSEC_1_PHY_ADDR(Integer): + value = -1 + tag = ["general"] + undef = True + descr = "Phy address for etsec interface 1" + + +class QORIQ_ETSEC_2_PHY_ADDR(Integer): + value = 0 + tag = ["general"] + undef = True + descr = "Phy address for etsec interface 2" + + +class QORIQ_ETSEC_3_PHY_ADDR(Integer): + value = 1 + tag = ["general"] + undef = True + descr = "Phy address for etsec interface 3" + + +class QORIQ_INITIAL_MSR(String): + value = "0x02000200" + tag = ["general"] + undef = True + descr = "Initial msr value" + + +class QORIQ_INITIAL_SPEFSCR(String): + value = "0x00000000" + tag = ["general"] + undef = True + descr = "Initial spefscr value" + + +class QORIQ_INTERCOM_AREA_BEGIN(String): + value = "0x3000000" + tag = ["build"] + undef = True + descr = "Inter-processor communication area begin" + + +class QORIQ_INTERCOM_AREA_SIZE(String): + value = "0x1000000" + tag = ["build"] + undef = True + descr = "Inter-processor communication area size" + + +class QORIQ_UART_0_ENABLE(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Use 1 to enable uart 0, otherwise use 0" + + +class QORIQ_UART_1_ENABLE(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Use 1 to enable uart 1, otherwise use 0" + + +class QORIQ_UART_BRIDGE_0_ENABLE(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Use 1 to enable uart 0 to intercom bridge, otherwise use 0" + + +class QORIQ_UART_BRIDGE_1_ENABLE(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Use 1 to enable uart 1 to intercom bridge, otherwise use 0" + + +class QORIQ_UART_BRIDGE_MASTER_CORE(Integer): + value = 0 + tag = ["network"] + undef = True + descr = "Uart to intercom bridge master core index" + + +class QORIQ_UART_BRIDGE_SLAVE_CORE(Integer): + value = 1 + tag = ["network"] + undef = True + descr = "Uart to intercom bridge slave core index" + + +class QORIQ_UART_BRIDGE_TASK_PRIORITY(Integer): + value = 250 + tag = ["network"] + undef = True + descr = "Uart to intercom bridge task priority" + + +class RTEMS_BSP_I2C_EEPROM_DEVICE_NAME(String): + value = "eeprom" + tag = ["storage"] + undef = True + descr = "Eeprom name for libi2c" + + +class RTEMS_BSP_I2C_EEPROM_DEVICE_PATH(String): + value = "/dev/i2c1.eeprom" + tag = ["storage"] + undef = True + descr = "Eeprom device file path" + + +class RTEMS_XPARAMETERS_H(String): + value = "<xparameters_dflt.h>" + tag = ["general"] + undef = True + descr = """ +This defines the location of the hardware specific xparameters.H + """ + + +class RTEMS_XPPC_BASE(String): + value = "." + tag = ["build"] + undef = True + descr = "Defines path to xilinx xps ppc libraries." + + +class SCORE603E_OPEN_FIRMWARE(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Use open firmware rom monitor" + + +class SCORE603E_USE_DINK(Boolean): + value = False + tag = ["build"] + undef = True + descr = "???" + + +class SCORE603E_USE_NONE(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Use no rom monitor" + + +class SCORE603E_USE_SDS(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Use sds rom monitor" + + +class SCRATCH_AREA_SIZE(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Size of scratch area" + + +class SIMSPARC_FAST_IDLE(Boolean): + value = False + tag = ["build"] + undef = True + descr = """ +If defined, speed up the clock ticks while the idle task is running so time +spent in the idle task is minimized. This significantly reduces the wall time +required to execute the rtems test suites. + """ + + +class SINGLE_CHAR_MODE(String): + value = "" + tag = ["general"] + undef = True + descr = "Enable single character mode for the psc console driver" + + +class SMC91111_ENADDR_IS_SETUP(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined the smc91111 chip has the ethernet address loaded at reset. + """ + + +class SPECIAL_TASK_STACKS_SUPPORT(Boolean): + value = False + tag = ["build"] + undef = True + descr = """ +Enable special task stack support for task stacks in internal ram. + """ + + +class SPI_BOARD_INIT_FNC(String): + value = "bsp_dummy_spi_init" + tag = ["build"] + undef = True + descr = """ +(Bsp--spi board init function) specify the function that inits the board port +lines and further devices. + """ + + +class SPI_SEND_ADDR_FNC(String): + value = "bsp_dummy_spi_sel_addr" + tag = ["build"] + undef = True + descr = """ +Bsp--spi send address function) specify the function that addresses spi +devices. Set to bsp_dummy_spi_sel_addr for dummy implementation + """ + + +class SPI_SEND_STOP_FNC(String): + value = "bsp_dummy_spi_send_stop" + tag = ["build"] + undef = True + descr = """ +Bsp--spi send stop function) specify the function that deaddresses spi +devices. Set to bsp_dummy_spi_send_stop for dummy implementation + """ + + +class STANDALONE_EVB(String): + value = "" + tag = ["general"] + undef = True + descr = """ +If defined, compiles code to jump-start from flash, without a monitor + """ + + +class START_HW_INIT(String): + value = "" + tag = ["build"] + undef = True + descr = """ +If defined, selects whether 'early_hw_init()' is called from 'start.S'; +'bsp_hw_init()' is always called from 'bspstart.C' + """ + + +class STOP_ETHERNET(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Stop ethernet controller at start-up to avoid dma interference" + + +class STOP_GPDMA(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Stop general purpose dma at start-up to avoid dma interference" + + +class STOP_USB(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Stop usb controller at start-up to avoid dma interference" + + +class TESTS_USE_PRINTK(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Tests use printk() for output" + + +class UART_1_BAUD(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Baud for uart 1" + + +class UART_2_BAUD(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Baud for uart 2" + + +class UART_7_BAUD(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Baud for uart 7" + + +class UART_BAUD(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Baud for uarts" + + +class UART_USE_DMA(Boolean): + value = True + tag = ["network"] + undef = True + descr = """ +The uart driver can operate in dma mode with interrupts. Set true if dma +operation is required + """ + + +class UARTS_IO_MODE(Integer): + value = 0 + tag = ["network"] + undef = True + descr = """ +Define to 0 or 1 if you want polled I/O performed by rtems. Define to 1 if +you want interrupt-driven performed by rtems. Define to 2 if you want polled +I/O performed by eppcbug. There is no provision to have a MIX of interrupt- +driven and polled I/O ports, except that the printk port may use a different +mode from the other ports. If this is done, do not open the printk port from +an rtems application. With eppcbug 1.1, if mode 2 is selected, console_minor +must be set to smc1_minor. This is a deficiency of the firmware: it does not +perform serial I/O on any port other than its default debug port, which must +be smc1. + """ + + +class UARTS_USE_TERMIOS(Boolean): + value = False + tag = ["network"] + undef = True + descr = """ +Define to 1 if you want termios support for every port. Termios support is +independent of the choice of uart I/O mode. + """ + + +class UARTS_USE_TERMIOS_INT(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Enable interrupt support for the psc console driver" + + +class USE_COM1_AS_CONSOLE(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +Determines, whether the console will be associated with the standard vga +display or with the com1 serial port. Currently only the vga display and com1 +support printk. + """ + + +class WATCHDOG_TIMEOUT(String): + value = "0xFFFF" + tag = ["general"] + undef = True + descr = """ +Define to the desired timeout (in steps of 1/20 msec) to enable the watchdog. +Default is to disable the watchdog entirely. + """ + + +# These are all hacks, they only exist to enable shared BSPS, they are not +# required and will be removed in the future. + +class BOARD_PHYCORE_MPC5554(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined, use custom settings for the phytec phycore mpc5554 som + """ + + +class BSP_TYPE_DP2(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Enable settings for dp2" + + +class csb637(Boolean): + value = False + tag = ["build"] + undef = True + descr = """ +If defined, this indicates that the bsp is being built for the csb637 +variant. + """ + + +class GEN68360(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the gen68360 bsp." + + +class GEN68360_040(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the gen68360_040 bsp." + + +class HSC_CM01(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the hsc_cm01 bsp." + + +class M5484FIREENGINE(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the m5484fireengine bsp." + + +class mpc8240(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Defined for boards with mpc8240 -- undefined for others" + + +class MPC8313ERDB(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the mpc8313erdb bsp." + + +class MPC8349(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the mpc8349 libcpu family." + + +class MPC8349EAMDS(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the mpc8349eamds bsp." + + +class mvme167(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Defined for mvme167 -- undefined for others" + + +class mvme2100(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Defined for mvme2100 -- undefined for others" + + +class PGH360(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the pgh360 bsp." + + +class qemu(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Defined for qemu bsp -- undefined for others" + + +class MPC5200_BOARD_BRS5L(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable settings for powerpc MPC5200 BRS5L" + +class MPC5200_BOARD_BRS6L(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable settings for powerpc MPC5200 BRS6l" + +class MPC5200_BOARD_DP2(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable settings for powerpc MPC5200 dp2" + +class MPC5200_BOARD_ICECUBE(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable settings for powerpc MPC5200 icecube" + +class MPC5200_BOARD_PM520_CR825(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable settings for powerpc MPC5200 PM520_CR825" + +class MPC5200_BOARD_PM520_ZE30(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable settings for powerpc MPC5200 pm520" + + +# RTEMS internal options. +class USE_CLANG(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Use Clang compiler." + +class USE_GCC(Boolean): + value = True + tag = ["build"] + undef = True + descr = "Use GCC compiler.." + + + + +# THESE ARE UNSORTED! + + +class LPC24XX_PCLKDIV(String): + value = "1U" + tag = ["general"] + undef = True + descr = "clock divider for default PCLK (PCLK = CCLK / PCLKDIV)" + + +class LPC24XX_EMCCLKDIV(String): + value = "2U" + tag = ["general"] + undef = True + descr = "clock divider for EMCCLK (EMCCLK = CCLK / EMCCLKDIV)" + + +class LPC24XX_EMC_MT48LC4M16A2(Boolean): + value = False + tag = ["general"] + undef = True + descr = "enable Micron MT48LC4M16A2 configuration for EMC" + + +class LPC24XX_EMC_W9825G2JB75I(Boolean): + value = True + tag = ["general"] + undef = True + descr = "enable Winbond W9825G2JB75I configuration for EMC" + + +class LPC24XX_EMC_IS42S32800D7(Boolean): + value = True + tag = ["general"] + undef = True + descr = "enable ISSI IS42S32800D7 configuration for EMC" + + +class LPC24XX_EMC_IS42S32800B(Boolean): + value = True + tag = ["general"] + undef = True + descr = "enable ISSI IS42S32800B configuration for EMC" + + +class LPC24XX_EMC_M29W160E(Boolean): + value = True + tag = ["general"] + undef = True + descr = "enable M29W160E configuration for EMC" + + +class LPC24XX_EMC_M29W320E70(Boolean): + value = False + tag = ["general"] + undef = True + descr = "enable M29W320E70 configuration for EMC" + + +class LPC24XX_EMC_SST39VF3201(Boolean): + value = True + tag = ["general"] + undef = True + descr = "enable SST39VF3201 configuration for EMC" + + +class LPC_DMA_CHANNEL_COUNT(Integer): + value = 2 + tag = ["general"] + undef = True + descr = "DMA channel count" + + +class BSP_USB_OTG_TRANSCEIVER_I2C_ADDR(String): + value = "" + tag = ["general"] + undef = True + descr = "USB OTG transceiver I2C address used by USB stack" + + +class MPC55XX_CHIP_FAMILY(String): + value = "(MPC55XX_CHIP_TYPE / 10)" + tag = ["general"] + undef = True + descr = "specifies the chip family in use (e.g. 555 for MPC5554)" + + +class SMSC9218I_EDMA_RX_CHANNEL(Integer): + value = 49 + tag = ["network"] + undef = True + descr = "receive eDMA channel for SMSC9218I network interface" + +class SMSC9218I_EDMA_TX_CHANNEL(Integer): + value = 48 + tag = ["network"] + undef = True + descr = "transmit eDMA channel for SMSC9218I network interface" + + +class SMSC9218I_BIG_ENDIAN_SUPPORT(Boolean): + value = True + tag = ["network"] + undef = True + descr = "enable big endian support for SMSC9218I network interface" + + +class SMSC9218I_ENABLE_LED_OUTPUTS(Boolean): + value = True + tag = ["network"] + undef = True + descr = "enable LED outputs for SMSC9218I network interface" + + +class SMSC9218I_RESET_PIN(Integer): + value = 186 + tag = ["network"] + undef = True + descr = "reset pin for SMSC9218I network interface" + + +class SMSC9218I_IRQ_PIN(Integer): + value = 193 + tag = ["network"] + undef = True + descr = "IRQ pin for SMSC9218I network interface" + + +class MPC55XX_SYSTEM_CLOCK_DIVIDER(Integer): + value = 1 + tag = ["general"] + undef = True + descr = "system clock divider" + + +class MPC55XX_REFERENCE_CLOCK(Integer): + value = 8000000 + tag = ["general"] + undef = True + descr = "Must be defined to be the external reference clock (in Hz) for clock generation" + + +class MPC55XX_SYSTEM_CLOCK(Integer): + value = 8000000 + tag = ["general"] + undef = True + descr = "The system clock frequency in Hz." + + +class MPC55XX_FMPLL_ESYNCR1_CLKCFG(Integer): + value = 7 + tag = ["general"] + undef = True + descr = "the FMPLL ESYNCR1[CLKCFG] value" + +class MPC83XX_BOARD_HSC_CM01(Boolean): + value = True + tag = ["build"] + undef = True + descr = "if defined, then use settings for the HSC_CM01 board" + + + + + + +class LM3S69XX_ENABLE_UART_0(Boolean): + value = True + tag = ["network"] + undef = True + descr = "enable UART 0" + + +class LM3S69XX_ENABLE_UART_1(Boolean): + value = True + tag = ["network"] + undef = True + descr = "enable UART 1" + + +class LM3S69XX_ENABLE_UART_2(Boolean): + value = True + tag = ["network"] + undef = True + descr = "enable UART 2" + + +class LM3S69XX_HAS_UDMA(Boolean): + value = False + tag = ["general"] + undef = True + descr = "defined if MCU supports UDMA" + + +class LM3S69XX_MCU_LM3S3749(Boolean): + value = False + tag = ["build"] + undef = True + descr = "board has LM3S3749 MCU" + + +class LM3S69XX_MCU_LM3S6965(Boolean): + value = False + tag = ["build"] + undef = True + descr = "board has LM3S6965 MCU" + + +class LM3S69XX_NUM_GPIO_BLOCKS(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "number of GPIO blocks supported by MCU" + + +class LM3S69XX_NUM_SSI_BLOCKS(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "number of SSI blocks supported by MCU" + + +class LM3S69XX_SSI_CLOCK(String): + value = "1000000U" + tag = ["general"] + undef = True + descr = "SSI clock in Hz" + + +class LM3S69XX_SYSTEM_CLOCK(String): + value = "50000000U" + tag = ["general"] + undef = True + descr = "system clock in Hz" + + +class LM3S69XX_UART_BAUD(String): + value = "115200U" + tag = ["general"] + undef = True + descr = "baud for UARTs" + + +class LM3S69XX_USE_AHB_FOR_GPIO(Boolean): + value = False + tag = ["general"] + undef = True + descr = "use AHB apperture to access GPIO registers" + + +class LM3S69XX_XTAL_CONFIG(String): + value = "0x10" + tag = ["build"] + undef = True + descr = "crystal configuration for RCC register" + + +class BSP_ARM_A9MPCORE_PERIPHCLK(String): + value = "100000000U" + tag = ["build"] + undef = True + descr = "ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz" + + + +class STM32F4_HSE_OSCILLATOR(Integer): + value = 8000000 + tag = ["build"] + undef = True + descr = "HSE oscillator frequency in Hz" + + + +class STM32F4_SYSCLK(Integer): + value = 16000000 + tag = ["general"] + undef = True + descr = "SYSCLK frequency in Hz" + + + +class STM32F4_HCLK(Integer): + value = 16000000 + tag = ["general"] + undef = True + descr = "HCLK frequency in Hz" + + + +class STM32F4_PCLK1(Integer): + value = 16000000 + tag = ["general"] + undef = True + descr = "PCLK1 frequency in Hz" + + + +class STM32F4_PCLK2(Integer): + value = 16000000 + tag = ["general"] + undef = True + descr = "PCLK2 frequency in Hz" + + + +class STM32F4_USART_BAUD(Integer): + value = 115200 + tag = ["network"] + undef = True + descr = "baud for USARTs" + + + +class STM32F4_ENABLE_USART_1(Boolean): + value = False + tag = ["network"] + undef = True + descr = "enable USART 1" + + +class STM32F4_ENABLE_USART_2(Boolean): + value = False + tag = ["network"] + undef = True + descr = "enable USART 2" + + +class STM32F4_ENABLE_USART_3(Boolean): + value = True + tag = ["network"] + undef = True + descr = "enable USART 3" + + +class STM32F4_ENABLE_UART_4(Boolean): + value = False + tag = ["network"] + undef = True + descr = "enable UART 4" + + +class STM32F4_ENABLE_UART_5(Boolean): + value = False + tag = ["network"] + undef = True + descr = "enable UART 5" + + +class STM32F4_ENABLE_USART_6(Boolean): + value = False + tag = ["network"] + undef = True + descr = "enable USART 6" + + +class MPC83XX_BOARD_BR_UID(Boolean): + value = True + tag = ["general"] + undef = True + descr = "if defined, then use settings for the BR UID board" + + +class MPC83XX_NETWORK_INTERFACE_0_PHY_ADDR(String): + value = "0x11" + tag = ["build"] + undef = True + quote = False + descr = "PHY address of network interface 0" + + +class MPC83XX_CHIP_TYPE(Integer): + value = 0 + tag = ["build"] + undef = True + descr = "chip type of the MPC83XX family" + + +class MPC83XX_HAS_NAND_LP_FLASH_ON_CS0(Boolean): + value = True + tag = ["build"] + undef = True + descr = "indicates if the board has a NAND large page flash on chip select 0" + + +class BSP_INTERRUPT_HANDLER_TABLE_SIZE(Integer): + no_default = True + undef = True + descr = "defines the maximum number of interrupt handlers" + tag = ["general"] + +class MPC55XX_NULL_POINTER_PROTECTION(Boolean): + value = True + tag = ["build"] + undef = True + descr = "enable NULL pointer protection" + + +class MPC55XX_CLOCK_PIT_CHANNEL(Integer): + no_default = True + undef = True + descr = "selects the PIT channel for the RTEMS system tick (the default is the last channel" + tag = ["build"] + +class MPC55XX_NEEDS_LOW_LEVEL_INIT(Boolean): + value = True + tag = ["build"] + undef = True + descr = "if defined, do low level initialization" + + +class BSP_DATA_CACHE_USE_WRITE_THROUGH(Boolean): + no_default = True + undef = True + descr = "use write-through for data cache" + tag = ["storage"] + +class MPC55XX_BOARD_MPC5674F_ECU508(Boolean): + value = True + tag = ["build"] + undef = True + descr = "if defined, use custom settings for ECU508 board" + + +class MPC55XX_CONSOLE_MINOR(Integer): + value = 0 + tag = ["build"] + undef = True + descr = "determines which serial device will be registered as /dev/console" + + +class MPC55XX_BOARD_MPC5674F_RSM6(Boolean): + value = True + tag = ["build"] + quote = False + undef = True + descr = "if defined, use custom settings for RSM6 board" + + +class MPC55XX_ENABLE_START_PROLOGUE(Boolean): + value = True + tag = ["build"] + undef = True + descr = "if defined, enable start prologue" + + +class BSP_DEFAULT_BAUD_RATE(Integer): + value = 115200 + tag = ["general"] + undef = True + descr = "default console baud" + + +class MPC55XX_EARLY_STACK_SIZE(Integer): + value = 1024 + tag = ["build"] + undef = True + descr = "size of the early initialization stack in bytes" + +class MPC83XX_BOARD_MPC8309SOM(Boolean): + value = True + tag = ["build"] + undef = True + descr = "if defined, then use settings for the MPC8309SOM board" + + +class ZYNQ_RAM_ORIGIN(String): + value = "0x00400000" + tag = ["storage"] + undef = True + descr = "Normal RAM region origin" + +class ZYNQ_RAM_MMU(String): + value = "%(ZYNQ_RAM_ORIGIN)s" + tag = ["storage"] + quote = False + undef = True + descr = "MMU region origin" + +class ZYNQ_RAM_MMU_LENGTH(String): + value = "16k" + tag = ["storage"] + undef = True + descr = "MMU region length" + +class ZYNQ_RAM_ORIGIN_AVAILABLE(String): + value = "%(ZYNQ_RAM_ORIGIN)s + 0x00004000" + tag = ["storage"] + undef = True + descr = "Origin of available RAM" + +class ZYNQ_RAM_LENGTH_AVAILABLE(String): + value = "%(BSP_ZYNQ_RAM_LENGTH)s - 1M - 16k" + tag = ["storage"] + undef = True + descr = "Length of available RAM" + +class ZYNQ_RAM_INT_0_ORIGIN(String): + value = "0x00000000" + tag = ["storage"] + undef = True + descr = "Internal 0 RAM region origin" + +class ZYNQ_RAM_INT_0_LENGTH(String): + value = "64k + 64k + 64k" + tag = ["storage"] + undef = True + descr = "Internal 0 RAM region length" + +class ZYNQ_RAM_INT_1_ORIGIN(String): + value = "0xFFFF0000" + tag = ["storage"] + undef = True + descr = "Internal 1 RAM region origin" + +class ZYNQ_RAM_INT_1_LENGTH(String): + value = "64k - 512" + tag = ["storage"] + undef = True + descr = "Internal 1 RAM region length" + +class BSP_ZYNQ_RAM_LENGTH(String): + value = "256M" + tag = ["storage"] + quote = False + undef = True + descr = "Override a BSP's default RAM length" + +class ZYNQ_RAM_NOCACHE_LENGTH(String): + value = "1M" + tag = ["storage"] + quote = False + undef = True + descr = "Length of nocache RAM region" + +class ZYNQ_CLOCK_CPU_1X(String): + value = "111111111U" + tag = ["general"] + quote = False + undef = True + descr = "Zynq cpu_1x clock frequency in Hz" + +class ZYNQ_CLOCK_UART(String): + value = "50000000UL" + tag = ["network"] + quote = False + undef = True + descr = "Zynq UART clock frequency in Hz" + + +class ZYNQ_CPUS(Integer): + value = 1 + tag = ["general"] + quote = False + undef = True + descr = "Number of active cores" + + +class IS_DM3730(Boolean): + value = False + tag = ["build"] + undef = True + descr = "true if SOC is DM3730" + + +class IS_AM335X(Boolean): + value = False + tag = ["build"] + undef = True + descr = "true if SOC is AM335X" + + +class CONSOLE_POLLED(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Polled console i/o." + + +class CONSOLE_BAUD(Integer): + value = 115200 + tag = ["network"] + undef = True + descr = "initial baud for console UART" + + +class ENABLE_SYSTEM_DEP(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Enable dependencies on system headers, only useful if you are developing toolchains. This will slow down the build" diff --git a/py/waf/docs.py b/py/waf/docs.py new file mode 100644 index 0000000000..7725133d93 --- /dev/null +++ b/py/waf/docs.py @@ -0,0 +1,130 @@ +from bsp import list_bsp +from rtems_waf.config.base import config_list + + +def header(): + return """ +<html> +<head> + <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> + + <title>List of RTEMS BSP Options</title> + <meta name="Description" content="List of options for RTEMS BSPs"> + <meta name="Keywords" content="RTEMS, BSP, sparc, intel, mips"/> + <meta name="Author" content="http://www.rtems.org/"/> + <style> +#download table { + border-spacing: 3px; + border-style: outset outset outset outset; + border-width: 1px 1px 1px 1px; + background-color: #dcfdc4; + border-color: black black black black; + border-collapse: collapse; +} + +#download table th { + background-color: 6c945a; +} + +h1, h2, h3, h4 { + font: bold 1.5em/1.5em sans serif; + color: #444; +} + + </style> + <meta name="Copyright" content="Copyright (C) 2015 RTEMS Project"/> +</head> + +<body> +<div id='download'> + """ + + +def footer(): + return """ +</div> +</body> +</html> + """ + + +TABLE_START = """ +<table style='round' border='1' cellpadding='5'> +<tr align='center'><th>Option</th><th nowrap='nowrap'>Default Value</th><th>Description</th></tr> +""" + +TABLE_END = """ +</table> +""" + +TABLE_ROW =""" +<tr valign='top'> + <td align='left'>%s</td> + <td align='left' valign='top'>%s</td> + <td align='left' align='top'>%s</td> +</tr> +""" + +BSP_HEADING = """ +<br/> +<hr size='1'> +<h2>%s</h2> +""" + +TABLE_HEADING = """ +<br/> +<b>%s</b> +""" + + +def rtems_cmd_docs(ctx): + fp = open(ctx.options.file_out, "w") + fp.write(header()) + + full = [] + for arch in list_bsp: + full.append(arch) + for bsp in list_bsp[arch]: + full.append("%s/%s" % (arch, bsp)) + + all = ["general", "host"] + sorted(full) + + def cfg_get(entry): + for config in config_list: + if config.name == entry: + return config +# raise Exception("Not found %s" % entry) # XXX: Because not all BSPs are added. + + for entry in all: + cfg = cfg_get(entry) + + if cfg == None: + continue # XXX: Hack because not all BSPs are added. +# print cfg.name, cfg + + c = cfg() + + fp.write(BSP_HEADING % c.name) + def print_opt(name, values): + if not list(values): + return + + fp.write(TABLE_HEADING % "%s Options" % name) + fp.write(TABLE_START) + for option in values: + opt = values[option] + if type(opt.value) is list: + value = " ".join(opt.value) + else: + value = opt.value + fp.write(TABLE_ROW % (opt.name, value or " ", opt.descr)) + + fp.write(TABLE_END) + + print_opt("Build", c.option_build) + print_opt("Header", c.option_header) + + + fp.write(footer()) + + print("Wrote options.html") diff --git a/py/waf/hello.py b/py/waf/hello.py new file mode 100644 index 0000000000..95b1872ce4 --- /dev/null +++ b/py/waf/hello.py @@ -0,0 +1,35 @@ +from subprocess import Popen, PIPE +from .tools import run +from waflib.ConfigSet import ConfigSet + +def rtems_cmd_hello(ctx): + c = ConfigSet("build/c4che/_cache.py") + for bsp in c.BSP: + print("\nBUILDING: %s" % bsp) + a, b = bsp.split("/") + c = ConfigSet("build/c4che/%s/%s_cache.py" % (a, b)) + + cflags, cf_stderr, cf_rc = run(["./rtems-config", "--bsp=%s" % bsp, "--cflags"]) + ldflags, ld_stderr, ld_rc = run(["./rtems-config", "--bsp=%s" % bsp, "--ldflags"]) + + if cf_rc or ld_rc: + print(cf_stderr) + print(ld_stderr) + + cmd = c.BIN_RTEMS_CC + cmd += cflags.decode("utf-8").split(" ") + cmd.append("-o") + cmd.append("/tmp/hello") + cmd.append("testsuites/samples/hello/init.c") + cmd += ldflags.decode("utf-8").split(" ") + + print(" ".join(cmd)) + stdout, stderr, returncode = run(cmd) + + if stdout: + print(stdout) + if stderr: + print(stderr) + + if cf_rc or ld_rc or returncode: + ctx.fatal("Compilation Failed") diff --git a/py/waf/info.py b/py/waf/info.py new file mode 100644 index 0000000000..50164581a5 --- /dev/null +++ b/py/waf/info.py @@ -0,0 +1,72 @@ +from waflib.ConfigSet import ConfigSet + +def system(ctx): + info = {} + + from waflib.Utils import unversioned_sys_platform + info["platform_waf"] = unversioned_sys_platform() + + from multiprocessing import cpu_count + info["cpu_count"] = cpu_count() + + # platform information + import platform + methods = [ + "machine", + "platform", + "processor", + "python_build", + "python_version", + "python_version_tuple", + "system", +# "system_alias", + "release", +# "version", +# "uname", + "win32_ver", + "mac_ver", + "linux_distribution" + ] + for method in methods: + info[method] = getattr(platform, method)() + + return info + + +def rtems(ctx): + info = {} + + c = ConfigSet("build/c4che/_cache.py") + + + info["version"] = c.RTEMS_VERSION + + info["bsp"] = {} + for bsp in c.BSP: + a, b = bsp.split("/") + c = ConfigSet("build/c4che/%s/%s_cache.py" % (a, b)) + + b = {} + + info["bsp"][bsp] = b + + return info + + +def rtems_cmd_info(ctx): + info = {} + + info["system"] = system(ctx) + info["rtems"] = rtems(ctx) + + + for val in sorted(info): + print("\n%s" % val) + for v in sorted(info[val]): + print(" %s = %s" % (v, info[val][v])) + +# import pprint +# pp = pprint.PrettyPrinter(indent=4) +# pp.pprint(info) + + diff --git a/py/waf/rtems_config.py b/py/waf/rtems_config.py new file mode 100755 index 0000000000..8c8e21d04c --- /dev/null +++ b/py/waf/rtems_config.py @@ -0,0 +1,62 @@ + + +# --- ANYTHING ABOVE THIS LINE IS AUTOGENERATED --- +from argparse import ArgumentParser + +def arg_print(args): + print(" ".join(args)) + +parser = ArgumentParser(description="RTEMS %s Configuration" % RTEMS_VERSION) +parser.add_argument('--version', action='version', version=RTEMS_VERSION) + +compiler = parser.add_argument_group('BSP Settings / Information') +compiler.add_argument('--bsp', action="store", help="BSP to show options for, use --list for a list.", nargs=1) +compiler.add_argument('--list', action="store_true", help="List available BSPs.") +compiler.add_argument('--list-format', action="store", help="List available bsps using LIST_FORMAT. (default: %%(arch)s/%%(bsp)s)", default=False, nargs="?") + +compiler = parser.add_argument_group('Compiler Arguments') +compiler_e = compiler.add_mutually_exclusive_group() +compiler_e.add_argument('--cflags', action="store_true", help="C Flags.") +compiler_e.add_argument('--libs', action="store_true", help="Libraries used for linking.") +compiler_e.add_argument('--ldflags', action="store_true", help="Linker flags.") + +args = parser.parse_args() + + +if args.list is True: + print("List of Installed BSPs") + print("~~~~~~~~~~~~~~~~~~~~~~") + for b in sorted(BSP_LIST): + print("%-16s %s" % (b, BSP_LIST[b]["description"])) + exit(0) + + +if args.list_format is not False: + if args.list_format is None: + args.list_format = "%(arch)s/%(bsp)s" + + tmp = [] + for b in sorted(BSP_LIST): + arch, bsp = b.split("/") + tmp.append(args.list_format % {"arch": arch, "bsp": bsp}) + print(" ".join(tmp)) + exit(0) + + +if args.bsp is not None: + bsp = args.bsp[0] #XXX: Why is this a list? + + if bsp not in BSP_LIST: + print("Unknown BSP \"%s\", use --list." % bsp) + exit(1) + + if args.cflags is True: + arg_print(BSP_LIST[bsp]["cflags"]) + elif args.libs is True: + arg_print(BSP_LIST[bsp]["libs"]) + elif args.ldflags is True: + arg_print(BSP_LIST[bsp]["ldflags"]) + exit(0) + + +#parser.print_usage() diff --git a/py/waf/switch.py b/py/waf/switch.py new file mode 100644 index 0000000000..e4bb7a6bf5 --- /dev/null +++ b/py/waf/switch.py @@ -0,0 +1,21 @@ +def options(ctx): + ctx.load('compiler_c') + ctx.load('compiler_cxx') + + ctx.add_option('--enable-tests', action='store_true', default=False, help='Enable tests (TEMP OPTION!)') + + grp = ctx.add_option_group("config (configuration file) options") + grp.add_option('--bsp', dest='bsps', help="Command seperated list of BSPs to build.", type='string') + grp.add_option('--list', action='store_true', default=False, help='List available BSPs.') + grp.add_option('--prefix', dest='prefix', help="Install prefix.", type='string') + grp.add_option('--path-tools', dest='path_tools', help="Directory for RTEMS tools.", type='string') + grp.add_option('--force', action='store_true', default=False, help='Force overwriting config.cfg.') + + grp = ctx.add_option_group("docs documentation options") + grp.add_option('--out', dest='file_out', default="options.html", help="Output file (default: %default)", type='string') + grp.add_option('--html', action='store_true', default=True, help='Generate HTML documentation. (default: yes)') + grp.add_option('--txt', action='store_true', default=True, help='Generate Text documentation. (default: no)') + + grp = ctx.add_option_group("developer options") + grp.add_option('--build-config', action='store_true', default=False, help="Write build configuration. (default: no)") + grp.add_option('--build-json', action='store_true', default=False, help="Write JSON build log.. (default: no)") diff --git a/py/waf/tools.py b/py/waf/tools.py new file mode 100644 index 0000000000..3fafd51691 --- /dev/null +++ b/py/waf/tools.py @@ -0,0 +1,211 @@ +from waflib.Logs import pprint +from os.path import exists, getmtime + + +def fatal(str): + pprint('RED', str) + exit(1) + +def generate_rtems_config(ctx, file_in, file_out, devel=False): + from os import fchmod + from pprint import PrettyPrinter + pp = PrettyPrinter(depth=4) + bsps = {} + + + for bsp in ctx.env.BSP: + env = ctx.all_envs[bsp] + bsps[bsp] = { + "cflags": env.CFLAGS + env.CONFIG_CFLAGS, + "libs": env.LIBS + ["-lrtemscpu -lrtemsbsp"] + env.CONFIG_LIBS, + "ldflags": env.LDFLAGS + env.CONFIG_LDFLAGS, + "description": env.CONFIG_DESCRIPTION + } + + if devel: + srcnode = ctx.srcnode.abspath() + path_bld = "%s/%s" % (ctx.bldnode.abspath(), bsp) + + include = [] + include.append("-I%s/include" % srcnode) + include.append("-I%s/include" % path_bld) + include.append("-I%s/include/rtems" % path_bld) + bsps[bsp]["cflags"] = include + bsps[bsp]["cflags"] +# bsps[bsp]["libs"] = ["%s/c/start.o" % path_bld] + bsps[bsp]["libs"] + + ldflags = [] + ldflags.append("-specs %s/gcc_spec" % path_bld) + ldflags.append("-L%s/cpukit/" % path_bld) + ldflags.append("-L%s/c/" % path_bld) +# ldflags.append("-Wl,-T %s/c/linkcmds" % path_bld) +# bsps[bsp]["ldflags"] = ldflags + bsps[bsp]["libs"] + bsps[bsp]["ldflags"] += ldflags + ["-Wl,-start-group"] + bsps[bsp]["libs"] + ["-lc"] + ["-lgcc"] + ["-Wl,-end-group"] + + else: + raise Exception("Doesn't work in install mode yet.") + + #XXX: file_in and file_out can be automatically calculated they don't need to be parms. + with open(file_in, "r") as fp: + config = fp.read() + + with open(file_out, "w") as fp: + fp.write('#!%s\n' % ctx.env.BIN_PYTHON[0]) # XXX: How does this work on Windows? + fp.write('RTEMS_VERSION = "%s"\n' % ctx.env.RTEMS_VERSION) + fp.write('PREFIX="%s"\n' % ctx.env.PREFIX) + fp.write('BSP_LIST = %s\n' % pp.pformat(bsps)) + fp.write(config) + fchmod(fp.fileno(), 0o755) + + +def generate_gcc_spec_file(ctx, devel=False): + path_bld = "%s/%s" % (ctx.bldnode.abspath(), ctx.variant) + data = [] + + def expand_flags(ctx, obj_list): + path_bld = "%s/%s" % (ctx.bldnode.abspath(), ctx.variant) + l = [] + for obj in obj_list: + obj = obj.replace("${RTEMS}", "%s/c" % path_bld) + if obj.endswith('.o'): + fmt = '%s%%s' + else: + fmt = '%s' + l.append(fmt % obj) + return " ".join(l) + + data.append("*startfile:") + data.append(expand_flags(ctx, ctx.env.LINK_START)) + data.append("") + data.append("*endfile:") + data.append(expand_flags(ctx, ctx.env.LINK_END)) + data.append("") + data.append("*link:") + data.append(expand_flags(ctx, ctx.env.LINK_LINK)) + + with open("%s/gcc_spec" % path_bld, "w") as fp: + for line in data: + fp.write(line) + fp.write("\n") + + ctx.env.append_value('cfg_files', "%s/gcc_spec" % path_bld) + + return "%s/%s/gcc_spec" % (ctx.bldnode, ctx.variant) + + + +# Get all the BSPs for a specific arch +def rtems_bsp_arch_all(arch): + from .bsp import list_bsp + if arch not in list_bsp: + fatal("Incorrect arch for --bsp, must be in the form of arch or arch/name: \"%s\"" % arch) + bsp_list = [] + for bsp in list_bsp[arch]: + bsp_list += ['%s/%s' % (arch, bsp)] + return bsp_list + + +# Get all the BSPs +def rtems_bsp_all(): + from .bsp import list_bsp + bsp_list = [] + for arch in list_bsp: + for bsp in list_bsp[arch]: + bsp_list += ['%s/%s' % (arch, bsp)] + return bsp_list + + +def rtems_bsp_wildcard(pattern): + if '.' in pattern: + pattern = pattern.replace('.', '\.') + if '*' in pattern: + pattern = pattern.replace('*', '.*') + return '^' + pattern + '$' + + +def rtems_bsp_list(bsps): + import re + from .bsp import list_bsp + + bsp_list = [x.strip() for x in bsps.split(',')] + + verified_bsp_list = [] + + for bsp in bsp_list: + if '/' not in bsp: + fatal("Incorrect value for --bsp must be in the form of arch/name: \"%s\"" % bsp) + (arch, bsp) = bsp.split('/') + pa = re.compile(rtems_bsp_wildcard(arch), re.IGNORECASE) + pb = re.compile(rtems_bsp_wildcard(bsp), re.IGNORECASE) + for arch in list_bsp: + if pa.match(arch) is not None: + for bsp in list_bsp[arch]: + if pb.match(bsp) is not None: + arch_bsp = '%s/%s' % (arch, bsp) + verified_bsp_list += [arch_bsp] + return sorted(verified_bsp_list) + + +def rtems_cmd_config(ctx): + if ctx.options.list is True: + from .bsp import list_bsp + + from rtems_waf.config import BuildConfig + cfg = BuildConfig() + + for arch in sorted(list_bsp): + print(arch) + for bsp in sorted(list_bsp[arch]): + descr = cfg.bsp_get_detail(arch, bsp) + print(" %-20s %s" % (bsp, descr)) + print("") + return + + if ctx.options.force is False and exists("config.cfg"): + ctx.fatal("Please delete config.cfg before creating a new one.") + + if not ctx.options.bsps: + ctx.fatal("You must specify a single or comma separated list of BSPs using --bsp") + + bsp_list = rtems_bsp_list(ctx.options.bsps) + if not bsp_list: + ctx.fatal("You must specify a single or comma separated list of BSPs using --bsp") + + from rtems_waf.config import BuildConfig + cfg = BuildConfig(bsp_list) + cfg.option_set("general", "PATH_TOOLS", ctx.options.path_tools or "") + cfg.option_set("general", "PREFIX", ctx.options.prefix or "") + cfg.save() + + pprint("YELLOW", "Wrote config.cfg") + archs = {} + for bsp in bsp_list: + pprint("YELLOW", " - %s" % bsp) + arch = bsp.split('/')[0] + if arch not in archs: + archs[arch] = 0 + archs[arch] += 1 + + pprint("YELLOW", "Configured BSPS:") + pprint("YELLOW", " Total : %d" % len(bsp_list)) + arch_list = sorted(archs.keys()) + for arch in arch_list: + pprint("YELLOW", " %-8s: %d" % (arch, archs[arch])) + + +def rtems_cmd_bsp(ctx): + ctx.fatal("Not implemented.") + print("List of available BSPs") + print("List of DISABLED BSPs") + + +# Get file mtime. +def get_file_mtime(file): + return getmtime(file) + + +from subprocess import Popen, PIPE + +def run(cmd): + p = Popen(cmd, stdout=PIPE, stderr=PIPE) + stdout, stderr = p.communicate() + return stdout[:-1], stderr[:-1], p.returncode diff --git a/py/waf/waf.py b/py/waf/waf.py new file mode 100644 index 0000000000..f4c8e14610 --- /dev/null +++ b/py/waf/waf.py @@ -0,0 +1,294 @@ +from waflib.Task import Task +from waflib.TaskGen import feature, before, after, extension, after_method +from waflib.Configure import conf +from waflib.Logs import pprint +#from waflib.Build import BuildContext, CleanContext, InstallContext, UninstallContext +#from waflib import Build, Scripting +#from waflib.Tools import c_preproc +#from rtems_waf import gccdeps +#from waflib import Logs +#import ConfigParser + + +################# +# Handle .S Files +################# +class casm(Task): +# run_str = '${CC} ${ARCH_ST:ARCH} ${CFLAGS} ${CPPFLAGS} ${CPPPATH_ST:INCPATHS} ${DEFINES_ST:DEFINES} ${CC_SRC_F}${SRC} ${CC_TGT_F}${TGT}' + run_str = '${CC} -DASM ${ARCH_ST:ARCH} ${CFLAGS} ${CPPFLAGS} ${FRAMEWORKPATH_ST:FRAMEWORKPATH} ${CPPPATH_ST:INCPATHS} ${DEFINES_ST:DEFINES} ${CC_SRC_F}${SRC} ${CC_TGT_F}${TGT}' + ext_in = ['.h'] + ext_out = ['.o'] + color = 'BLUE' + +@extension('.S') +def asm_hook(self, node): + return self.create_compiled_task('casm', node) + + +########## +# Features +########## +@feature('bld_include') +@after_method('apply_incpaths') +def insert_blddir(self): + self.env.prepend_value('INCPATHS', ['include']) + +@feature('src_include') +@after_method('apply_incpaths', 'insert_blddir') +def insert_srcdir(self): + path = self.bld.srcnode.abspath() + self.env.append_value('INCPATHS', "%s/include" % path) + + if self.env.ENABLE_SMP: + self.env.append_value('INCPATHS', "%s/cpukit/score/include/" % path) + self.env.append_value('INCPATHS', "%s/cpukit/rtems/include/" % path) + +@feature('src_include_rtems') +@after_method('apply_incpaths', 'insert_blddir') +def insert_srcdir_rtems(self): + self.env.append_value('INCPATHS', "%s/include/rtems" % self.bld.srcnode.abspath()) + +@feature('src_include_networking') +@after_method('apply_incpaths', 'insert_blddir') +def insert_srcdir_networking(self): + self.env.append_value('INCPATHS', "%s/cpukit/libnetworking" % self.bld.srcnode.abspath()) + +@feature('src_include_bsp') +@after_method('apply_incpaths', 'insert_blddir') +def insert_srcdir_bsp(self): + self.env.append_value('INCPATHS', "%s/include/bsp" % self.bld.srcnode.abspath()) + +@feature('src_include_libcpu') +@after_method('apply_incpaths', 'insert_blddir') +def insert_srcdir_libcpu(self): + self.env.append_value('INCPATHS', "%s/include/libcpu" % self.bld.srcnode.abspath()) + +@feature('src_include_libchip') +@after_method('apply_incpaths', 'insert_blddir') +def insert_srcdir_libchip(self): + self.env.append_value('INCPATHS', "%s/include/libchip" % self.bld.srcnode.abspath()) + + +########### +# Shortcuts +########### +def rtems_build(cmd, ctx, target_name, source, **kwarg): + feature = "c bld_include" + if "features" in kwarg: + feature = "%s %s" % (kwarg["features"], feature) + del kwarg["features"] + + cmd( + source = source, + target = target_name, + features = feature, + install_path = ctx.env.LIBDIR, + **kwarg) + +# There's probably a better way to do this. +@conf +def rtems_lib(ctx, target_name, source, **kwarg): + rtems_build(ctx.stlib, ctx, target_name, source, **kwarg) + +@conf +def rtems_obj(ctx, target_name, source, **kwarg): + rtems_build(ctx, ctx, target_name, source, **kwarg) + +@conf +def rtems_program(ctx, target_name, source, **kwarg): + rtems_build(ctx.program, ctx, target_name, source, **kwarg) + + +@conf +def copy(ctx, source, target, name): + ctx( + features = 'subst', + source = source, + target = target, + is_copy = True, + name = name, + ) + +@conf +def copy_or_subst(ctx, source, target, name): + if source.endswith(".in"): + # This is required as not all 'linkcmd' files are named as such see the + # bottom of c/wscript It can be removed when the names are normalised + # XXX: fix 'linkcmd' names. + + if target.endswith(".in"): + target = target[:-3] + + ctx( + features = 'subst', + source = source, + target = target, + encoding = 'ascii', # for python3. + name = name, +# is_copy = True + ) + else: + ctx.copy(source, target, name) + + +################# +# Configure Steps +################# +@conf +def check_func(ctx, func, mandatory=False): + ctx.check_cc( + mandatory = mandatory, + fragment = "char %s();\n int main() { return %s(); return 0; }" % (func, func), + define_name = "HAVE_%s" % func.upper(), + execute = False, + msg = "Checking for C library function %s" % func + ) + + +@conf +def check_size(ctx, field, mandatory=False, define_name=None): + if define_name is None: + define_name = "SIZEOF_%s" % field.upper() + + ctx.check_cc( + mandatory = mandatory, + fragment = """ + #include <sys/types.h> + #include <stdio.h> + main() { + printf("%%d", sizeof(%s)); + return 0; + } + """ % field, + execute = True, + define_ret = True, + define_name = define_name, + quote = False, + msg = "Checking size of %s" % field + ) + +@conf +def check_define(ctx, define, header, mandatory=False): + ctx.check( + mandatory = mandatory, + fragment = '''#include <%s>\n int main () {\n #ifndef %s\n #error "missing define"\n #endif\n return 0; }\n''' % (header, define), + define_name = "HAVE_%s" % define.upper(), + features = "c", + msg = "Checking for define %s in %s" % (define, header) + ) + + +################################################# +# This writes objects to a file if there are > 25 +# objects to avoid commandline arg limits for ar. +################################################# +def rtems_stlib_command(self, *k, **kw): + # Following block borrowed from waflib/Tools/msvc.py + bld = self.generator.bld + + try: + if not kw.get('cwd', None): + kw['cwd'] = bld.cwd + except AttributeError: + bld.cwd = kw['cwd'] = bld.variant_dir + + # Put the objects on the commandline if there aren't enough to + # warrant writing to a file. + if len(self.inputs) < 25: + return self.generator.bld.exec_command(*k, **kw) + + file_obj = "%s_files" % self.outputs[0].abspath() + with open(file_obj, "w") as fp: + for f in self.inputs: + fp.write("%s\n" % f.bldpath()) + + pprint("YELLOW", "Wrote %d objects to %s" % (len(self.inputs), file_obj)) + cmd = self.env.AR + ["rc", self.outputs[0].bldpath(), "@%s_files" % self.outputs[0].bldpath()] + + # Task information for JSON build output. + if self.env.BUILD_JSON: + kw["json_task_self"] = self + + return self.generator.bld.exec_command(cmd, **kw) + + + +# Tests +@feature('test_include') +@after_method('apply_incpaths') +def insert_test_include(self): + self.env.prepend_value('INCPATHS', "%s/testsuites/support/include" % self.bld.srcnode.abspath()) + + +from waflib.Tools.c import cprogram +from waflib.Tools.ccroot import USELIB_VARS + +USELIB_VARS['test_cprogram'] = set(['STLIB', 'STLIBPATH', 'LDFLAGS']) + +#from StringIO import StringIO +from os import fdopen, pipe, read, close +class test_cprogram(cprogram): + run_str = '${LINK_CC} ${LDFLAGS} ${CFLAGS} ${CCLNK_SRC_F}${SRC} ${CCLNK_TGT_F}${TGT[0].abspath()} -specs gcc_spec -Wl,-Bstatic -Lc -Lcpukit -Wl,-start-group -lc -lgcc ${STLIBPATH_ST:STLIBPATH} ${STLIB_ST:STLIB} -Wl,-end-group' + + def exec_command(self, cmd, **kw): + r, w = pipe() + rfd = fdopen(r, "rb", 0) + kw["stderr"] = fdopen(w, "wb", 0) + ret = cprogram.exec_command(self, cmd, **kw) + kw["stderr"].close() + + if ret == 1: + data = rfd.readlines() + if " ".join(data).find("will not fit in region") != -1: + file = self.outputs[0].abspath() + with open(file, "w") as fp: + fp.write("Target does not meet test memory constraints.\n") + pprint("RED", "Target \"%s\" does not meet test memory constraints." % file) + rfd.close() + return 0 + print("".join(data)) + + rfd.close() + return ret + + + +@conf +def rtems_test(ctx, target_name, source_name, **kwarg): + features_merged = "c test_cprogram bld_include src_include" + if "features" in kwarg: + features_merged = "%s %s" % (kwarg["features"], features_merged) + del kwarg["features"] + + use_merged = "rtemsbsp rtemscpu" + if "use" in kwarg: + use_merged = "%s %s" % (kwarg["use"], use_merged) + del kwarg["use"] + + ctx( + source = source_name, + target = "test_%s" % target_name, + features = features_merged, + use = use_merged, + install_path = ctx.env.TESTDIR, + **kwarg + ) + + +@conf +def rtems_doc(ctx, section): + pprint("YELLOW", "See http://docs.rtems.org/%s/user/#%s (Not activated yet!)" % (ctx.env.RTEMS_VERSION, section)) + + +@conf +def rtems_fatal(ctx, message, section): + pprint("RED", message) + ctx.rtems_doc(section) + ctx.fatal("Fatal error") + + +@conf +def rtems_warn(ctx, message, section): + pprint("YELLOW", message) + ctx.rtems_doc(section) + |