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Diffstat (limited to 'c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c')
-rw-r--r--c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c480
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diff --git a/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c
new file mode 100644
index 0000000000..5fb1481715
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c
@@ -0,0 +1,480 @@
+/*
+ * This routine starts the application. It includes application,
+ * board, and monitor specific initialization and configuration.
+ * The generic CPU dependent initialization has been performed
+ * before this routine is invoked.
+ *
+ * COPYRIGHT (c) 1989-1998.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ *
+ * Modified to support the MCP750.
+ * Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
+ *
+ * Modified for mvme3100 by T. Straumann
+ *
+ * $Id$
+ */
+
+#include <string.h>
+#include <stdlib.h>
+
+#include <rtems.h>
+#include <bsp.h>
+#include <rtems/bspIo.h>
+#include <libcpu/spr.h>
+#include <libcpu/io.h>
+#include <bsp/uart.h>
+#include <bsp/irq.h>
+#include <bsp/pci.h>
+#include <bsp/vpd.h>
+#include <libcpu/cpuIdent.h>
+#include <bsp/vectors.h>
+#include <rtems/powerpc/powerpc.h>
+
+#define SHOW_MORE_INIT_SETTINGS
+#undef DEBUG
+
+#ifdef DEBUG
+#define STATIC
+#else
+#define STATIC static
+#endif
+
+extern unsigned long __rtems_end[];
+extern void bsp_cleanup(void);
+extern void BSP_vme_config();
+
+SPR_RW(SPRG0)
+SPR_RW(SPRG1)
+
+/*
+ * Copy Additional boot param passed by boot loader
+ */
+#define CMDLINE_BUF_SIZE 2048
+
+static char cmdline_buf[CMDLINE_BUF_SIZE] = {0};
+char *BSP_commandline_string = cmdline_buf;
+
+extern const char *BSP_build_date;
+
+/*
+ * Vital Board data Start using DATA RESIDUAL
+ */
+uint32_t bsp_clicks_per_usec = 0;
+/*
+ * Total memory using RESIDUAL DATA
+ */
+unsigned int BSP_mem_size = 0;
+/*
+ * Where the heap starts; is used by bsp_pretasking_hook;
+ */
+unsigned int BSP_heap_start = 0;
+/*
+ * PCI Bus Frequency
+ */
+unsigned int BSP_pci_bus_frequency = 0xdeadbeef;
+/*
+ * PPC Bus Frequency
+ */
+unsigned int BSP_bus_frequency = 0;
+/*
+ * processor clock frequency
+ */
+unsigned int BSP_processor_frequency = 0;
+/*
+ * Time base divisior (how many tick for 1 second).
+ */
+unsigned int BSP_time_base_divisor = 8000; /* if external RTC clock unused (HID0) */
+
+/* Board identification string */
+char BSP_productIdent[20] = {0};
+char BSP_serialNumber[20] = {0};
+
+/* VPD appends an extra char -- what for ? */
+char BSP_enetAddr0[7] = {0};
+char BSP_enetAddr1[7] = {0};
+char BSP_enetAddr2[7] = {0};
+
+static void
+prether(char *b, int idx)
+{
+int i;
+ printk("Ethernet %i %02X", idx, *b++);
+ for ( i=0; i<5; i++ )
+ printk(":%02X",*b++);
+ printk("\n");
+}
+
+/*
+ * system init stack and soft ir stack size
+ */
+#define INIT_STACK_SIZE 0x1000
+#define INTR_STACK_SIZE rtems_configuration_get_interrupt_stack_size()
+
+BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial;
+
+void BSP_panic(char *s)
+{
+ printk("\n%s PANIC %s\n",_RTEMS_version, s);
+ __asm__ __volatile ("sc");
+}
+
+void _BSP_Fatal_error(unsigned int v)
+{
+ printk("\n%s PANIC ERROR %x\n",_RTEMS_version, v);
+ __asm__ __volatile ("sc");
+}
+
+/*
+ * The original table from the application and our copy of it with
+ * some changes.
+ */
+
+extern rtems_configuration_table Configuration;
+
+char *rtems_progname;
+
+/*
+ * Use the shared implementations of the following routines
+ */
+
+void save_boot_params(void* r3, void *r4, void* r5, char *additional_boot_options)
+{
+
+ strncpy(cmdline_buf, additional_boot_options, CMDLINE_BUF_SIZE);
+ cmdline_buf[CMDLINE_BUF_SIZE - 1] ='\0';
+}
+
+#define CS_CONFIG_CS_EN (1<<31)
+#define CS_BNDS_SA(x) ((((uint32_t)(x))>>(31-15)) & 0xff)
+#define CS_BNDS_EA(x) ((((uint32_t)(x))>>(31-31)) & 0xff)
+
+static inline uint32_t
+_ccsr_rd32(uint32_t off)
+{
+ return in_be32( (volatile unsigned *)(BSP_8540_CCSR_BASE + off) );
+}
+
+static inline void
+_ccsr_wr32(uint32_t off, uint32_t val)
+{
+ out_be32( (volatile unsigned *)(BSP_8540_CCSR_BASE + off), val );
+}
+
+
+STATIC uint32_t
+BSP_get_mem_size()
+{
+int i;
+uint32_t cs_bnds, cs_config;
+uint32_t memsz=0;
+uint32_t v;
+
+ for ( cs_bnds = 0x2000, cs_config=0x2080, i=0; i<4; i++, cs_bnds+=8, cs_config+=4 ) {
+ if ( CS_CONFIG_CS_EN & _ccsr_rd32( cs_config ) ) {
+ v = _ccsr_rd32( cs_bnds );
+
+ memsz += CS_BNDS_EA(v) - CS_BNDS_SA(v) + 1;
+ }
+ }
+ return memsz << 24;
+}
+
+STATIC void
+BSP_calc_freqs()
+{
+uint32_t porpllsr = _ccsr_rd32( 0xe0000 );
+unsigned plat_ratio = (porpllsr >> (31-30)) & 0x1f;
+unsigned e500_ratio = (porpllsr >> (31-15)) & 0x3f;
+
+ switch ( plat_ratio ) {
+ case 2: case 3: case 4: case 5: case 6:
+ case 8: case 9: case 10: case 12: case 16:
+ /* supported ratios */
+ BSP_bus_frequency = BSP_pci_bus_frequency * plat_ratio;
+ break;
+
+ default:
+ BSP_panic("Unknown PLL sys-clock ratio; something's wrong here");
+ }
+
+ switch ( e500_ratio ) {
+ case 4: case 5: case 6: case 7:
+ BSP_processor_frequency = (BSP_pci_bus_frequency * e500_ratio) >> 1;
+ break;
+
+ default:
+ BSP_panic("Unknown PLL e500-clock ratio; something's wrong here");
+ }
+
+ printk("Core Complex Bus (CCB) Clock Freq: %10u Hz\n", BSP_bus_frequency);
+ printk("CPU Clock Freq: %10u Hz\n", BSP_processor_frequency);
+}
+
+void
+bsp_predriver_hook(void)
+{
+ /* Some drivers (RTC) may need i2c */
+ BSP_i2c_initialize();
+}
+
+/*
+ * bsp_start
+ *
+ * This routine does the bulk of the system initialization.
+ */
+
+void bsp_start( void )
+{
+unsigned char *stack;
+register uint32_t intrStack;
+register uint32_t *intrStackPtr;
+unsigned char *work_space_start;
+char *chpt;
+ppc_cpu_id_t myCpu;
+ppc_cpu_revision_t myCpuRevision;
+
+VpdBufRec vpdData [] = {
+ { key: ProductIdent, instance: 0, buf: BSP_productIdent, buflen: sizeof(BSP_productIdent) - 1 },
+ { key: SerialNumber, instance: 0, buf: BSP_serialNumber, buflen: sizeof(BSP_serialNumber) - 1 },
+ { key: BusClockHz, instance: 0, buf: &BSP_pci_bus_frequency, buflen: sizeof(BSP_pci_bus_frequency) },
+ { key: EthernetAddr, instance: 0, buf: BSP_enetAddr0, buflen: sizeof(BSP_enetAddr0) },
+ { key: EthernetAddr, instance: 1, buf: BSP_enetAddr1, buflen: sizeof(BSP_enetAddr1) },
+ { key: EthernetAddr, instance: 2, buf: BSP_enetAddr2, buflen: sizeof(BSP_enetAddr2) },
+ VPD_END
+};
+
+ /* Intersperse messages with actions to help locate problems */
+ printk("-----------------------------------------\n");
+
+ /*
+ * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
+ * function store the result in global variables so that it can be used
+ * later...
+ */
+ myCpu = get_ppc_cpu_type();
+ myCpuRevision = get_ppc_cpu_revision();
+
+ printk("Welcome to %s\n", _RTEMS_version);
+ printk("BSP: %s, CVS Release ($Name$)\n", "mvme3100");
+
+ /*
+ * the initial stack has aready been set to this value in start.S
+ * so there is no need to set it in r1 again... It is just for info
+ * so that It can be printed without accessing R1.
+ */
+ asm volatile("mr %0, 1":"=r"(stack));
+#if 0
+ stack = ((unsigned char*) __rtems_end) +
+ INIT_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE;
+#endif
+
+ /* tag the bottom */
+ *((uint32_t*)stack) = 0;
+
+ /*
+ * Initialize the interrupt related settings
+ * SPRG1 = software managed IRQ stack
+ *
+ * This could be done later (e.g in IRQ_INIT) but it helps to understand
+ * some settings below...
+ */
+ BSP_heap_start = ((uint32_t) __rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE;
+
+ /* reserve space for the marker/tag frame */
+ intrStack = BSP_heap_start - PPC_MINIMUM_STACK_FRAME_SIZE;
+
+ /* make sure it's properly aligned */
+ intrStack &= ~(CPU_STACK_ALIGNMENT-1);
+
+ /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
+ intrStackPtr = (uint32_t*) intrStack;
+ *intrStackPtr = 0;
+
+ _write_SPRG1(intrStack);
+
+ /* signal them that we have fixed PR288 - eventually, this should go away */
+ _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
+
+ /*
+ * Initialize default raw exception handlers. See vectors/vectors_init.c
+ */
+ initialize_exceptions();
+
+ printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);
+
+#ifdef SHOW_MORE_INIT_SETTINGS
+ printk("Additionnal boot options are %s\n", BSP_commandline_string);
+ printk("Initial system stack at %x\n", stack);
+ printk("Software IRQ stack at %x\n", intrStack);
+#endif
+
+#ifdef SHOW_MORE_INIT_SETTINGS
+ printk("Going to start PCI buses scanning and initialization\n");
+#endif
+
+ printk("Build Date: %s\n",BSP_build_date);
+
+ BSP_vpdRetrieveFields( vpdData );
+
+ printk("Board Type: %s (S/N %s)\n",
+ BSP_productIdent[0] ? BSP_productIdent : "n/a",
+ BSP_serialNumber[0] ? BSP_serialNumber : "n/a");
+
+ printk("External (=PCI Bus) Clock Freq ");
+ if ( 0xdeadbeef == BSP_pci_bus_frequency ) {
+ BSP_pci_bus_frequency = 66666666;
+ printk(" NOT FOUND in VPD; using %10u Hz\n",
+ BSP_pci_bus_frequency);
+ } else {
+ printk(": %10u Hz\n",
+ BSP_pci_bus_frequency);
+ }
+
+ /* Calculate CPU and CCB bus freqs */
+ BSP_calc_freqs();
+
+ pci_initialize();
+
+ prether(BSP_enetAddr0, 0);
+ prether(BSP_enetAddr1, 1);
+ prether(BSP_enetAddr2, 2);
+
+ /* need to tweak the motload setup */
+ BSP_motload_pci_fixup();
+
+#ifdef SHOW_MORE_INIT_SETTINGS
+ printk("Number of PCI buses found is : %d\n", pci_bus_count());
+ {
+ void BSP_pciConfigDump_early();
+ BSP_pciConfigDump_early();
+ }
+#endif
+
+#ifdef TEST_RAW_EXCEPTION_CODE
+ printk("Testing exception handling Part 1\n");
+ /*
+ * Cause a software exception
+ */
+ __asm__ __volatile ("sc");
+ /*
+ * Check we can still catch exceptions and return coorectly.
+ */
+ printk("Testing exception handling Part 2\n");
+ __asm__ __volatile ("sc");
+
+ /*
+ * Somehow doing the above seems to clobber SPRG0 on the mvme2100. It
+ * is probably a not so subtle hint that you do not want to use PPCBug
+ * once RTEMS is up and running. Anyway, we still needs to indicate
+ * that we have fixed PR288. Eventually, this should go away.
+ */
+ _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
+#endif
+
+ BSP_mem_size = BSP_get_mem_size();
+
+ if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) {
+ char *endp;
+ uint32_t sz;
+ chpt+=6 /* strlen("MEMSZ=") */;
+ sz = strtoul(chpt, &endp, 0);
+ if ( endp != chpt )
+ BSP_mem_size = sz;
+ }
+
+ printk("Memory: %10u bytes\n", BSP_mem_size);
+
+ BSP_bus_frequency = 333333333;
+ BSP_processor_frequency = 833333333;
+ BSP_time_base_divisor = 8000; /* if external RTC clock unused (HID0) */
+
+ /* clear hostbridge errors but leave MCP disabled -
+ * PCI config space scanning code will trip otherwise :-(
+ */
+ _BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/);
+
+ /*
+ * Set up our hooks
+ * Make sure libc_init is done before drivers initialized so that
+ * they can use atexit()
+ */
+
+#if 0
+ Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
+/* FIXME */
+#endif
+ bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
+
+#ifdef SHOW_MORE_INIT_SETTINGS
+ printk("Configuration.work_space_size = %x\n",
+ Configuration.work_space_size);
+#endif
+
+ work_space_start =
+ (unsigned char *)BSP_mem_size - Configuration.work_space_size;
+
+ if ( work_space_start <=
+ ((unsigned char *)__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE) {
+ printk( "bspstart: Not enough RAM!!!\n" );
+ bsp_cleanup();
+ }
+
+ Configuration.work_space_start = work_space_start;
+
+ /*
+ * Initalize RTEMS IRQ system
+ */
+ BSP_rtems_irq_mng_init(0);
+
+ if (1) {
+ int i;
+ unsigned msr,tcr;
+ asm volatile("mfmsr %0":"=r"(msr));
+ asm volatile("mftcr %0":"=r"(tcr));
+ printk("MSR is 0x%08x, TCR 0x%08x\n",msr,tcr);
+ asm volatile("mttcr %0"::"r"(0));
+ if (0) {
+ asm volatile("mtmsr %0"::"r"(msr|0x8000));
+ for (i=0; i<12; i++)
+ BSP_enable_irq_at_pic(i);
+ printk("IRQS enabled\n");
+ }
+ }
+
+ if (0) {
+ extern unsigned ppc_exc_lock_std, ppc_exc_gpr3_std;
+ unsigned x;
+ asm volatile("mfivpr %0":"=r"(x));
+ printk("IVPR: 0x%08x\n",x);
+ asm volatile("mfivor8 %0":"=r"(x));
+ printk("IVOR8: 0x%08x\n",x);
+ printk("0x%08x\n",*(unsigned *)0xc00);
+ printk("0x%08x\n",*(unsigned *)0xc04);
+ printk("0x%08x\n",*(unsigned *)0xc08);
+ printk("0x%08x\n\n\n",*(unsigned *)0xc0c);
+ if (0) {
+ *(unsigned *)0xc08 = 0x4c000064;
+ asm volatile("dcbf 0, %0; icbi 0, %0; sync; isync"::"r"(0xc00));
+ }
+
+ printk("0x%08x\n", ppc_exc_lock_std);
+ printk("0x%08x\n", ppc_exc_gpr3_std);
+
+ asm volatile("sc");
+
+ printk("0x%08x\n", ppc_exc_lock_std);
+ printk("0x%08x\n", ppc_exc_gpr3_std);
+ }
+
+ printk("-----------------------------------------\n");
+
+#ifdef SHOW_MORE_INIT_SETTINGS
+ printk("Exit from bspstart\n");
+#endif
+
+}
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