c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.xilinx_zynq_zc702


1
2
3
4
5
6
7
8

MEMORY {
   RAM_INT_0 : ORIGIN = 0x00000000, LENGTH = 64k + 64k + 64k
   RAM_INT_1 : ORIGIN = 0xFFFF0000, LENGTH = 64k - 512
   RAM_MMU   : ORIGIN = 0x00100000, LENGTH = 16k
   RAM       : ORIGIN = 0x00104000, LENGTH = 1024M - 1M - 16k
}

INCLUDE linkcmds.xilinx_zynq