1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
|
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsPowerPCQorIQ
*
* @brief Support file for Timer Test 27.
*/
/*
* Copyright (c) 2010-2015 embedded brains GmbH. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif /* _RTEMS_TMTEST27 */
#ifndef TMTESTS_TM27_H
#define TMTESTS_TM27_H
#include <assert.h>
#include <libcpu/powerpc-utility.h>
#include <bsp/irq.h>
#include <bsp/qoriq.h>
#define MUST_WAIT_FOR_INTERRUPT 1
#define IPI_INDEX_LOW 1
#define IPI_INDEX_HIGH 2
RTEMS_INLINE_ROUTINE void Install_tm27_vector(void (*handler)(rtems_vector_number))
{
rtems_status_code sc;
rtems_vector_number low = QORIQ_IRQ_IPI_0 + IPI_INDEX_LOW;
rtems_vector_number high = QORIQ_IRQ_IPI_0 + IPI_INDEX_HIGH;
sc = rtems_interrupt_handler_install(
low,
"tm17 low",
RTEMS_INTERRUPT_UNIQUE,
(rtems_interrupt_handler) handler,
NULL
);
assert(sc == RTEMS_SUCCESSFUL);
sc = qoriq_pic_set_priority(low, 1, NULL);
assert(sc == RTEMS_SUCCESSFUL);
sc = rtems_interrupt_handler_install(
high,
"tm17 high",
RTEMS_INTERRUPT_UNIQUE,
(rtems_interrupt_handler) handler,
NULL
);
assert(sc == RTEMS_SUCCESSFUL);
sc = qoriq_pic_set_priority(high, 2, NULL);
assert(sc == RTEMS_SUCCESSFUL);
}
RTEMS_INLINE_ROUTINE void qoriq_tm27_cause(uint32_t ipi_index)
{
uint32_t self = ppc_processor_id();
qoriq.pic.per_cpu[self].ipidr[ipi_index].reg = UINT32_C(1) << self;
}
RTEMS_INLINE_ROUTINE void Cause_tm27_intr(void)
{
qoriq_tm27_cause(IPI_INDEX_LOW);
}
RTEMS_INLINE_ROUTINE void Clear_tm27_intr(void)
{
/* Nothing to do */
}
RTEMS_INLINE_ROUTINE inline void Lower_tm27_intr(void)
{
qoriq_tm27_cause(IPI_INDEX_HIGH);
}
#endif /* TMTESTS_TM27_H */
|