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-rw-r--r--cpukit/score/cpu/avr/avr/ioat94k.h121
1 files changed, 67 insertions, 54 deletions
diff --git a/cpukit/score/cpu/avr/avr/ioat94k.h b/cpukit/score/cpu/avr/avr/ioat94k.h
index 68a9fe2cf5..dc0cab6890 100644
--- a/cpukit/score/cpu/avr/avr/ioat94k.h
+++ b/cpukit/score/cpu/avr/avr/ioat94k.h
@@ -1,41 +1,46 @@
-/* Copyright (c) 2002, Marek Michalkiewicz
- All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
-
- * Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
-
- * Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in
- the documentation and/or other materials provided with the
- distribution.
-
- * Neither the name of the copyright holders nor the names of
- contributors may be used to endorse or promote products derived
- from this software without specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE. */
-
+/**
+ * @file avr/ioat94k.h
+ *
+ * @brief Definitions for AT94K Series FPSLIC(tm)
+ *
+ * This file should only be included from <avr/io.h>, never directly.
+ */
-/* avr/ioat94k.h - definitions for AT94K series FPSLIC(tm) */
+/*
+ * Copyright (c) 2002 Marek Michalkiewicz
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * * Neither the name of the copyright holders nor the names of
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
#ifndef _AVR_IOAT94K_H_
#define _AVR_IOAT94K_H_ 1
-/* This file should only be included from <avr/io.h>, never directly. */
-
#ifndef _AVR_IO_H_
# error "Include <avr/io.h> instead of this file."
#endif
@@ -44,7 +49,14 @@
# define _AVR_IOXXX_H_ "ioat94k.h"
#else
# error "Attempt to include more than one <avr/ioXXX.h> file."
-#endif
+#endif
+
+/**
+ * @defgroup Avr_ioat94k AT94K Series FPSLIC(tm) Definitions
+ *
+ * @ingroup avr
+ */
+/**@{*/
/* I/O registers */
@@ -209,33 +221,33 @@
/* Interrupt vectors */
-#define SIG_FPGA_INTERRUPT0 _VECTOR(1) /* FPGA_INT0 */
+#define SIG_FPGA_INTERRUPT0 _VECTOR(1) /* FPGA_INT0 */
#define SIG_INTERRUPT0 _VECTOR(2) /* EXT_INT0 */
-#define SIG_FPGA_INTERRUPT1 _VECTOR(3) /* FPGA_INT1 */
+#define SIG_FPGA_INTERRUPT1 _VECTOR(3) /* FPGA_INT1 */
#define SIG_INTERRUPT1 _VECTOR(4) /* EXT_INT1 */
-#define SIG_FPGA_INTERRUPT2 _VECTOR(5) /* FPGA_INT2 */
+#define SIG_FPGA_INTERRUPT2 _VECTOR(5) /* FPGA_INT2 */
#define SIG_INTERRUPT2 _VECTOR(6) /* EXT_INT2 */
-#define SIG_FPGA_INTERRUPT3 _VECTOR(7) /* FPGA_INT3 */
+#define SIG_FPGA_INTERRUPT3 _VECTOR(7) /* FPGA_INT3 */
#define SIG_INTERRUPT3 _VECTOR(8) /* EXT_INT3 */
-#define SIG_OUTPUT_COMPARE2 _VECTOR(9) /* TIM2_COMP */
-#define SIG_OVERFLOW2 _VECTOR(10) /* TIM2_OVF */
-#define SIG_INPUT_CAPTURE1 _VECTOR(11) /* TIM1_CAPT */
-#define SIG_OUTPUT_COMPARE1A _VECTOR(12) /* TIM1_COMPA */
-#define SIG_OUTPUT_COMPARE1B _VECTOR(13) /* TIM1_COMPB */
-#define SIG_OVERFLOW1 _VECTOR(14) /* TIM1_OVF */
-#define SIG_OUTPUT_COMPARE0 _VECTOR(15) /* TIM0_COMP */
-#define SIG_OVERFLOW0 _VECTOR(16) /* TIM0_OVF */
-#define SIG_FPGA_INTERRUPT4 _VECTOR(17) /* FPGA_INT4 */
-#define SIG_FPGA_INTERRUPT5 _VECTOR(18) /* FPGA_INT5 */
-#define SIG_FPGA_INTERRUPT6 _VECTOR(19) /* FPGA_INT6 */
-#define SIG_FPGA_INTERRUPT7 _VECTOR(20) /* FPGA_INT7 */
+#define SIG_OUTPUT_COMPARE2 _VECTOR(9) /* TIM2_COMP */
+#define SIG_OVERFLOW2 _VECTOR(10) /* TIM2_OVF */
+#define SIG_INPUT_CAPTURE1 _VECTOR(11) /* TIM1_CAPT */
+#define SIG_OUTPUT_COMPARE1A _VECTOR(12) /* TIM1_COMPA */
+#define SIG_OUTPUT_COMPARE1B _VECTOR(13) /* TIM1_COMPB */
+#define SIG_OVERFLOW1 _VECTOR(14) /* TIM1_OVF */
+#define SIG_OUTPUT_COMPARE0 _VECTOR(15) /* TIM0_COMP */
+#define SIG_OVERFLOW0 _VECTOR(16) /* TIM0_OVF */
+#define SIG_FPGA_INTERRUPT4 _VECTOR(17) /* FPGA_INT4 */
+#define SIG_FPGA_INTERRUPT5 _VECTOR(18) /* FPGA_INT5 */
+#define SIG_FPGA_INTERRUPT6 _VECTOR(19) /* FPGA_INT6 */
+#define SIG_FPGA_INTERRUPT7 _VECTOR(20) /* FPGA_INT7 */
#define SIG_UART0_RECV _VECTOR(21) /* UART0_RXC */
#define SIG_UART0_DATA _VECTOR(22) /* UART0_DRE */
#define SIG_UART0_TRANS _VECTOR(23) /* UART0_TXC */
-#define SIG_FPGA_INTERRUPT8 _VECTOR(24) /* FPGA_INT8 */
-#define SIG_FPGA_INTERRUPT9 _VECTOR(25) /* FPGA_INT9 */
-#define SIG_FPGA_INTERRUPT10 _VECTOR(26) /* FPGA_INT10 */
-#define SIG_FPGA_INTERRUPT11 _VECTOR(27) /* FPGA_INT11 */
+#define SIG_FPGA_INTERRUPT8 _VECTOR(24) /* FPGA_INT8 */
+#define SIG_FPGA_INTERRUPT9 _VECTOR(25) /* FPGA_INT9 */
+#define SIG_FPGA_INTERRUPT10 _VECTOR(26) /* FPGA_INT10 */
+#define SIG_FPGA_INTERRUPT11 _VECTOR(27) /* FPGA_INT11 */
#define SIG_UART1_RECV _VECTOR(28) /* UART1_RXC */
#define SIG_UART1_DATA _VECTOR(29) /* UART1_DRE */
#define SIG_UART1_TRANS _VECTOR(30) /* UART1_TXC */
@@ -553,4 +565,5 @@
#define FLASHEND 0x7FFF
#endif
+/**@}*/
#endif /* _AVR_IOAT94K_H_ */