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path: root/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c
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Diffstat (limited to 'c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c')
-rw-r--r--c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c216
1 files changed, 0 insertions, 216 deletions
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c
index 54451afe03..4891ddcaa0 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c
@@ -27,222 +27,6 @@
#include <bsp/vectors.h>
#include <bsp/fatal.h>
-#define PPC_EXC_ASSERT_OFFSET(field, off) \
- RTEMS_STATIC_ASSERT( \
- offsetof(CPU_Exception_frame, field) + FRAME_LINK_SPACE == off, \
- CPU_Exception_frame_offset_ ## field \
- )
-
-#define PPC_EXC_ASSERT_CANONIC_OFFSET(field) \
- PPC_EXC_ASSERT_OFFSET(field, field ## _OFFSET)
-
-#define PPC_EXC_MIN_ASSERT_OFFSET(field, off) \
- RTEMS_STATIC_ASSERT( \
- offsetof(ppc_exc_min_frame, field) + FRAME_LINK_SPACE == off, \
- ppc_exc_min_frame_offset_ ## field \
- )
-
-#define PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(field) \
- PPC_EXC_MIN_ASSERT_OFFSET(field, field ## _OFFSET)
-
-PPC_EXC_ASSERT_OFFSET(EXC_SRR0, SRR0_FRAME_OFFSET);
-PPC_EXC_ASSERT_OFFSET(EXC_SRR1, SRR1_FRAME_OFFSET);
-PPC_EXC_ASSERT_OFFSET(_EXC_number, EXCEPTION_NUMBER_OFFSET);
-PPC_EXC_ASSERT_CANONIC_OFFSET(EXC_CR);
-PPC_EXC_ASSERT_CANONIC_OFFSET(EXC_CTR);
-PPC_EXC_ASSERT_CANONIC_OFFSET(EXC_XER);
-PPC_EXC_ASSERT_CANONIC_OFFSET(EXC_LR);
-#ifdef __SPE__
- PPC_EXC_ASSERT_OFFSET(EXC_SPEFSCR, PPC_EXC_SPEFSCR_OFFSET);
- PPC_EXC_ASSERT_OFFSET(EXC_ACC, PPC_EXC_ACC_OFFSET);
-#endif
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR0);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR1);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR2);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR3);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR4);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR5);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR6);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR7);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR8);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR9);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR10);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR11);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR12);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR13);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR14);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR15);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR16);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR17);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR18);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR19);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR20);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR21);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR22);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR23);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR24);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR25);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR26);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR27);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR28);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR29);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR30);
-PPC_EXC_ASSERT_CANONIC_OFFSET(GPR31);
-
-PPC_EXC_MIN_ASSERT_OFFSET(EXC_SRR0, SRR0_FRAME_OFFSET);
-PPC_EXC_MIN_ASSERT_OFFSET(EXC_SRR1, SRR1_FRAME_OFFSET);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(EXC_CR);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(EXC_CTR);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(EXC_XER);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(EXC_LR);
-#ifdef __SPE__
- PPC_EXC_MIN_ASSERT_OFFSET(EXC_SPEFSCR, PPC_EXC_SPEFSCR_OFFSET);
- PPC_EXC_MIN_ASSERT_OFFSET(EXC_ACC, PPC_EXC_ACC_OFFSET);
-#endif
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(GPR0);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(GPR1);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(GPR2);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(GPR3);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(GPR4);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(GPR5);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(GPR6);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(GPR7);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(GPR8);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(GPR9);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(GPR10);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(GPR11);
-PPC_EXC_MIN_ASSERT_CANONIC_OFFSET(GPR12);
-
-#ifdef PPC_MULTILIB_ALTIVEC
-PPC_EXC_ASSERT_OFFSET(VSCR, PPC_EXC_VSCR_OFFSET);
-PPC_EXC_ASSERT_OFFSET(VRSAVE, PPC_EXC_VRSAVE_OFFSET);
-RTEMS_STATIC_ASSERT(PPC_EXC_VR_OFFSET(0) % 16 == 0, PPC_EXC_VR_OFFSET);
-PPC_EXC_ASSERT_OFFSET(V0, PPC_EXC_VR_OFFSET(0));
-PPC_EXC_ASSERT_OFFSET(V1, PPC_EXC_VR_OFFSET(1));
-PPC_EXC_ASSERT_OFFSET(V2, PPC_EXC_VR_OFFSET(2));
-PPC_EXC_ASSERT_OFFSET(V3, PPC_EXC_VR_OFFSET(3));
-PPC_EXC_ASSERT_OFFSET(V4, PPC_EXC_VR_OFFSET(4));
-PPC_EXC_ASSERT_OFFSET(V5, PPC_EXC_VR_OFFSET(5));
-PPC_EXC_ASSERT_OFFSET(V6, PPC_EXC_VR_OFFSET(6));
-PPC_EXC_ASSERT_OFFSET(V7, PPC_EXC_VR_OFFSET(7));
-PPC_EXC_ASSERT_OFFSET(V8, PPC_EXC_VR_OFFSET(8));
-PPC_EXC_ASSERT_OFFSET(V9, PPC_EXC_VR_OFFSET(9));
-PPC_EXC_ASSERT_OFFSET(V10, PPC_EXC_VR_OFFSET(10));
-PPC_EXC_ASSERT_OFFSET(V11, PPC_EXC_VR_OFFSET(11));
-PPC_EXC_ASSERT_OFFSET(V12, PPC_EXC_VR_OFFSET(12));
-PPC_EXC_ASSERT_OFFSET(V13, PPC_EXC_VR_OFFSET(13));
-PPC_EXC_ASSERT_OFFSET(V14, PPC_EXC_VR_OFFSET(14));
-PPC_EXC_ASSERT_OFFSET(V15, PPC_EXC_VR_OFFSET(15));
-PPC_EXC_ASSERT_OFFSET(V16, PPC_EXC_VR_OFFSET(16));
-PPC_EXC_ASSERT_OFFSET(V17, PPC_EXC_VR_OFFSET(17));
-PPC_EXC_ASSERT_OFFSET(V18, PPC_EXC_VR_OFFSET(18));
-PPC_EXC_ASSERT_OFFSET(V19, PPC_EXC_VR_OFFSET(19));
-PPC_EXC_ASSERT_OFFSET(V20, PPC_EXC_VR_OFFSET(20));
-PPC_EXC_ASSERT_OFFSET(V21, PPC_EXC_VR_OFFSET(21));
-PPC_EXC_ASSERT_OFFSET(V22, PPC_EXC_VR_OFFSET(22));
-PPC_EXC_ASSERT_OFFSET(V23, PPC_EXC_VR_OFFSET(23));
-PPC_EXC_ASSERT_OFFSET(V24, PPC_EXC_VR_OFFSET(24));
-PPC_EXC_ASSERT_OFFSET(V25, PPC_EXC_VR_OFFSET(25));
-PPC_EXC_ASSERT_OFFSET(V26, PPC_EXC_VR_OFFSET(26));
-PPC_EXC_ASSERT_OFFSET(V27, PPC_EXC_VR_OFFSET(27));
-PPC_EXC_ASSERT_OFFSET(V28, PPC_EXC_VR_OFFSET(28));
-PPC_EXC_ASSERT_OFFSET(V29, PPC_EXC_VR_OFFSET(29));
-PPC_EXC_ASSERT_OFFSET(V30, PPC_EXC_VR_OFFSET(30));
-PPC_EXC_ASSERT_OFFSET(V31, PPC_EXC_VR_OFFSET(31));
-
-PPC_EXC_MIN_ASSERT_OFFSET(VSCR, PPC_EXC_MIN_VSCR_OFFSET);
-RTEMS_STATIC_ASSERT(PPC_EXC_MIN_VR_OFFSET(0) % 16 == 0, PPC_EXC_MIN_VR_OFFSET);
-PPC_EXC_MIN_ASSERT_OFFSET(V0, PPC_EXC_MIN_VR_OFFSET(0));
-PPC_EXC_MIN_ASSERT_OFFSET(V1, PPC_EXC_MIN_VR_OFFSET(1));
-PPC_EXC_MIN_ASSERT_OFFSET(V2, PPC_EXC_MIN_VR_OFFSET(2));
-PPC_EXC_MIN_ASSERT_OFFSET(V3, PPC_EXC_MIN_VR_OFFSET(3));
-PPC_EXC_MIN_ASSERT_OFFSET(V4, PPC_EXC_MIN_VR_OFFSET(4));
-PPC_EXC_MIN_ASSERT_OFFSET(V5, PPC_EXC_MIN_VR_OFFSET(5));
-PPC_EXC_MIN_ASSERT_OFFSET(V6, PPC_EXC_MIN_VR_OFFSET(6));
-PPC_EXC_MIN_ASSERT_OFFSET(V7, PPC_EXC_MIN_VR_OFFSET(7));
-PPC_EXC_MIN_ASSERT_OFFSET(V8, PPC_EXC_MIN_VR_OFFSET(8));
-PPC_EXC_MIN_ASSERT_OFFSET(V9, PPC_EXC_MIN_VR_OFFSET(9));
-PPC_EXC_MIN_ASSERT_OFFSET(V10, PPC_EXC_MIN_VR_OFFSET(10));
-PPC_EXC_MIN_ASSERT_OFFSET(V11, PPC_EXC_MIN_VR_OFFSET(11));
-PPC_EXC_MIN_ASSERT_OFFSET(V12, PPC_EXC_MIN_VR_OFFSET(12));
-PPC_EXC_MIN_ASSERT_OFFSET(V13, PPC_EXC_MIN_VR_OFFSET(13));
-PPC_EXC_MIN_ASSERT_OFFSET(V14, PPC_EXC_MIN_VR_OFFSET(14));
-PPC_EXC_MIN_ASSERT_OFFSET(V15, PPC_EXC_MIN_VR_OFFSET(15));
-PPC_EXC_MIN_ASSERT_OFFSET(V16, PPC_EXC_MIN_VR_OFFSET(16));
-PPC_EXC_MIN_ASSERT_OFFSET(V17, PPC_EXC_MIN_VR_OFFSET(17));
-PPC_EXC_MIN_ASSERT_OFFSET(V18, PPC_EXC_MIN_VR_OFFSET(18));
-PPC_EXC_MIN_ASSERT_OFFSET(V19, PPC_EXC_MIN_VR_OFFSET(19));
-#endif
-
-#ifdef PPC_MULTILIB_FPU
-RTEMS_STATIC_ASSERT(PPC_EXC_FR_OFFSET(0) % 8 == 0, PPC_EXC_FR_OFFSET);
-PPC_EXC_ASSERT_OFFSET(F0, PPC_EXC_FR_OFFSET(0));
-PPC_EXC_ASSERT_OFFSET(F1, PPC_EXC_FR_OFFSET(1));
-PPC_EXC_ASSERT_OFFSET(F2, PPC_EXC_FR_OFFSET(2));
-PPC_EXC_ASSERT_OFFSET(F3, PPC_EXC_FR_OFFSET(3));
-PPC_EXC_ASSERT_OFFSET(F4, PPC_EXC_FR_OFFSET(4));
-PPC_EXC_ASSERT_OFFSET(F5, PPC_EXC_FR_OFFSET(5));
-PPC_EXC_ASSERT_OFFSET(F6, PPC_EXC_FR_OFFSET(6));
-PPC_EXC_ASSERT_OFFSET(F7, PPC_EXC_FR_OFFSET(7));
-PPC_EXC_ASSERT_OFFSET(F8, PPC_EXC_FR_OFFSET(8));
-PPC_EXC_ASSERT_OFFSET(F9, PPC_EXC_FR_OFFSET(9));
-PPC_EXC_ASSERT_OFFSET(F10, PPC_EXC_FR_OFFSET(10));
-PPC_EXC_ASSERT_OFFSET(F11, PPC_EXC_FR_OFFSET(11));
-PPC_EXC_ASSERT_OFFSET(F12, PPC_EXC_FR_OFFSET(12));
-PPC_EXC_ASSERT_OFFSET(F13, PPC_EXC_FR_OFFSET(13));
-PPC_EXC_ASSERT_OFFSET(F14, PPC_EXC_FR_OFFSET(14));
-PPC_EXC_ASSERT_OFFSET(F15, PPC_EXC_FR_OFFSET(15));
-PPC_EXC_ASSERT_OFFSET(F16, PPC_EXC_FR_OFFSET(16));
-PPC_EXC_ASSERT_OFFSET(F17, PPC_EXC_FR_OFFSET(17));
-PPC_EXC_ASSERT_OFFSET(F18, PPC_EXC_FR_OFFSET(18));
-PPC_EXC_ASSERT_OFFSET(F19, PPC_EXC_FR_OFFSET(19));
-PPC_EXC_ASSERT_OFFSET(F20, PPC_EXC_FR_OFFSET(20));
-PPC_EXC_ASSERT_OFFSET(F21, PPC_EXC_FR_OFFSET(21));
-PPC_EXC_ASSERT_OFFSET(F22, PPC_EXC_FR_OFFSET(22));
-PPC_EXC_ASSERT_OFFSET(F23, PPC_EXC_FR_OFFSET(23));
-PPC_EXC_ASSERT_OFFSET(F24, PPC_EXC_FR_OFFSET(24));
-PPC_EXC_ASSERT_OFFSET(F25, PPC_EXC_FR_OFFSET(25));
-PPC_EXC_ASSERT_OFFSET(F26, PPC_EXC_FR_OFFSET(26));
-PPC_EXC_ASSERT_OFFSET(F27, PPC_EXC_FR_OFFSET(27));
-PPC_EXC_ASSERT_OFFSET(F28, PPC_EXC_FR_OFFSET(28));
-PPC_EXC_ASSERT_OFFSET(F29, PPC_EXC_FR_OFFSET(29));
-PPC_EXC_ASSERT_OFFSET(F30, PPC_EXC_FR_OFFSET(30));
-PPC_EXC_ASSERT_OFFSET(F31, PPC_EXC_FR_OFFSET(31));
-PPC_EXC_ASSERT_OFFSET(FPSCR, PPC_EXC_FPSCR_OFFSET);
-
-RTEMS_STATIC_ASSERT(PPC_EXC_MIN_FR_OFFSET(0) % 8 == 0, PPC_EXC_MIN_FR_OFFSET);
-PPC_EXC_MIN_ASSERT_OFFSET(F0, PPC_EXC_MIN_FR_OFFSET(0));
-PPC_EXC_MIN_ASSERT_OFFSET(F1, PPC_EXC_MIN_FR_OFFSET(1));
-PPC_EXC_MIN_ASSERT_OFFSET(F2, PPC_EXC_MIN_FR_OFFSET(2));
-PPC_EXC_MIN_ASSERT_OFFSET(F3, PPC_EXC_MIN_FR_OFFSET(3));
-PPC_EXC_MIN_ASSERT_OFFSET(F4, PPC_EXC_MIN_FR_OFFSET(4));
-PPC_EXC_MIN_ASSERT_OFFSET(F5, PPC_EXC_MIN_FR_OFFSET(5));
-PPC_EXC_MIN_ASSERT_OFFSET(F6, PPC_EXC_MIN_FR_OFFSET(6));
-PPC_EXC_MIN_ASSERT_OFFSET(F7, PPC_EXC_MIN_FR_OFFSET(7));
-PPC_EXC_MIN_ASSERT_OFFSET(F8, PPC_EXC_MIN_FR_OFFSET(8));
-PPC_EXC_MIN_ASSERT_OFFSET(F9, PPC_EXC_MIN_FR_OFFSET(9));
-PPC_EXC_MIN_ASSERT_OFFSET(F10, PPC_EXC_MIN_FR_OFFSET(10));
-PPC_EXC_MIN_ASSERT_OFFSET(F11, PPC_EXC_MIN_FR_OFFSET(11));
-PPC_EXC_MIN_ASSERT_OFFSET(F12, PPC_EXC_MIN_FR_OFFSET(12));
-PPC_EXC_MIN_ASSERT_OFFSET(F13, PPC_EXC_MIN_FR_OFFSET(13));
-PPC_EXC_MIN_ASSERT_OFFSET(FPSCR, PPC_EXC_MIN_FPSCR_OFFSET);
-#endif
-
-RTEMS_STATIC_ASSERT(
- PPC_EXC_MINIMAL_FRAME_SIZE % CPU_STACK_ALIGNMENT == 0,
- PPC_EXC_MINIMAL_FRAME_SIZE
-);
-
-RTEMS_STATIC_ASSERT(
- PPC_EXC_FRAME_SIZE % CPU_STACK_ALIGNMENT == 0,
- PPC_EXC_FRAME_SIZE
-);
-
-RTEMS_STATIC_ASSERT(
- sizeof(CPU_Exception_frame) + FRAME_LINK_SPACE <= PPC_EXC_FRAME_SIZE,
- CPU_Exception_frame
-);
-
uint32_t ppc_exc_cache_wb_check = 1;
#define MTIVPR(prefix) __asm__ volatile ("mtivpr %0" : : "r" (prefix))