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Diffstat (limited to 'c/src/lib/libcpu/arm/shared/include/am335x.h')
-rw-r--r--c/src/lib/libcpu/arm/shared/include/am335x.h168
1 files changed, 168 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/arm/shared/include/am335x.h b/c/src/lib/libcpu/arm/shared/include/am335x.h
index 37c5eeb666..2009cefacb 100644
--- a/c/src/lib/libcpu/arm/shared/include/am335x.h
+++ b/c/src/lib/libcpu/arm/shared/include/am335x.h
@@ -300,3 +300,171 @@
#define AM335X_RTC_KICK0_KEY 0x83E70B13
#define AM335X_RTC_KICK1_KEY 0x95A4F1E0
+
+/* GPIO memory-mapped registers */
+
+#define AM335X_GPIO0_BASE 0x44E07000
+ /* GPIO Bank 0 base Register */
+#define AM335X_GPIO1_BASE 0x4804C000
+ /* GPIO Bank 1 base Register */
+#define AM335X_GPIO2_BASE 0x481AC000
+ /* GPIO Bank 2 base Register */
+#define AM335X_GPIO3_BASE 0x481AE000
+ /* GPIO Bank 3 base Register */
+
+#define AM335X_GPIO_REVISION 0x00
+#define AM335X_GPIO_SYSCONFIG 0x10
+#define AM335X_GPIO_EOI 0x20
+#define AM335X_GPIO_IRQSTATUS_RAW_0 0x24
+#define AM335X_GPIO_IRQSTATUS_RAW_1 0x28
+#define AM335X_GPIO_IRQSTATUS_0 0x2C
+#define AM335X_GPIO_IRQSTATUS_1 0x30
+#define AM335X_GPIO_IRQSTATUS_SET_0 0x34
+#define AM335X_GPIO_IRQSTATUS_SET_1 0x38
+#define AM335X_GPIO_IRQSTATUS_CLR_0 0x3C
+#define AM335X_GPIO_IRQSTATUS_CLR_1 0x40
+#define AM335X_GPIO_IRQWAKEN_0 0x44
+#define AM335X_GPIO_IRQWAKEN_1 0x48
+#define AM335X_GPIO_SYSSTATUS 0x114
+#define AM335X_GPIO_CTRL 0x130
+#define AM335X_GPIO_OE 0x134
+#define AM335X_GPIO_DATAIN 0x138
+#define AM335X_GPIO_DATAOUT 0x13C
+#define AM335X_GPIO_LEVELDETECT0 0x140
+#define AM335X_GPIO_LEVELDETECT1 0x144
+#define AM335X_GPIO_RISINGDETECT 0x148
+#define AM335X_GPIO_FALLINGDETECT 0x14C
+#define AM335X_GPIO_DEBOUNCENABLE 0x150
+#define AM335X_GPIO_DEBOUNCINGTIME 0x154
+#define AM335X_GPIO_CLEARDATAOUT 0x190
+#define AM335X_GPIO_SETDATAOUT 0x194
+
+/* AM335X Pad Configuration Register Base */
+#define AM335X_PADCONF_BASE 0x44E10000
+
+/* Memory mapped register offset for Control Module */
+#define AM335X_CONF_GPMC_AD0 0x800
+#define AM335X_CONF_GPMC_AD1 0x804
+#define AM335X_CONF_GPMC_AD2 0x808
+#define AM335X_CONF_GPMC_AD3 0x80C
+#define AM335X_CONF_GPMC_AD4 0x810
+#define AM335X_CONF_GPMC_AD5 0x814
+#define AM335X_CONF_GPMC_AD6 0x818
+#define AM335X_CONF_GPMC_AD7 0x81C
+#define AM335X_CONF_GPMC_AD8 0x820
+#define AM335X_CONF_GPMC_AD9 0x824
+#define AM335X_CONF_GPMC_AD10 0x828
+#define AM335X_CONF_GPMC_AD11 0x82C
+#define AM335X_CONF_GPMC_AD12 0x830
+#define AM335X_CONF_GPMC_AD13 0x834
+#define AM335X_CONF_GPMC_AD14 0x838
+#define AM335X_CONF_GPMC_AD15 0x83C
+#define AM335X_CONF_GPMC_A0 0x840
+#define AM335X_CONF_GPMC_A1 0x844
+#define AM335X_CONF_GPMC_A2 0x848
+#define AM335X_CONF_GPMC_A3 0x84C
+#define AM335X_CONF_GPMC_A4 0x850
+#define AM335X_CONF_GPMC_A5 0x854
+#define AM335X_CONF_GPMC_A6 0x858
+#define AM335X_CONF_GPMC_A7 0x85C
+#define AM335X_CONF_GPMC_A8 0x860
+#define AM335X_CONF_GPMC_A9 0x864
+#define AM335X_CONF_GPMC_A10 0x868
+#define AM335X_CONF_GPMC_A11 0x86C
+#define AM335X_CONF_GPMC_WAIT0 0x870
+#define AM335X_CONF_GPMC_WPN 0x874
+#define AM335X_CONF_GPMC_BEN1 0x878
+#define AM335X_CONF_GPMC_CSN0 0x87C
+#define AM335X_CONF_GPMC_CSN1 0x880
+#define AM335X_CONF_GPMC_CSN2 0x884
+#define AM335X_CONF_GPMC_CSN3 0x888
+#define AM335X_CONF_GPMC_CLK 0x88C
+#define AM335X_CONF_GPMC_ADVN_ALE 0x890
+#define AM335X_CONF_GPMC_OEN_REN 0x894
+#define AM335X_CONF_GPMC_WEN 0x898
+#define AM335X_CONF_GPMC_BEN0_CLE 0x89C
+#define AM335X_CONF_LCD_DATA0 0x8A0
+#define AM335X_CONF_LCD_DATA1 0x8A4
+#define AM335X_CONF_LCD_DATA2 0x8A8
+#define AM335X_CONF_LCD_DATA3 0x8AC
+#define AM335X_CONF_LCD_DATA4 0x8B0
+#define AM335X_CONF_LCD_DATA5 0x8B4
+#define AM335X_CONF_LCD_DATA6 0x8B8
+#define AM335X_CONF_LCD_DATA7 0x8BC
+#define AM335X_CONF_LCD_DATA8 0x8C0
+#define AM335X_CONF_LCD_DATA9 0x8C4
+#define AM335X_CONF_LCD_DATA10 0x8C8
+#define AM335X_CONF_LCD_DATA11 0x8CC
+#define AM335X_CONF_LCD_DATA12 0x8D0
+#define AM335X_CONF_LCD_DATA13 0x8D4
+#define AM335X_CONF_LCD_DATA14 0x8D8
+#define AM335X_CONF_LCD_DATA15 0x8DC
+#define AM335X_CONF_LCD_VSYNC 0x8E0
+#define AM335X_CONF_LCD_HSYNC 0x8E4
+#define AM335X_CONF_LCD_PCLK 0x8E8
+#define AM335X_CONF_LCD_AC_BIAS_EN 0x8EC
+#define AM335X_CONF_MMC0_DAT3 0x8F0
+#define AM335X_CONF_MMC0_DAT2 0x8F4
+#define AM335X_CONF_MMC0_DAT1 0x8F8
+#define AM335X_CONF_MMC0_DAT0 0x8FC
+#define AM335X_CONF_MMC0_CLK 0x900
+#define AM335X_CONF_MMC0_CMD 0x904
+#define AM335X_CONF_MII1_COL 0x908
+#define AM335X_CONF_MII1_CRS 0x90C
+#define AM335X_CONF_MII1_RX_ER 0x910
+#define AM335X_CONF_MII1_TX_EN 0x914
+#define AM335X_CONF_MII1_RX_DV 0x918
+#define AM335X_CONF_MII1_TXD3 0x91C
+#define AM335X_CONF_MII1_TXD2 0x920
+#define AM335X_CONF_MII1_TXD1 0x924
+#define AM335X_CONF_MII1_TXD0 0x928
+#define AM335X_CONF_MII1_TX_CLK 0x92C
+#define AM335X_CONF_MII1_RX_CLK 0x930
+#define AM335X_CONF_MII1_RXD3 0x934
+#define AM335X_CONF_MII1_RXD2 0x938
+#define AM335X_CONF_MII1_RXD1 0x93C
+#define AM335X_CONF_MII1_RXD0 0x940
+#define AM335X_CONF_RMII1_REF_CLK 0x944
+#define AM335X_CONF_MDIO 0x948
+#define AM335X_CONF_MDC 0x94C
+#define AM335X_CONF_SPI0_SCLK 0x950
+#define AM335X_CONF_SPI0_D0 0x954
+#define AM335X_CONF_SPI0_D1 0x958
+#define AM335X_CONF_SPI0_CS0 0x95C
+#define AM335X_CONF_SPI0_CS1 0x960
+#define AM335X_CONF_ECAP0_IN_PWM0_OUT 0x964
+#define AM335X_CONF_UART0_CTSN 0x968
+#define AM335X_CONF_UART0_RTSN 0x96C
+#define AM335X_CONF_UART0_RXD 0x970
+#define AM335X_CONF_UART0_TXD 0x974
+#define AM335X_CONF_UART1_CTSN 0x978
+#define AM335X_CONF_UART1_RTSN 0x97C
+#define AM335X_CONF_UART1_RXD 0x980
+#define AM335X_CONF_UART1_TXD 0x984
+#define AM335X_CONF_I2C0_SDA 0x988
+#define AM335X_CONF_I2C0_SCL 0x98C
+#define AM335X_CONF_MCASP0_ACLKX 0x990
+#define AM335X_CONF_MCASP0_FSX 0x994
+#define AM335X_CONF_MCASP0_AXR0 0x998
+#define AM335X_CONF_MCASP0_AHCLKR 0x99C
+#define AM335X_CONF_MCASP0_ACLKR 0x9A0
+#define AM335X_CONF_MCASP0_FSR 0x9A4
+#define AM335X_CONF_MCASP0_AXR1 0x9A8
+#define AM335X_CONF_MCASP0_AHCLKX 0x9AC
+#define AM335X_CONF_XDMA_EVENT_INTR0 0x9B0
+#define AM335X_CONF_XDMA_EVENT_INTR1 0x9B4
+#define AM335X_CONF_WARMRSTN 0x9B8
+#define AM335X_CONF_NNMI 0x9C0
+#define AM335X_CONF_TMS 0x9D0
+#define AM335X_CONF_TDI 0x9D4
+#define AM335X_CONF_TDO 0x9D8
+#define AM335X_CONF_TCK 0x9DC
+#define AM335X_CONF_TRSTN 0x9E0
+#define AM335X_CONF_EMU0 0x9E4
+#define AM335X_CONF_EMU1 0x9E8
+#define AM335X_CONF_RTC_PWRONRSTN 0x9F8
+#define AM335X_CONF_PMIC_POWER_EN 0x9FC
+#define AM335X_CONF_EXT_WAKEUP 0xA00
+#define AM335X_CONF_RTC_KALDO_ENN 0xA04
+#define AM335X_CONF_USB0_DRVVBUS 0xA1C
+#define AM335X_CONF_USB1_DRVVBUS 0xA34 \ No newline at end of file