diff options
Diffstat (limited to 'c/src/lib/libbsp/arm/tms570/include/tms570.h')
| -rw-r--r-- | c/src/lib/libbsp/arm/tms570/include/tms570.h | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/c/src/lib/libbsp/arm/tms570/include/tms570.h b/c/src/lib/libbsp/arm/tms570/include/tms570.h index 2023a29040..50f1315fd4 100644 --- a/c/src/lib/libbsp/arm/tms570/include/tms570.h +++ b/c/src/lib/libbsp/arm/tms570/include/tms570.h @@ -7,15 +7,9 @@ */ /* - * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com> + * Copyright (c) 2015 Taller Technologies. * - * Google Summer of Code 2014 at - * Czech Technical University in Prague - * Zikova 1903/4 - * 166 36 Praha 6 - * Czech Republic - * - * Based on LPC24xx and LPC1768 BSP + * @author Martin Galvan <martin.galvan@tallertechnologies.com> * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -25,4 +19,13 @@ #ifndef LIBBSP_ARM_TMS570_H #define LIBBSP_ARM_TMS570_H +#define SYSECR (*(uint32_t *)0xFFFFFFE0u) /* System Exception Control Register */ +#define ESMIOFFHR (*(uint32_t *)0xFFFFF528) /* ESM Interrupt Offset High Register */ +#define ESMSR1 (*(uint32_t *)0xFFFFF518u) /* ESM Status Register 1 */ +#define ESMSR2 (*(uint32_t *)0xFFFFF51Cu) /* ESM Status Register 2 */ +#define ESMSR3 (*(uint32_t *)0xFFFFF520u) /* ESM Status Register 3 */ +#define ESMSR4 (*(uint32_t *)0xFFFFF558u) /* ESM Status Register 4 */ + +#define SYSECR_RESET 0x80000u + #endif /* LIBBSP_ARM_TMS570_H */ |