diff options
Diffstat (limited to 'c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h')
| -rw-r--r-- | c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h | 79 |
1 files changed, 71 insertions, 8 deletions
diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h b/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h index c33e22ab8e..ddcd4ffde9 100644 --- a/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h +++ b/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h @@ -1,6 +1,5 @@ - /** - * @file + * @file raspberrypi.h * * @ingroup raspberrypi_reg * @@ -8,7 +7,8 @@ */ /* - * Copyright (c) 2013 Alan Cudmore. + * Copyright (c) 2014 Andre Marques <andre.lousa.marques at gmail.com> + * Copyright (c) 2013 Alan Cudmore. * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -93,8 +93,16 @@ #define BCM2835_GPIO_GPFSEL1 (BCM2835_GPIO_REGS_BASE+0x04) #define BCM2835_GPIO_GPSET0 (BCM2835_GPIO_REGS_BASE+0x1C) #define BCM2835_GPIO_GPCLR0 (BCM2835_GPIO_REGS_BASE+0x28) +#define BCM2835_GPIO_GPLEV0 (BCM2835_GPIO_REGS_BASE+0x34) +#define BCM2835_GPIO_GPEDS0 (BCM2835_GPIO_REGS_BASE+0x40) +#define BCM2835_GPIO_GPREN0 (BCM2835_GPIO_REGS_BASE+0x4C) +#define BCM2835_GPIO_GPFEN0 (BCM2835_GPIO_REGS_BASE+0x58) +#define BCM2835_GPIO_GPHEN0 (BCM2835_GPIO_REGS_BASE+0x64) +#define BCM2835_GPIO_GPLEN0 (BCM2835_GPIO_REGS_BASE+0x70) +#define BCM2835_GPIO_GPAREN0 (BCM2835_GPIO_REGS_BASE+0x7C) +#define BCM2835_GPIO_GPAFEN0 (BCM2835_GPIO_REGS_BASE+0x88) #define BCM2835_GPIO_GPPUD (BCM2835_GPIO_REGS_BASE+0x94) -#define BCM2835_GPIO_GPPUDCLK0 (BCM2835_GPIO_REGS_BASE+0x98) +#define BCM2835_GPIO_GPPUDCLK0 (BCM2835_GPIO_REGS_BASE+0x98) /** @} */ @@ -121,14 +129,12 @@ /** @} */ - /** * @name UART 0 (PL011) Registers * * @{ */ - #define BCM2835_UART0_BASE (RPI_PERIPHERAL_BASE + 0x201000) #define BCM2835_UART0_DR (BCM2835_UART0_BASE+0x00) @@ -159,9 +165,68 @@ #define BCM2835_UART0_ICR_RX 0x10 #define BCM2835_UART0_ICR_TX 0x20 +/** @} */ + +/** + * @name I2C (BSC) Registers + * + * @{ + */ + +#define BCM2835_I2C_BASE (0x20804000) + +#define BCM2835_I2C_C (BCM2835_I2C_BASE+0x00) +#define BCM2835_I2C_S (BCM2835_I2C_BASE+0x04) +#define BCM2835_I2C_DLEN (BCM2835_I2C_BASE+0x08) +#define BCM2835_I2C_A (BCM2835_I2C_BASE+0x0C) +#define BCM2835_I2C_FIFO (BCM2835_I2C_BASE+0x10) +#define BCM2835_I2C_DIV (BCM2835_I2C_BASE+0x14) +#define BCM2835_I2C_DEL (BCM2835_I2C_BASE+0x18) +#define BCM2835_I2C_CLKT (BCM2835_I2C_BASE+0x1C) /** @} */ +/** + * @name SPI Registers + * + * @{ + */ + +#define BCM2835_SPI_BASE (0x20204000) + +#define BCM2835_SPI_CS (BCM2835_SPI_BASE+0x00) +#define BCM2835_SPI_FIFO (BCM2835_SPI_BASE+0x04) +#define BCM2835_SPI_CLK (BCM2835_SPI_BASE+0x08) +#define BCM2835_SPI_DLEN (BCM2835_SPI_BASE+0x0C) +#define BCM2835_SPI_LTOH (BCM2835_SPI_BASE+0x10) +#define BCM2835_SPI_DC (BCM2835_SPI_BASE+0x14) + +/** @} */ + +/** + * @name I2C/SPI slave BSC Registers + * + * @{ + */ + +#define BCM2835_I2C_SPI_BASE (0x20214000) + +#define BCM2835_I2C_SPI_DR (BCM2835_I2C_SPI_BASE+0x00) +#define BCM2835_I2C_SPI_RSR (BCM2835_I2C_SPI_BASE+0x04) +#define BCM2835_I2C_SPI_SLV (BCM2835_I2C_SPI_BASE+0x08) +#define BCM2835_I2C_SPI_CR (BCM2835_I2C_SPI_BASE+0x0C) +#define BCM2835_I2C_SPI_FR (BCM2835_I2C_SPI_BASE+0x10) +#define BCM2835_I2C_SPI_IFLS (BCM2835_I2C_SPI_BASE+0x14) +#define BCM2835_I2C_SPI_IMSC (BCM2835_I2C_SPI_BASE+0x18) +#define BCM2835_I2C_SPI_RIS (BCM2835_I2C_SPI_BASE+0x1C) +#define BCM2835_I2C_SPI_MIS (BCM2835_I2C_SPI_BASE+0x20) +#define BCM2835_I2C_SPI_ICR (BCM2835_I2C_SPI_BASE+0x24) +#define BCM2835_I2C_SPI_DMACR (BCM2835_I2C_SPI_BASE+0x28) +#define BCM2835_I2C_SPI_TDR (BCM2835_I2C_SPI_BASE+0x2C) +#define BCM2835_I2C_SPI_GPUSTAT (BCM2835_I2C_SPI_BASE+0x30) +#define BCM2835_I2C_SPI_HCTRL (BCM2835_I2C_SPI_BASE+0x34) + +/** @} */ /** * @name IRQ Registers @@ -184,7 +249,6 @@ /** @} */ - /** * @name GPU Timer Registers * @@ -208,7 +272,6 @@ /** @} */ - /** @} */ #endif /* LIBBSP_ARM_RASPBERRYPI_RASPBERRYPI_H */ |