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Diffstat (limited to 'bsps/sh/gensh2/start/linkcmds.ram')
| -rw-r--r-- | bsps/sh/gensh2/start/linkcmds.ram | 244 |
1 files changed, 244 insertions, 0 deletions
diff --git a/bsps/sh/gensh2/start/linkcmds.ram b/bsps/sh/gensh2/start/linkcmds.ram new file mode 100644 index 0000000000..c5349398ff --- /dev/null +++ b/bsps/sh/gensh2/start/linkcmds.ram @@ -0,0 +1,244 @@ +/* + * This is an adapted linker script from egcs-1.0.1 + * + * Memory layout for an SH7045F with main memory in area 2 + * This memory layout it very similar to that used for Hitachi's + * EVB with CMON in FLASH + * + * NOTE: The ram start address may vary, all other start addresses are fixed + * Not suiteable for gdb's simulator + * + * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and + * Bernd Becker (becker@faw.uni-ulm.de) + * + * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * + * COPYRIGHT (c) 1998. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + * + * Modified to reflect SH7045F processor and EVB: + * John M. Mills (jmills@tga.com) + * TGA Technologies, Inc. + * 100 Pinnacle Way, Suite 140 + * Norcross, GA 30071 U.S.A. + * + * This modified file may be copied and distributed in accordance + * the above-referenced license. It is provided for critique and + * developmental purposes without any warranty nor representation + * by the authors or by TGA Technologies. + */ + +OUTPUT_ARCH(sh) +ENTRY(_start) +STARTUP(start.o) + +/* These assignments load code into SH7045F EVB SRAM for monitor debugging */ +_RamBase = DEFINED(_RamBase) ? _RamBase : 0x00440000; +_RamSize = DEFINED(_RamSize) ? _RamSize : 512K; +_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0; + +MEMORY +{ + rom : o = 0x00400000, l = 0x00040000 + ram : o = 0x00440000, l = 0x00080000 + onchip_peri : o = 0xFFFF8000, l = 0x00000800 + onchip_ram : o = 0xFFFFF000, l = 0x00001000 +} + +/* Sections are defined for RAM loading and monitor debugging */ +SECTIONS +{ + /* boot vector table */ + .monvects 0x00400000 (NOLOAD): { + _monvects = . ; + } > rom + + /* monitor play area */ + .monram 0x00440000 (NOLOAD) : + { + _ramstart = .; + } > ram + + /* monitor vector table */ + .vects 0x00442000 (NOLOAD) : { + _vectab = . ; + *(.vects); + } + + /* Read-only sections, merged into text segment: */ + + . = 0x00444000 ; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rela.dyn : + { + *(.rela.init) + *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) + *(.rela.fini) + *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) + *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) + *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) + *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) + *(.rela.ctors) + *(.rela.dtors) + *(.rela.got) + *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*) + *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*) + *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*) + *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*) + *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) + } >ram + .rel.text : + { *(.rel.text) *(.rel.gnu.linkonce.t*) } + .rel.data : + { *(.rel.data) *(.rel.gnu.linkonce.d*) } + .rel.rodata : + { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } + .rel.got : { *(.rel.got) } + .rel.ctors : { *(.rel.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rel.init : { *(.rel.init) } + .rel.fini : { *(.rel.fini) } + .rel.bss : { *(.rel.bss) } + .rel.plt : { *(.rel.plt) } + .init : { *(.init) } =0 + .plt : { *(.plt) } + .text . : + { + *(.text*) + *(.stub) + + /* + * Special FreeBSD sysctl sections. + */ + . = ALIGN (16); + ___start_set_sysctl_set = .; + *(set_sysc*); /* set_sysctl_* but name is truncated by SH-coff */ + ___stop_set_sysctl_set = ABSOLUTE(.); + *(set_doma*); /* set_domain_* but name is truncated by SH-coff */ + *(set_pseudo_*); + + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.gnu.linkonce.t*) + } > ram + _etext = .; + PROVIDE (etext = .); + .fini . : { *(.fini) } > ram =0 + .rodata . : { *(.rodata) KEEP (*(SORT(.rtemsroset.*))) *(.gnu.linkonce.r*) } > ram + .rodata1 . : { *(.rodata1) } > ram + .tdata : { + __TLS_Data_begin = .; + *(.tdata .tdata.* .gnu.linkonce.td.*) + __TLS_Data_end = .; + } > ram + .tbss : { + __TLS_BSS_begin = .; + *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) + __TLS_BSS_end = .; + } > ram + __TLS_Data_size = __TLS_Data_end - __TLS_Data_begin; + __TLS_Data_begin = __TLS_Data_size != 0 ? __TLS_Data_begin : __TLS_BSS_begin; + __TLS_Data_end = __TLS_Data_size != 0 ? __TLS_Data_end : __TLS_BSS_begin; + __TLS_BSS_size = __TLS_BSS_end - __TLS_BSS_begin; + __TLS_Size = __TLS_BSS_end - __TLS_Data_begin; + __TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss)); + /* Adjust the address for the data segment. We want to adjust up to + the same address within the page on the next page up. */ + . = ALIGN(128) + (. & (128 - 1)); + .data . : + { + *(.data) + KEEP (*(SORT(.rtemsrwset.*))) + *(.gnu.linkonce.d*) + CONSTRUCTORS + } > ram + .data1 . : { *(.data1) } + .ctors . : + { + ___ctors = .; + *(.ctors) + ___ctors_end = .; + } + .dtors . : + { + ___dtors = .; + *(.dtors) + ___dtors_end = .; + } + .got . : { *(.got.plt) *(.got) } + .dynamic . : { *(.dynamic) } + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + .sdata . : { *(.sdata) } + _edata = .; + PROVIDE (edata = .); + __bss_start = .; + .sbss . : { *(.sbss*) *(.scommon) } + .bss . : + { + *(.dynbss) + *(.bss .bss* .gnu.linkonce.b*) + *(COMMON) + } > ram + _end = . ; + PROVIDE (end = .); + + _WorkAreaBase = . ; + . = 0x00480000 ; + + _CPU_Interrupt_stack_low = 0xFFFFF000; + _CPU_Interrupt_stack_high = 0xFFFFFFFF; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + .stack 0xFFFFFEC0 : { _stack = .; *(.stack) } > onchip_ram + /* These must appear regardless of . */ +} |