diff options
Diffstat (limited to 'bsps/powerpc/mpc55xxevb/start/exc-vector-base.S')
| -rw-r--r-- | bsps/powerpc/mpc55xxevb/start/exc-vector-base.S | 124 |
1 files changed, 124 insertions, 0 deletions
diff --git a/bsps/powerpc/mpc55xxevb/start/exc-vector-base.S b/bsps/powerpc/mpc55xxevb/start/exc-vector-base.S new file mode 100644 index 0000000000..9d9e79f351 --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/start/exc-vector-base.S @@ -0,0 +1,124 @@ +/** + * @file + * + * @ingroup mpc55xx_asm + * + * @brief Exception minimum prologues. + */ + +/* + * Copyright (c) 2011-2012 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Obere Lagerstr. 30 + * 82178 Puchheim + * Germany + * <rtems@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +/** + * @defgroup mpc55xx_asm Assembler files + * + * @ingroup mpc55xx + */ + +#include <bspopts.h> + +#include <bsp/vectors.h> + + .globl mpc55xx_exc_vector_base + + .section ".bsp_text", "ax" + +#if 5510 <= MPC55XX_CHIP_TYPE && MPC55XX_CHIP_TYPE <= 5517 + .align 12 +#else + .align 16 +#endif + +mpc55xx_exc_vector_base: + + stw r1, ppc_exc_lock_crit@sdarel(r13) + stw r4, ppc_exc_vector_register_crit@sdarel(r13) + li r4, -32767 + b ppc_exc_wrap_bookE_crit + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 2 + b ppc_exc_wrap_nopush_bookE_crit + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 3 + b ppc_exc_wrap_nopush_std + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 4 + b ppc_exc_wrap_nopush_std + stwu r1, -PPC_EXC_INTERRUPT_FRAME_SIZE(r1) + stw r3, GPR3_OFFSET(r1) + li r3, -32763 + b ppc_exc_interrupt + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 6 + b ppc_exc_wrap_nopush_std + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 7 + b ppc_exc_wrap_nopush_std + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 8 + b ppc_exc_wrap_nopush_std + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 12 + b ppc_exc_wrap_nopush_std + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 24 + b ppc_exc_wrap_nopush_std + stwu r1, -PPC_EXC_INTERRUPT_FRAME_SIZE(r1) + stw r3, GPR3_OFFSET(r1) + li r3, -32752 + b ppc_exc_interrupt + stwu r1, -PPC_EXC_INTERRUPT_FRAME_SIZE(r1) + stw r3, GPR3_OFFSET(r1) + li r3, -32749 + b ppc_exc_interrupt + stw r1, ppc_exc_lock_crit@sdarel(r13) + stw r4, ppc_exc_vector_register_crit@sdarel(r13) + li r4, -32748 + b ppc_exc_wrap_bookE_crit + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 18 + b ppc_exc_wrap_nopush_std + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 17 + b ppc_exc_wrap_nopush_std + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 13 + b ppc_exc_wrap_nopush_bookE_crit + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 10 + b ppc_exc_wrap_nopush_std + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 25 + b ppc_exc_wrap_nopush_std + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 26 + b ppc_exc_wrap_nopush_std + stwu r1, -EXC_GENERIC_SIZE(r1) + stw r4, GPR4_OFFSET(r1) + li r4, 15 + b ppc_exc_wrap_nopush_std |