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Diffstat (limited to 'bsps/arm/stm32h7/include/stm32h7xx_ll_sdmmc.h')
-rw-r--r--bsps/arm/stm32h7/include/stm32h7xx_ll_sdmmc.h26
1 files changed, 26 insertions, 0 deletions
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_ll_sdmmc.h b/bsps/arm/stm32h7/include/stm32h7xx_ll_sdmmc.h
index 51ec6e9abc..8d5d03e255 100644
--- a/bsps/arm/stm32h7/include/stm32h7xx_ll_sdmmc.h
+++ b/bsps/arm/stm32h7/include/stm32h7xx_ll_sdmmc.h
@@ -38,6 +38,7 @@
/* Exported types ------------------------------------------------------------*/
/** @defgroup SDMMC_LL_Exported_Types SDMMC_LL Exported Types
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -125,6 +126,7 @@ typedef struct
/* Exported constants --------------------------------------------------------*/
/** @defgroup SDMMC_LL_Exported_Constants SDMMC_LL Exported Constants
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
@@ -324,6 +326,7 @@ typedef struct
#define SDMMC_STOPTRANSFERTIMEOUT ((uint32_t)100000000U) /* Timeout for STOP TRANSMISSION command */
/** @defgroup SDMMC_LL_Clock_Edge Clock Edge
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_CLOCK_EDGE_RISING ((uint32_t)0x00000000U)
@@ -336,6 +339,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Clock_Power_Save Clock Power Saving
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_CLOCK_POWER_SAVE_DISABLE ((uint32_t)0x00000000U)
@@ -348,6 +352,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Bus_Wide Bus Width
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_BUS_WIDE_1B ((uint32_t)0x00000000U)
@@ -362,6 +367,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Speed_Mode
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_SPEED_MODE_AUTO ((uint32_t)0x00000000U)
@@ -381,6 +387,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Hardware_Flow_Control Hardware Flow Control
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_HARDWARE_FLOW_CONTROL_DISABLE ((uint32_t)0x00000000U)
@@ -393,6 +400,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Clock_Division Clock Division
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
/* SDMMC_CK frequency = SDMMCCLK / [2 * CLKDIV] */
@@ -402,6 +410,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_TRANSCEIVER_PRESENT Tranceiver Present
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_TRANSCEIVER_UNKNOWN ((uint32_t)0x00000000U)
@@ -413,6 +422,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Command_Index Command Index
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define IS_SDMMC_CMD_INDEX(INDEX) ((INDEX) < 0x40U)
@@ -421,6 +431,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Response_Type Response Type
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_RESPONSE_NO ((uint32_t)0x00000000U)
@@ -435,6 +446,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Wait_Interrupt_State Wait Interrupt
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_WAIT_NO ((uint32_t)0x00000000U)
@@ -449,6 +461,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_CPSM_State CPSM State
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_CPSM_DISABLE ((uint32_t)0x00000000U)
@@ -461,6 +474,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Response_Registers Response Register
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_RESP1 ((uint32_t)0x00000000U)
@@ -474,6 +488,7 @@ typedef struct
((RESP) == SDMMC_RESP4))
/** @defgroup SDMMC_Internal_DMA_Mode SDMMC Internal DMA Mode
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_DISABLE_IDMA ((uint32_t)0x00000000)
@@ -486,6 +501,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Data_Length Data Lenght
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define IS_SDMMC_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFFU)
@@ -494,6 +510,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Data_Block_Size Data Block Size
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_DATABLOCK_SIZE_1B ((uint32_t)0x00000000U)
@@ -532,6 +549,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Transfer_Direction Transfer Direction
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_TRANSFER_DIR_TO_CARD ((uint32_t)0x00000000U)
@@ -544,6 +562,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Transfer_Type Transfer Type
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_TRANSFER_MODE_BLOCK ((uint32_t)0x00000000U)
@@ -556,6 +575,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_DPSM_State DPSM State
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_DPSM_DISABLE ((uint32_t)0x00000000U)
@@ -568,6 +588,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Read_Wait_Mode Read Wait Mode
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_READ_WAIT_MODE_DATA2 ((uint32_t)0x00000000U)
@@ -580,6 +601,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Interrupt_sources Interrupt Sources
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_IT_CCRCFAIL SDMMC_MASK_CCRCFAILIE
@@ -610,6 +632,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Flags Flags
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define SDMMC_FLAG_CCRCFAIL SDMMC_STA_CCRCFAIL
@@ -667,10 +690,12 @@ typedef struct
/* Exported macro ------------------------------------------------------------*/
/** @defgroup SDMMC_LL_Exported_macros SDMMC_LL Exported Macros
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
/** @defgroup SDMMC_LL_Register Bits And Addresses Definitions
+ * @ingroup RTEMSBSPsARMSTM32H7
* @brief SDMMC_LL registers bit address in the alias region
* @{
*/
@@ -707,6 +732,7 @@ typedef struct
*/
/** @defgroup SDMMC_LL_Interrupt_Clock Interrupt And Clock Configuration
+ * @ingroup RTEMSBSPsARMSTM32H7
* @brief macros to handle interrupts and specific clock configurations
* @{
*/