summaryrefslogtreecommitdiffstats
path: root/bsps/arm/stm32h7/include/stm32h7xx_ll_lptim.h
diff options
context:
space:
mode:
Diffstat (limited to 'bsps/arm/stm32h7/include/stm32h7xx_ll_lptim.h')
-rw-r--r--bsps/arm/stm32h7/include/stm32h7xx_ll_lptim.h31
1 files changed, 31 insertions, 0 deletions
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_ll_lptim.h b/bsps/arm/stm32h7/include/stm32h7xx_ll_lptim.h
index fd04c48699..d90cb1b66b 100644
--- a/bsps/arm/stm32h7/include/stm32h7xx_ll_lptim.h
+++ b/bsps/arm/stm32h7/include/stm32h7xx_ll_lptim.h
@@ -35,6 +35,7 @@ extern "C" {
#if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3) || defined (LPTIM4) || defined (LPTIM5)
/** @defgroup LPTIM_LL LPTIM
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -46,6 +47,7 @@ extern "C" {
/* Private macros ------------------------------------------------------------*/
#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
/** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
/**
@@ -56,6 +58,7 @@ extern "C" {
/* Exported types ------------------------------------------------------------*/
#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
/** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -92,10 +95,12 @@ typedef struct
/* Exported constants --------------------------------------------------------*/
/** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
/** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
+ * @ingroup RTEMSBSPsARMSTM32H7
* @brief Flags defines which can be used with LL_LPTIM_ReadReg function
* @{
*/
@@ -111,6 +116,7 @@ typedef struct
*/
/** @defgroup LPTIM_LL_EC_IT IT Defines
+ * @ingroup RTEMSBSPsARMSTM32H7
* @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
* @{
*/
@@ -126,6 +132,7 @@ typedef struct
*/
/** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
@@ -135,6 +142,7 @@ typedef struct
*/
/** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
@@ -144,6 +152,7 @@ typedef struct
*/
/** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
@@ -153,6 +162,7 @@ typedef struct
*/
/** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINOUS or SINGLE*/
@@ -162,6 +172,7 @@ typedef struct
*/
/** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
@@ -171,6 +182,7 @@ typedef struct
*/
/** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
@@ -186,6 +198,7 @@ typedef struct
*/
/** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
@@ -212,6 +225,7 @@ typedef struct
*/
/** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
@@ -223,6 +237,7 @@ typedef struct
*/
/** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
@@ -233,6 +248,7 @@ typedef struct
*/
/** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
@@ -242,6 +258,7 @@ typedef struct
*/
/** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
@@ -253,6 +270,7 @@ typedef struct
*/
/** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
@@ -263,6 +281,7 @@ typedef struct
*/
/** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
@@ -273,6 +292,7 @@ typedef struct
*/
/** @defgroup LPTIM_EC_INPUT1_SRC Input1 Source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_INPUT1_SRC_GPIO 0x00000000U /*!< For LPTIM1 and LPTIM2 */
@@ -286,6 +306,7 @@ typedef struct
*/
/** @defgroup LPTIM_EC_INPUT2_SRC Input2 Source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_LPTIM_INPUT2_SRC_GPIO 0x00000000U /*!< For LPTIM1 */
@@ -300,10 +321,12 @@ typedef struct
/* Exported macro ------------------------------------------------------------*/
/** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
/** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -333,11 +356,13 @@ typedef struct
/* Exported functions --------------------------------------------------------*/
/** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
/** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -351,6 +376,7 @@ void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx);
#endif /* USE_FULL_LL_DRIVER */
/** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -730,6 +756,7 @@ __STATIC_INLINE void LL_LPTIM_SetInput2Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
*/
/** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -902,6 +929,7 @@ __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx)
*/
/** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -994,6 +1022,7 @@ __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx)
*/
/** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -1071,6 +1100,7 @@ __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx)
*/
/** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -1233,6 +1263,7 @@ __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx)
*/
/** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/