diff options
Diffstat (limited to 'bsps/arm/stm32h7/include/stm32h7xx_hal_spi.h')
| -rw-r--r-- | bsps/arm/stm32h7/include/stm32h7xx_hal_spi.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_spi.h b/bsps/arm/stm32h7/include/stm32h7xx_hal_spi.h index 3b5dab5806..5be433919b 100644 --- a/bsps/arm/stm32h7/include/stm32h7xx_hal_spi.h +++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_spi.h @@ -38,6 +38,7 @@ extern "C" { /* Exported types ------------------------------------------------------------*/
/** @defgroup SPI_Exported_Types SPI Exported Types
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -249,10 +250,12 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to /* Exported constants --------------------------------------------------------*/
/** @defgroup SPI_Exported_Constants SPI Exported Constants
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
/** @defgroup SPI_FIFO_Type SPI FIFO Type
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_LOWEND_FIFO_SIZE 8UL
@@ -262,6 +265,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Error_Code SPI Error Codes
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define HAL_SPI_ERROR_NONE (0x00000000UL) /*!< No error */
@@ -284,6 +288,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Mode SPI Mode
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_MODE_SLAVE (0x00000000UL)
@@ -293,6 +298,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Direction SPI Direction Mode
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_DIRECTION_2LINES (0x00000000UL)
@@ -304,6 +310,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Data_Size SPI Data Size
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_DATASIZE_4BIT (0x00000003UL)
@@ -340,6 +347,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Clock_Polarity SPI Clock Polarity
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_POLARITY_LOW (0x00000000UL)
@@ -349,6 +357,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Clock_Phase SPI Clock Phase
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_PHASE_1EDGE (0x00000000UL)
@@ -358,6 +367,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Slave_Select_Management SPI Slave Select Management
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_NSS_SOFT SPI_CFG2_SSM
@@ -368,6 +378,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_NSSP_Mode SPI NSS Pulse Mode
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_NSS_PULSE_DISABLE (0x00000000UL)
@@ -377,6 +388,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_BAUDRATEPRESCALER_2 (0x00000000UL)
@@ -392,6 +404,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_MSB_LSB_Transmission SPI MSB LSB Transmission
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_FIRSTBIT_MSB (0x00000000UL)
@@ -401,6 +414,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_TI_Mode SPI TI Mode
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_TIMODE_DISABLE (0x00000000UL)
@@ -410,6 +424,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_CRC_Calculation SPI CRC Calculation
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_CRCCALCULATION_DISABLE (0x00000000UL)
@@ -419,6 +434,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_CRC_length SPI CRC Length
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_CRC_LENGTH_DATASIZE (0x00000000UL)
@@ -456,6 +472,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Fifo_Threshold SPI Fifo Threshold
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_FIFO_THRESHOLD_01DATA (0x00000000UL)
@@ -479,6 +496,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_CRC_Calculation_Initialization_Pattern SPI CRC Calculation Initialization Pattern
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN (0x00000000UL)
@@ -488,6 +506,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_NSS_Polarity SPI NSS Polarity
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_NSS_POLARITY_LOW (0x00000000UL)
@@ -497,6 +516,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Master_Keep_IO_State Keep IO State
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_MASTER_KEEP_IO_STATE_DISABLE (0x00000000UL)
@@ -506,6 +526,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_IO_Swap Control SPI IO Swap
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_IO_SWAP_DISABLE (0x00000000UL)
@@ -515,6 +536,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Master_SS_Idleness SPI Master SS Idleness
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_MASTER_SS_IDLENESS_00CYCLE (0x00000000UL)
@@ -538,6 +560,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Master_InterData_Idleness SPI Master Inter-Data Idleness
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_MASTER_INTERDATA_IDLENESS_00CYCLE (0x00000000UL)
@@ -561,6 +584,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Master_RX_AutoSuspend SPI Master Receiver AutoSuspend
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_MASTER_RX_AUTOSUSP_DISABLE (0x00000000UL)
@@ -570,6 +594,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Underrun_Detection SPI Underrun Detection
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_UNDERRUN_DETECT_BEGIN_DATA_FRAME (0x00000000UL)
@@ -580,6 +605,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Underrun_Behaviour SPI Underrun Behavior
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_UNDERRUN_BEHAV_REGISTER_PATTERN (0x00000000UL)
@@ -590,6 +616,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_IT_RXP SPI_IER_RXPIE
@@ -609,6 +636,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_Flags_definition SPI Flags Definition
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_FLAG_RXP SPI_SR_RXP /* SPI status flag : Rx-Packet available flag */
@@ -631,6 +659,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to */
/** @defgroup SPI_reception_fifo_status_level SPI Reception FIFO Status Level
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
#define SPI_RX_FIFO_0PACKET (0x00000000UL) /* 0 or multiple of 4 packets available in the RxFIFO */
@@ -647,6 +676,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to /* Exported macros -----------------------------------------------------------*/
/** @defgroup SPI_Exported_Macros SPI Exported Macros
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
@@ -909,6 +939,7 @@ uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); /* Private macros ------------------------------------------------------------*/
/** @defgroup SPI_Private_Macros SPI Private Macros
+ * @ingroup RTEMSBSPsARMSTM32H7 * @{
*/
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