diff options
| -rw-r--r-- | c/src/lib/libbsp/sparc/leon3/include/cache_.h | 5 | ||||
| -rw-r--r-- | c/src/lib/libbsp/sparc/leon3/include/leon.h | 5 |
2 files changed, 9 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/sparc/leon3/include/cache_.h b/c/src/lib/libbsp/sparc/leon3/include/cache_.h index 70c1e2c9fc..c7813678b9 100644 --- a/c/src/lib/libbsp/sparc/leon3/include/cache_.h +++ b/c/src/lib/libbsp/sparc/leon3/include/cache_.h @@ -134,7 +134,10 @@ static inline void _CPU_cache_unfreeze_data(void) static inline void _CPU_cache_invalidate_entire_instruction(void) { - __asm__ volatile ("flush"); + uint32_t cache_reg = leon3_get_cache_control_register(); + + cache_reg |= LEON3_REG_CACHE_CTRL_FI; + leon3_set_cache_control_register(cache_reg); } static inline void _CPU_cache_invalidate_instruction_range( diff --git a/c/src/lib/libbsp/sparc/leon3/include/leon.h b/c/src/lib/libbsp/sparc/leon3/include/leon.h index 1fc4e28e40..14cbc85796 100644 --- a/c/src/lib/libbsp/sparc/leon3/include/leon.h +++ b/c/src/lib/libbsp/sparc/leon3/include/leon.h @@ -86,6 +86,11 @@ extern "C" { #define LEON_REG_TIMER_CONTROL_LD 0x00000004 /* 1 = load counter */ /* 0 = no function */ +/* + * The following defines the bits in the LEON Cache Control Register. + */ +#define LEON3_REG_CACHE_CTRL_FI 0x00200000 /* Flush instruction cache */ + /* LEON3 Interrupt Controller */ extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs; /* LEON3 GP Timer */ |