diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-27 10:05:50 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-29 10:04:37 +0200 |
| commit | e43994dfbb2c0ce9012c33c64f14533acc230366 (patch) | |
| tree | 7e662060fab6f8f7487cb041a7ba04abccb9c3e3 /cpukit/score/cpu/riscv/riscv-context-initialize.c | |
| parent | riscv: Fix _CPU_Context_Initialize() prototype (diff) | |
| download | rtems-e43994dfbb2c0ce9012c33c64f14533acc230366.tar.bz2 | |
riscv: Optimize context switch and interrupts
Save/restore non-volatile registers in _CPU_Context_switch().
Save/restore volatile registers in _ISR_Handler().
Update #3433.
Diffstat (limited to 'cpukit/score/cpu/riscv/riscv-context-initialize.c')
| -rw-r--r-- | cpukit/score/cpu/riscv/riscv-context-initialize.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/cpukit/score/cpu/riscv/riscv-context-initialize.c b/cpukit/score/cpu/riscv/riscv-context-initialize.c index 9180c92cd3..d293e24b00 100644 --- a/cpukit/score/cpu/riscv/riscv-context-initialize.c +++ b/cpukit/score/cpu/riscv/riscv-context-initialize.c @@ -51,11 +51,7 @@ void _CPU_Context_Initialize( stack = _Addresses_Add_offset( stack_area_begin, stack_area_size ); stack = _Addresses_Align_down( stack, CPU_STACK_ALIGNMENT ); - /* Stack Pointer - sp/x2 */ - context->x[2] = (uintptr_t) stack; - - /* Return Address - ra/x1 */ - context->x[1] = (uintptr_t) entry_point; - + context->ra = (uintptr_t) entry_point; + context->sp = (uintptr_t) stack; context->isr_dispatch_disable = 0; } |