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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-07-28 14:41:32 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-07-28 21:04:20 +0200 |
commit | 8b65b57472d5086f2c035a09fdb07a40285beb4a (patch) | |
tree | a59df32bffd218107602471a541c10d66e1b509a /cpukit/score/cpu/or1k/cpu.c | |
parent | score: Move per-CPU jobs support (diff) | |
download | rtems-8b65b57472d5086f2c035a09fdb07a40285beb4a.tar.bz2 |
score: Canonicalize _CPU_Fatal_halt()
Move _CPU_Fatal_halt() declaration to <rtems/score/cpuimpl.h> and make sure it
is a proper declaration of a function which does not return. Fix the type of
the error code. If necessary, add the implementation to cpu.c. Implementing
_CPU_Fatal_halt() as a function makes it possible to wrap this function for
example to fully test _Terminate().
Diffstat (limited to 'cpukit/score/cpu/or1k/cpu.c')
-rw-r--r-- | cpukit/score/cpu/or1k/cpu.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/cpukit/score/cpu/or1k/cpu.c b/cpukit/score/cpu/or1k/cpu.c index 79cb76812f..785fb2a084 100644 --- a/cpukit/score/cpu/or1k/cpu.c +++ b/cpukit/score/cpu/or1k/cpu.c @@ -11,8 +11,8 @@ * */ +#include <rtems/score/cpuimpl.h> #include <rtems/score/isr.h> -#include <rtems/score/cpu.h> /* bsp_start_vector_table_begin is the start address of the vector table * containing addresses to ISR Handlers. It's defined at the BSP linkcmds @@ -28,6 +28,22 @@ void _CPU_Initialize(void) /* Do nothing */ } +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ + ISR_Level level; + + _CPU_ISR_Disable( level ); + (void) level; + + _OR1KSIM_CPU_Halt(); + + while ( true ) { + /* Do nothing */ + } +} + +/* end of Fatal Error manager macros */ + /** * @brief Sets the hardware interrupt level by the level value. * |