updated gen83xx BSP

updated haleakala BSP
added MPC55xx BSP

3 files changed, 151 insertions, 95 deletions

diff --git a/c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h b/c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h
index 02a4544341..44a9a68216 100644
--- a/c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h
+++ b/c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h
@@ -31,73 +31,7 @@
 
 #include <rtems/powerpc/registers.h>
 
-#ifdef ASM
-
-#include <rtems/asm.h>
-
-.macro LA reg, addr
-	lis \reg, (\addr)@h
-	ori \reg, \reg, (\addr)@l
-.endm
-
-.macro LWI reg, value
-	lis \reg, (\value)@h
-	ori \reg, \reg, (\value)@l
-.endm
-
-.macro LW reg, addr
-	lis \reg, \addr@ha
-	lwz \reg, \addr@l(\reg)
-.endm
-
-/*
- * Tests the bits in reg1 against the bits set in mask.  A match is indicated
- * by EQ = 0 in CR0.  A mismatch is indicated by EQ = 1 in CR0.  The register
- * reg2 is used to load the mask.
- */
-.macro	TSTBITS	reg1, reg2, mask
-	LWI 	\reg2, \mask
-	and	\reg1, \reg1, \reg2
-	cmplw	\reg1, \reg2
-.endm	
-	
-.macro 	SETBITS reg1, reg2, mask
-	LWI 	\reg2, \mask
-	or	\reg1, \reg1, \reg2 
-.endm
-
-.macro 	CLRBITS reg1, reg2, mask
-	LWI 	\reg2, \mask
-	andc	\reg1, \reg1, \reg2
-.endm
-
-.macro GLOBAL_FUNCTION name
-	.global \name
-	.type \name, @function
-\name:
-.endm
-
-/*
- * Disables all asynchronous exeptions (interrupts) which may cause a context
- * switch.
- */
-.macro INTERRUPT_DISABLE level, mask
-	mfmsr	\level
-	mfspr	\mask, sprg0
-	andc	\mask, \level, \mask
-	mtmsr	\mask
-.endm
-
-/*
- * Restore previous machine state.
- */
-.macro INTERRUPT_ENABLE level
-	mtmsr	\level
-.endm
-
-#define LINKER_SYMBOL( sym) .extern sym
-
-#else /* ASM */
+#ifndef ASM
 
 #include <stdint.h>
 
@@ -518,6 +452,72 @@ static inline void ppc_set_time_base_64( uint64_t val)
 	PPC_Set_timebase_register( val);
 }
 
+#else /* ASM */
+
+#include <rtems/asm.h>
+
+.macro LA reg, addr
+	lis \reg, (\addr)@h
+	ori \reg, \reg, (\addr)@l
+.endm
+
+.macro LWI reg, value
+	lis \reg, (\value)@h
+	ori \reg, \reg, (\value)@l
+.endm
+
+.macro LW reg, addr
+	lis \reg, \addr@ha
+	lwz \reg, \addr@l(\reg)
+.endm
+
+/*
+ * Tests the bits in reg1 against the bits set in mask.  A match is indicated
+ * by EQ = 0 in CR0.  A mismatch is indicated by EQ = 1 in CR0.  The register
+ * reg2 is used to load the mask.
+ */
+.macro	TSTBITS	reg1, reg2, mask
+	LWI 	\reg2, \mask
+	and	\reg1, \reg1, \reg2
+	cmplw	\reg1, \reg2
+.endm	
+	
+.macro 	SETBITS reg1, reg2, mask
+	LWI 	\reg2, \mask
+	or	\reg1, \reg1, \reg2 
+.endm
+
+.macro 	CLRBITS reg1, reg2, mask
+	LWI 	\reg2, \mask
+	andc	\reg1, \reg1, \reg2
+.endm
+
+.macro GLOBAL_FUNCTION name
+	.global \name
+	.type \name, @function
+\name:
+.endm
+
+/*
+ * Disables all asynchronous exeptions (interrupts) which may cause a context
+ * switch.
+ */
+.macro INTERRUPT_DISABLE level, mask
+	mfmsr	\level
+	mfspr	\mask, sprg0
+	andc	\mask, \level, \mask
+	mtmsr	\mask
+.endm
+
+/*
+ * Restore previous machine state.
+ */
+.macro INTERRUPT_ENABLE level
+	mtmsr	\level
+.endm
+
+#define LINKER_SYMBOL( sym) .extern sym
+
 #endif /* ASM */
 
 #endif /* LIBCPU_POWERPC_UTILITY_H */
diff --git a/c/src/lib/libcpu/powerpc/shared/src/cache.c b/c/src/lib/libcpu/powerpc/shared/src/cache.c
index ec3e175ded..9099cda251 100644
--- a/c/src/lib/libcpu/powerpc/shared/src/cache.c
+++ b/c/src/lib/libcpu/powerpc/shared/src/cache.c
@@ -1,3 +1,11 @@
+/**
+ * @file
+ *
+ * #ingroup powerpc_shared
+ *
+ * @brief Source file for the Cache Manager PowerPC support.
+ */
+
 /*
  *  Cache Management Support Routines for the MC68040
  * Modified for MPC8260 Andy Dachs <a.dachs@sstl.co.uk>
@@ -194,6 +202,67 @@ void _CPU_cache_disable_instruction ( void )
   mtspr( 560, r1 );
   isync;
 }
+
+#else
+
+#warning Most cache functions are not implemented
+
+void _CPU_cache_flush_entire_data()
+{
+	/* Void */
+}
+
+void _CPU_cache_invalidate_entire_data()
+{
+	/* Void */
+}
+
+void _CPU_cache_freeze_data()
+{
+	/* Void */
+}
+
+void _CPU_cache_unfreeze_data()
+{
+	/* Void */
+}
+
+void _CPU_cache_enable_data()
+{
+	/* Void */
+}
+
+void _CPU_cache_disable_data()
+{
+	/* Void */
+}
+
+void _CPU_cache_invalidate_entire_instruction()
+{
+	/* Void */
+}
+
+void _CPU_cache_freeze_instruction()
+{
+	/* Void */
+}
+
+void _CPU_cache_unfreeze_instruction()
+{
+	/* Void */
+}
+
+
+void _CPU_cache_enable_instruction()
+{
+	/* Void */
+}
+
+void _CPU_cache_disable_instruction()
+{
+	/* Void */
+}
+
 #endif
 
 void _CPU_cache_invalidate_1_data_line(
diff --git a/c/src/lib/libcpu/powerpc/shared/src/cache_.h b/c/src/lib/libcpu/powerpc/shared/src/cache_.h
index 11c8ee47ef..5851f0818b 100644
--- a/c/src/lib/libcpu/powerpc/shared/src/cache_.h
+++ b/c/src/lib/libcpu/powerpc/shared/src/cache_.h
@@ -1,38 +1,25 @@
-/*
- *  PowerPC Cache Manager Support
- */
-
-#ifndef __POWERPC_CACHE_h
-#define __POWERPC_CACHE_h
-/*
- * get definitions from the score/powerpc header 
- * about individual cache alignments
- */
-#include <rtems/score/powerpc.h>
-
-/*
- * CACHE MANAGER: The following functions are CPU-specific.
- * They provide the basic implementation for the rtems_* cache
- * management routines. If a given function has no meaning for the CPU,
- * it does nothing by default.
+/**
+ * @file
  *
- * FIXME: Some functions simply have not been implemented.
+ * #ingroup powerpc_shared
+ *
+ * @brief Header file for the Cache Manager PowerPC support.
  */
 
-#if defined(ppc603) || defined(ppc603e) || defined(mpc8260)	   
-   /* And possibly others */
-
-#if defined(PPC_CACHE_ALIGNMENT)
+#ifndef LIBCPU_POWERPC_CACHE_H
+#define LIBCPU_POWERPC_CACHE_H
 
-#define CPU_DATA_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT
-#define CPU_INSTRUCTION_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT
+#include <rtems/score/powerpc.h>
 
-#endif
+/* Provide the CPU defines only if we have a cache */
+#if PPC_CACHE_ALIGNMENT != PPC_NO_CACHE_ALIGNMENT
+  #define CPU_DATA_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT
+  #define CPU_INSTRUCTION_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT
 #endif
 
 #ifdef _OLD_EXCEPTIONS
-#include <libcpu/cache.h>
+# warning OLD EXCEPTIONS
+# include <libcpu/cache.h>
 #endif
 
-#endif
-/* end of include file */
+#endif /* LIBCPU_POWERPC_CACHE_H */