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author | Eric Norum <WENorum@lbl.gov> | 2005-04-21 00:25:53 +0000 |
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committer | Eric Norum <WENorum@lbl.gov> | 2005-04-21 00:25:53 +0000 |
commit | ac9bbe7bb2e443548852a3f555ebcccf2812cc46 (patch) | |
tree | 1b637034ec630090ad2eabbff737001e8eb9295c /c/src/lib/libbsp/m68k/uC5282/include/bsp.h | |
parent | 2005-04-20 Ralf Corsepius <ralf.corsepius@rtems.org> (diff) | |
download | rtems-ac9bbe7bb2e443548852a3f555ebcccf2812cc46.tar.bz2 |
Try insructioin-only cache.
Diffstat (limited to 'c/src/lib/libbsp/m68k/uC5282/include/bsp.h')
-rw-r--r-- | c/src/lib/libbsp/m68k/uC5282/include/bsp.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/m68k/uC5282/include/bsp.h b/c/src/lib/libbsp/m68k/uC5282/include/bsp.h index 9297aad756..7cff0ba590 100644 --- a/c/src/lib/libbsp/m68k/uC5282/include/bsp.h +++ b/c/src/lib/libbsp/m68k/uC5282/include/bsp.h @@ -17,6 +17,14 @@ extern "C" { #include <rtems/bspIo.h> /***************************************************************************/ +/** BSP Configuration **/ +/* + * Uncomment to use instruction/data cache + * Leave commented to use instruction-only cache + */ +/* #define RTEMS_MCF5282_BSP_ENABLE_DATA_CACHE */ + +/***************************************************************************/ /** Hardware data structure headers **/ #include <mcf5282/mcf5282.h> /* internal MCF5282 modules */ |