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| author | Jarielle Catbagan <jcatbagan93@gmail.com> | 2015-08-02 21:16:39 -0700 |
|---|---|---|
| committer | Ed Sutter <edsutterjr@gmail.com> | 2015-08-03 19:30:45 -0400 |
| commit | 5a75bc20203b62e87f60c667ec808349a19d3ad1 (patch) | |
| tree | 61e851e16f1cdaa901f7ae79912784dee65f8c37 | |
| parent | BBB: am335x.h: Add defines for MMC0 interface, AM335x MMC/SD registers, and C... (diff) | |
| download | umon-5a75bc20203b62e87f60c667ec808349a19d3ad1.tar.bz2 | |
BBB: cpuio.c: Configure pins used for MMC0 interface
| -rw-r--r-- | ports/beagleboneblack/cpuio.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/ports/beagleboneblack/cpuio.c b/ports/beagleboneblack/cpuio.c index 301a065..eab0a00 100644 --- a/ports/beagleboneblack/cpuio.c +++ b/ports/beagleboneblack/cpuio.c @@ -157,6 +157,22 @@ pinMuxInit(void) // GPIO1_24: USER3 LED (D5) CNTL_MODULE_REG(CONF_GPMC_A8) = SLEWSLOW | RX_ON | PULL_OFF | MUXMODE_7; + + // Configure the pins for the MMC0 interface + CNTL_MODULE_REG(CONF_MMC0_DAT0) = RX_ON | PULL_ON | + PULLUP | MUXMODE_0; + CNTL_MODULE_REG(CONF_MMC0_DAT1) = RX_ON | PULL_ON | + PULLUP | MUXMODE_0; + CNTL_MODULE_REG(CONF_MMC0_DAT2) = RX_ON | PULL_ON | + PULLUP | MUXMODE_0; + CNTL_MODULE_REG(CONF_MMC0_DAT3) = RX_ON | PULL_ON | + PULLUP | MUXMODE_0; + CNTL_MODULE_REG(CONF_MMC0_CLK) = RX_ON | PULL_OFF | + MUXMODE_0; + CNTL_MODULE_REG(CONF_MMC0_CMD) = RX_ON | PULL_ON | + PULLUP | MUXMODE_0; + CNTL_MODULE_REG(CONF_SPI0_CS1) = RX_ON | PULL_ON | + PULLUP | MUXMODE_5; } void |