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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup sparc_leon3
*
* @brief This header file provides interfaces used by the BSP implementation.
*/
/*
* Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _BSP_LEON3_H
#define _BSP_LEON3_H
#include <rtems.h>
#include <grlib/apbuart-regs.h>
#include <grlib/irqamp-regs.h>
#include <grlib/io.h>
struct ambapp_dev;
#ifdef __cplusplus
extern "C" {
#endif
/**
* @addtogroup sparc_leon3
*
* @{
*/
/**
* @brief This object provides the index of the boot processor.
*
* This object should be read-only after initialization.
*/
extern uint32_t LEON3_Cpu_Index;
/**
* @brief This constant represents the flush instruction cache flag of the LEON
* cache control register.
*/
#define LEON3_REG_CACHE_CTRL_FI 0x00200000U
/**
* @brief This constant represents the data cache snooping enable flag of the
* LEON cache control register.
*/
#define LEON3_REG_CACHE_CTRL_DS 0x00800000U
/**
* @brief Sets the ASI 0x2 system register value.
*
* @param addr is the address of the ASI 0x2 system register.
*
* @param val is the value to set.
*/
static inline void leon3_set_system_register( uint32_t addr, uint32_t val )
{
__asm__ volatile(
"sta %1, [%0] 2"
:
: "r" ( addr ), "r" ( val )
);
}
/**
* @brief Gets the ASI 0x2 system register value.
*
* @param addr is the address of the ASI 0x2 system register.
*
* @return Returns the register value.
*/
static inline uint32_t leon3_get_system_register( uint32_t addr )
{
uint32_t val;
__asm__ volatile(
"lda [%1] 2, %0"
: "=r" ( val )
: "r" ( addr )
);
return val;
}
/**
* @brief Sets the LEON cache control register value.
*
* @param val is the value to set.
*/
static inline void leon3_set_cache_control_register( uint32_t val )
{
leon3_set_system_register( 0x0, val );
}
/**
* @brief Gets the LEON cache control register value.
*
* @return Returns the register value.
*/
static inline uint32_t leon3_get_cache_control_register( void )
{
return leon3_get_system_register( 0x0 );
}
/**
* @brief Checks if the data cache snooping is enabled.
*
* @return Returns true, if the data cache snooping is enabled, otherwise
* false.
*/
static inline bool leon3_data_cache_snooping_enabled( void )
{
return ( leon3_get_cache_control_register() & LEON3_REG_CACHE_CTRL_DS ) != 0;
}
/**
* @brief Gets the LEON instruction cache configuration register value.
*
* @return Returns the register value.
*/
static inline uint32_t leon3_get_inst_cache_config_register( void )
{
return leon3_get_system_register( 0x8 );
}
/**
* @brief Gets the LEON data cache configuration register value.
*
* @return Returns the register value.
*/
static inline uint32_t leon3_get_data_cache_config_register( void )
{
return leon3_get_system_register( 0xc );
}
/**
* @brief This lock serializes the interrupt controller access.
*/
extern rtems_interrupt_lock LEON3_IrqCtrl_Lock;
/**
* @brief Acquires the interrupt controller lock.
*
* @param[out] _lock_context is the lock context.
*/
#define LEON3_IRQCTRL_ACQUIRE( _lock_context ) \
rtems_interrupt_lock_acquire( &LEON3_IrqCtrl_Lock, _lock_context )
/**
* @brief Releases the interrupt controller lock.
*
* @param[in, out] _lock_context is the lock context.
*/
#define LEON3_IRQCTRL_RELEASE( _lock_context ) \
rtems_interrupt_lock_release( &LEON3_IrqCtrl_Lock, _lock_context )
/**
* @brief This pointer provides the IRQ(A)MP register block address.
*/
extern irqamp *LEON3_IrqCtrl_Regs;
/**
* @brief This pointer provides the IRQ(A)MP device information block.
*/
extern struct ambapp_dev *LEON3_IrqCtrl_Adev;
/**
* @brief This object provides the interrupt number used to multiplex extended
* interrupts or is zero if no extended interrupts are available.
*
* This object should be read-only after initialization.
*/
extern uint32_t LEON3_IrqCtrl_EIrq;
/**
* @brief Initializes the interrupt controller for the boot processor.
*
* @param[in, out] regs is the IRQ(A)MP register block address.
*/
void leon3_ext_irq_init( irqamp *regs );
/**
* @brief Acknowledges and maps extended interrupts if this feature is
* available and the interrupt for extended interrupts is present.
*
* @param irq is the standard interrupt number.
*/
static inline uint32_t bsp_irq_fixup( uint32_t irq )
{
uint32_t eirq;
uint32_t cpu_self;
if ( irq != LEON3_IrqCtrl_EIrq ) {
return irq;
}
cpu_self = _LEON3_Get_current_processor();
eirq = grlib_load_32( &LEON3_IrqCtrl_Regs->pextack[ cpu_self ] );
eirq = IRQAMP_PEXTACK_EID_4_0_GET( eirq );
if ( eirq < 16 ) {
return irq;
}
return eirq;
}
/**
* @brief This pointer provides the debug APBUART register block address.
*/
extern apbuart *leon3_debug_uart;
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* _BSP_LEON3_H */
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