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2020-10-05score: Add AArch64 portKinsey Moore
This adds a CPU port for AArch64(ARMv8) with support for exceptions and interrupts.
2020-09-23or1k: Do not use printk() for _CPU_Fatal_halt()Sebastian Huber
Debug output can be added to user-defined fatal error handlers.
2020-09-23or1k: Remove superfluous includesSebastian Huber
Including <stdio.h> in <rtems/score/cpu.h> breaks libbsd.
2020-09-17arm: Fix arm_cp15_set_translation_table_entries()Sebastian Huber
In a multi-processor system we must broadcast the TLB maintenance operation to the Inner Shareable domain to ensure that the other processors update their TLB caches accordingly. Close #4068.
2020-09-12i386/score: fix assembly mnemonicGedare Bloom
Closes #4076.
2020-08-20sparc: Use RTEMS_XCONCAT()Sebastian Huber
Prefer macros with a proper namespace.
2020-07-29i386: Fix possible race condition on first context restoreJan Sommer
Make sure that the esp is restored before the eflags register. When the init task is initially restored, system interrupts are activated when the eflags register is loaded. If the esp register still points to an address in the interrupt stack area (from early system initlization) the ISR might overwrite its own stack. Closes #4031
2020-07-05epiphany: Remove support for this targetSebastian Huber
Due to an unmaintained toolchain (internal errors in GCC, no FSF GDB integration) the Epiphany architecture was obsoleted in RTEMS 5.1. Update #3941.
2020-07-05i386: Replace fpcr clobber with memory clobberSebastian Huber
Update #3943.
2020-06-30score: Clarify CPU_USE_LIBC_INIT_FINI_ARRAY optionSebastian Huber
Update #4018.
2020-06-30score: Add CPU_USE_LIBC_INIT_FINI_ARRAYKinsey Moore
This introduces the CPU_USE_LIBC_INIT_FINI_ARRAY define for use by CPU ports to determine which global constructor and destructor methods are used instead of placing architecture defines where they shouldn't be. Close #4018
2020-06-11bsp/pc386: Define interrupt stack frame for smpJan Sommer
- Defines CPU_Interrupt_frame in cpu_impl.h - Updates isq_asm.S to save/restore registers in matching order to interrupt frame
2020-06-11bsp/pc386: Update context switch and restoreJan Sommer
Uses similar flow in cpu_asm.S for i386 as for arm.
2020-06-11bsp/pc386: Update GDT to work for SMPJan Sommer
Create a GS segment in the GDT for each processor for storing TLS. This makes the GDT in startAP.S obsolete as all processors now share the same GDT, which is passed to each AP at startup. The correct segment for each processor is calculated in cpu_asm.S. Update #3335
2020-05-27arm: Fix ARMv7-M exception handlerSebastian Huber
Store the stack pointer of the exception context to the exception frame. Close #3987.
2020-04-16Canonicalize config.h includeSebastian Huber
Use the following variant which was already used by most source files: #ifdef HAVE_CONFIG_H #include "config.h" #endif
2020-04-03arm: ARMv7-M statically initialized vector tableSebastian Huber
Statically initialize the ARMv7-M vector table to allow a placement in ROM with read-only MPU settings. Change licence to BSD-2-Clause in some files.
2020-02-12score: Remove superfluous FP types/definesSebastian Huber
Update #3835.
2019-11-29Regenerate headers.amSebastian Huber
2019-11-12riscv: preliminarily support for libdlHesham Almatary
Support for targets compiled with -fno-pic and -mno-relax
2019-10-31arm: Add defines for small pages MMUSebastian Huber
2019-09-03arm: Fix default exception handlerSebastian Huber
Keep the stack pointer properly 8-byte aligned.
2019-06-28arm: Return the current handler from arm_cp15_set_exception_handlerChris Johns
Closes #3762
2019-06-07sparc: Fix mistakenly cleared PSR[EF] bit.Maksim E. Kozlov
The superfluously modified %l0 had no effect if the branch is not taken. This change clarifies the code.
2019-06-06sparc: Fix missed restoring of PSR in syscall_lazy_fp_switchMaksim E. Kozlov
It is needed to restore PSR just before return because condition codes are dirty after the CMP instructions and this may cause undefined program behavior after returning from the switching procedure (on following branch instruction, for example). Close #3756.
2019-06-06sparc: Improve _CPU_Context_validate()Sebastian Huber
Use the FPU and check that the condition codes in the PSR are preserved. Update #3756.
2019-04-04doxygen: Rename Score* groups in RTEMSScore*Sebastian Huber
Update #3706
2019-04-04doxygen: Added Management to Example CPU ArchitectureAndreas Dachsberger
Update #3706.
2019-04-02doxygen: score: Put ARM Co-Processor 15 group in ARMAndreas Dachsberger
Update #3706.
2019-04-02doxygen: score: Add x86-64 CPU architecture groupAndreas Dachsberger
Update #3706.
2019-04-02doxygen: score: Add V850 CPU architecture groupAndreas Dachsberger
Update #3706.
2019-04-02doxygen: score: Add SPARC64 CPU architecture groupAndreas Dachsberger
Update #3706.
2019-04-02doxygen: score: Add SPARC CPU architecture groupAndreas Dachsberger
Update #3706.
2019-04-02doxygen: score: Add SuperH CPU architecture groupAndreas Dachsberger
Update #3706.
2019-04-02doxygen: score: Add RISC-V CPU architecture groupAndreas Dachsberger
Update #3706.
2019-04-02doxygen: score: Add powerpc CPU architecture groupAndreas Dachsberger
Update #3706.
2019-04-02doxygen: score: Add or1k CPU architecture groupAndreas Dachsberger
Update #3706.
2019-04-01doxygen: score: Add nios2 CPU architecture groupAndreas Dachsberger
Update #3706.
2019-04-01doxygen: score: Add Moxie CPU architecture groupAndreas Dachsberger
Update #3706.
2019-04-01doxygen: score: Add m68k CPU architecture groupAndreas Dachsberger
Update #3706.
2019-04-01doxygen: score: Change no_cpu architecture groupAndreas Dachsberger
Groups CPUContext and CPUInterrupt are now defined with a unique name for this architecture group. Update #3706.
2019-04-01doxygen: score: Add lm32 CPU architecture groupAndreas Dachsberger
Update #3706.
2019-04-01doxygen: score: Add i386 CPU architecture groupAndreas Dachsberger
Update #3706.
2019-04-01doxygen: score: Add Epiphany CPU architecture groupAndreas Dachsberger
Update #3706.
2019-04-01doxygen: score: Add Blackfin CPU architecture groupAndreas Dachsberger
Update #3706.
2019-03-26score: Add ARM CPU architecture groupSebastian Huber
Update #3706.
2019-03-26score: Add example CPU architecture groupSebastian Huber
Update #3706.
2019-03-26score: Rename ScoreCPU Doxygen groupSebastian Huber
Update #3706.
2019-03-14Remove superfluous <rtems/system.h> includesSebastian Huber
2019-03-14sparc64: Do not include <rtems/asm.h> in C sourceSebastian Huber
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