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2020-10-10rtems: Improve RTEMS_NO_RETURN attributeSebastian Huber
Provide RTEMS_NO_RETURN also in case RTEMS_DEBUG is defined to prevent errors like this: error: no return statement in function returning non-void [-Werror=return-type] Use C11 and C++11 standard means to declare a no-return function. Close #4122.
2020-09-17arm: Fix arm_cp15_set_translation_table_entries()Sebastian Huber
In a multi-processor system we must broadcast the TLB maintenance operation to the Inner Shareable domain to ensure that the other processors update their TLB caches accordingly. Close #4068.
2020-06-30score: Add CPU_USE_LIBC_INIT_FINI_ARRAYKinsey Moore
This introduces the CPU_USE_LIBC_INIT_FINI_ARRAY define for use by CPU ports to determine which global constructor and destructor methods are used instead of placing architecture defines where they shouldn't be. Close #4018
2020-05-27arm: Fix ARMv7-M exception handlerSebastian Huber
Store the stack pointer of the exception context to the exception frame. Close #3987.
2020-04-16Canonicalize config.h includeSebastian Huber
Use the following variant which was already used by most source files: #ifdef HAVE_CONFIG_H #include "config.h" #endif
2020-04-03arm: ARMv7-M statically initialized vector tableSebastian Huber
Statically initialize the ARMv7-M vector table to allow a placement in ROM with read-only MPU settings. Change licence to BSD-2-Clause in some files.
2020-02-12score: Remove superfluous FP types/definesSebastian Huber
Update #3835.
2019-10-31arm: Add defines for small pages MMUSebastian Huber
2019-09-03arm: Fix default exception handlerSebastian Huber
Keep the stack pointer properly 8-byte aligned.
2019-06-28arm: Return the current handler from arm_cp15_set_exception_handlerChris Johns
Closes #3762
2019-04-02doxygen: score: Put ARM Co-Processor 15 group in ARMAndreas Dachsberger
Update #3706.
2019-03-26score: Add ARM CPU architecture groupSebastian Huber
Update #3706.
2019-03-26score: Rename ScoreCPU Doxygen groupSebastian Huber
Update #3706.
2019-03-14Remove superfluous <rtems/system.h> includesSebastian Huber
2019-03-08cpukit/arm: Correct register definitionJonathan Brandmeyer
The register definition for the CP15 PMCR (performance monitor control register) has the bits for X (export enable) and D (clock divider enable) backwards. Correct them according to ARMv7-A/R Architecture Reference Manual, Rev C, Section B4.1.117. Consequences: On an implementation that starts off with D set at reset, the clock divider will not be disabled by using RTEMS' definition of the D bit. Tested by using the counter on Xilinx Zynq 7020 to measure some atomic accesses and cache flushing operations.
2019-02-22bsps/arm: Fix system register for virtual timerKinsey Moore
The system register in use for retrieval of the virtual timer value was mistakenly copied from the physical timer value retrieval function. Virtual timer value retrieval should use the same system register as the virtual timer value setter. Close #3699.
2019-02-09libdl: Fix the support for constructors and desctructors.Chris Johns
- Fix the handling of pending objects. - Add a constructor flags in objects to track then being called. Closes #2921
2018-11-12arm: Remove use of proc_ptrSebastian Huber
Update #3585.
2018-10-10build: Include header.am in cpukit/Makefile.amSebastian Huber
Include all cpukit/*/header.am files in cpukit/Makefile.am. This gets rid of all subtree Makefile.am and the sudirs hack.
2018-10-10build: Merge score/cpu/*/Makefile.amSebastian Huber
2018-10-09build: Remove specialized CPPFLAGSSebastian Huber
2018-10-05score: Remove CPU_PROVIDES_IDLE_THREAD_BODYSebastian Huber
Remove the CPU_PROVIDES_IDLE_THREAD_BODY option to avoid unnecessary conditional compilation. Close #3539.
2018-08-02score: Remove CPU_PARTITION_ALIGNMENTSebastian Huber
Use the CPU_SIZEOF_POINTER alignment instead. The internal alignment requirement is defined by the use of Chain_Node (consisting of two pointers) to manage the free chain of partitions. It seems that previously the condition CPU_PARTITION_ALIGNMENT >= sizeof(Chain_Node) was true on all CPU ports. Now, we need an additional check. Update #3482.
2018-07-23score: Add _CPU_Instruction_illegal()Sebastian Huber
On some architectures/simulators it is difficult to provoke an exception with misaligned or illegal data loads. Use an illegal instruction instead. Update #3433.
2018-07-20score: Add _CPU_Instruction_no_operation()Sebastian Huber
This helps to reduce the use of architecture-specific defines throughout the code base.
2018-07-20score: Move context validation declarationsSebastian Huber
The context validation support functions _CPU_Context_validate() and _CPU_Context_volatile_clobber() are used only by one test program (spcontext01). Move the function declarations to the CPU port implementation header file.
2018-06-27Rework initialization and interrupt stack supportSebastian Huber
Statically initialize the interrupt stack area (_Configuration_Interrupt_stack_area_begin, _Configuration_Interrupt_stack_area_end, and _Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the interrupt stack area in a special section ".rtemsstack.interrupt". Let BSPs define the optimal placement of this section in their linker command files (e.g. in a fast on-chip memory). This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the low level initialization code has all information available via global symbols. This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define superfluous, since the interrupt stacks are allocated by confdefs.h for all architectures. There is no need for BSP-specific linker command file magic (except the section placement), see previous ARM linker command file as a bad example. Remove _CPU_Install_interrupt_stack(). Initialize the hardware interrupt stack in _CPU_Initialize() if necessary (e.g. m68k_install_interrupt_stack()). The optional _CPU_Interrupt_stack_setup() is still useful to customize the registration of the interrupt stack area in the per-CPU information. The initialization stack can reuse the interrupt stack, since * interrupts are disabled during the sequential system initialization, and * the boot_card() function does not return. This stack resuse saves memory. Changes per architecture: arm: * Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases. * Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp. bfin: * Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value. lm32, m32c, mips, nios2, riscv, sh, v850: * Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack. m68k: * Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack. powerpc: * Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack. * Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA). sparc: * Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM. Update #3459.
2018-06-27score: Add CPU_INTERRUPT_STACK_ALIGNMENTSebastian Huber
Add CPU port define for the interrupt stack alignment. The alignment should take the stack ABI and the cache line size into account. Update #3459.
2018-06-15arm: Simplify CPU counter supportSebastian Huber
Use the standard ARMv7-M systick module for the ARMv7-M CPU counter instead of DWT counter since the DWT counter is affected by power saving states. Use an inline function for _CPU_Counter_difference() for all ARM BSPs. Update #3456.
2018-06-15Add _CPU_Counter_frequency()Sebastian Huber
Add rtems_counter_frequency() API function. Use it to initialize the counter value converter via the new system initialization step (RTEMS_SYSINIT_CPU_COUNTER). This decouples the counter implementation and the counter converter. It avoids an unnecessary pull in of the 64-bit integer division from libgcc. Update #3456.
2018-04-30Drop executable permissions on .[ch] filesJoel Sherrill
2018-03-13Add ARM Paravirtualization supportJoel Sherrill
Closes #3305.
2018-03-12arm/include/rtems/score/types.h: Eliminate this fileJoel Sherrill
Updates #3327.
2018-01-25Remove make preinstallChris Johns
A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
2017-12-13arm: Move <libcpu/arm-cp15.h> to cpukitSebastian Huber
Update #3254.
2017-08-10arm: Use ARM code on Thumb 1 targetsSebastian Huber
Update #3093.
2017-08-10arm: Validate IT[7:0] bit field of PSRSebastian Huber
Update #3093.
2017-07-04arm: Fix ARMv7-M interrupt processingSebastian Huber
Right after a "msr basepri_max, %[basepri]" instruction an interrupt service may still take place (observed at least on Cortex-M7). However, pendable service calls that are activated during this interrupt service may be delayed until interrupts are enable again. The _ARMV7M_Pendable_service_call() did not check that a thread dispatch is allowed. Move this test from _ARMV7M_Interrupt_service_leave() to _ARMV7M_Pendable_service_call(). Update #3060.
2017-06-09Simplify TLS support in context switchSebastian Huber
There is no need to save the thread pointer in _CPU_Context_switch() since it is a thread invariant. It is initialized once in _CPU_Context_Initialize().
2017-05-23arm: Fix profiling support of Thumb-1 targetsSebastian Huber
Update #2751.
2017-03-28arm: Optimize context switchSebastian Huber
Set CPU_ENABLE_ROBUST_THREAD_DISPATCH to TRUE. In this case the interrupts are always enabled during a context switch even after interrupt processing (see #2751). Remove the CPSR from the context control since it contains only volatile bits. Close #2954.
2017-03-09arm: Fix CPU context validation for Cortex-R4Sebastian Huber
Do not touch the FPSCR[QC] bit since this is DNM/RAZ on Cortex-R4.
2017-03-08arm: Remove legacy execption supportSebastian Huber
2017-01-30bsps/arm: Fix Cortex-M DWT CPU counter.Christian Mauderer
It is necessary to enable the DWT using a special initialization sequence before the CYCCNT can be enabled. See for example the RESET_CYCLE_COUNTER in libbsp/arm/atsam/utils/utility.h. Note that this problem only occurs if no debugger is connected. A debugger most likely already enables the necessary module.
2017-01-26score: Delete _CPU_Context_Fp_start()Sebastian Huber
Since the FP area pointer is passed by reference in _CPU_Context_Initialize_fp() the optional FP area adjustment via _CPU_Context_Fp_start() is superfluous. It is also wrong with respect to memory management, e.g. pointer passed to _Workspace_Free() may be not the one returned by _Workspace_Allocate(). Close #1400.
2017-01-24Adding ARM VFP V2 supportKevin Kirspel
2017-01-24Remove CPU_BIG_ENDIAN and CPU_LITTLE_ENDIANSebastian Huber
Use de-facto standard BYTE_ORDER instead. Close #2803.
2016-12-02score: Fix ARM and PowerPC context initializationSebastian Huber
Update #2751.
2016-11-24arm: Fix _CPU_ISR_Is_enabled() for ARMv7-MSebastian Huber
Update #2811.
2016-11-23score: Robust thread dispatchSebastian Huber
On SMP configurations, it is a fatal error to call blocking operating system with interrupts disabled, since this prevents delivery of inter-processor interrupts. This could lead to executing threads which are not allowed to execute resulting in undefined behaviour. The ARM Cortex-M port has a similar problem, since the interrupt state is not a part of the thread context. Update #2811.