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-rw-r--r--cpukit/libmisc/capture/record.c114
1 files changed, 114 insertions, 0 deletions
diff --git a/cpukit/libmisc/capture/record.c b/cpukit/libmisc/capture/record.c
new file mode 100644
index 0000000000..b87043fbbc
--- /dev/null
+++ b/cpukit/libmisc/capture/record.c
@@ -0,0 +1,114 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (C) 2018 embedded brains GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <rtems/record.h>
+#include <rtems/config.h>
+
+#include <string.h>
+
+rtems_record_context *rtems_record_prepare(
+ rtems_record_context *context,
+ unsigned int count
+)
+{
+ rtems_record_prepare_inline( context, count );
+ return context;
+}
+
+rtems_record_context *rtems_record_add(
+ rtems_record_context *context,
+ rtems_record_event event,
+ rtems_record_data data
+)
+{
+ rtems_record_add_inline( context, event, data );
+ return context;
+}
+
+void rtems_record_commit(
+ rtems_record_context *context,
+ rtems_record_event event,
+ rtems_record_data data
+)
+{
+ rtems_record_commit_inline( context, event, data );
+}
+
+void rtems_record_produce( rtems_record_event event, rtems_record_data data )
+{
+ rtems_record_context context;
+
+ rtems_record_prepare_inline( &context, 1 );
+ rtems_record_commit_inline( &context, event, data );
+}
+
+void rtems_record_drain( rtems_record_visitor visitor, void *arg )
+{
+ rtems_record_item item;
+ uint32_t cpu_max;
+ uint32_t cpu_index;
+
+ memset( &item, 0, sizeof( item ) );
+ item.event = RTEMS_RECORD_EVENT_PROCESSOR;
+ cpu_max = rtems_configuration_get_maximum_processors();
+
+ for ( cpu_index = 0; cpu_index < cpu_max; ++cpu_index ) {
+ Per_CPU_Control *cpu;
+ Record_Control *control;
+ unsigned int tail;
+ unsigned int head;
+
+ cpu = _Per_CPU_Get_by_index( cpu_index );
+ control = cpu->record;
+ item.data = cpu_index;
+
+ tail = _Record_Tail( control );
+ head = _Atomic_Load_uint( &control->head, ATOMIC_ORDER_ACQUIRE );
+
+ if ( tail == head ) {
+ continue;
+ }
+
+ ( *visitor )( &item, 1, arg );
+
+ if ( tail < head ) {
+ ( *visitor )( &control->Items[ tail ], head - tail, arg );
+ } else {
+ ( *visitor )( &control->Items[ tail ], control->mask + 1 - tail, arg );
+
+ if ( head > 0 ) {
+ ( *visitor )( &control->Items[ 0 ], head, arg );
+ }
+ }
+
+ _Atomic_Store_uint(
+ &control->tail,
+ head,
+ ATOMIC_ORDER_RELAXED
+ );
+ }
+}