4 files changed, 34 insertions, 7 deletions
diff --git a/bsps/sparc/leon3/start/bspstart.c b/bsps/sparc/leon3/start/bspstart.c
index dec92320e1..2c3844f78d 100644
--- a/bsps/sparc/leon3/start/bspstart.c
+++ b/bsps/sparc/leon3/start/bspstart.c
@@ -1,11 +1,15 @@
 /* SPDX-License-Identifier: BSD-2-Clause */
 
-/*
- *  This set of routines starts the application.  It includes application,
- *  board, and monitor specific initialization and configuration.
- *  The generic CPU dependent initialization has been performed
- *  before any of these are invoked.
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsSPARCLEON3
  *
+ * @brief This source file contains the implementation of bsp_start() and
+ *   definitions of BSP-specific objects.
+ */
+
+/*
  *  COPYRIGHT (c) 2011
  *  Aeroflex Gaisler
  *
diff --git a/bsps/sparc/leon3/start/cache.c b/bsps/sparc/leon3/start/cache.c
index 5049b7f81c..11af2f4d01 100644
--- a/bsps/sparc/leon3/start/cache.c
+++ b/bsps/sparc/leon3/start/cache.c
@@ -1,3 +1,11 @@
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsSPARCLEON3
+ *
+ * @brief This source file contains the implementation of the Cache Manager.
+ */
+
 /*
  * Copyright (c) 2014 embedded brains GmbH & Co. KG
  *
diff --git a/bsps/sparc/leon3/start/cpucounter.c b/bsps/sparc/leon3/start/cpucounter.c
index 6af91f75e5..c36e7ea23b 100644
--- a/bsps/sparc/leon3/start/cpucounter.c
+++ b/bsps/sparc/leon3/start/cpucounter.c
@@ -1,5 +1,13 @@
 /* SPDX-License-Identifier: BSD-2-Clause */
 
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsSPARCLEON3
+ *
+ * @brief This source file contains the implementation of the CPU Counter.
+ */
+
 /*
  * Copyright (C) 2014, 2018 embedded brains GmbH & Co. KG
  *
diff --git a/bsps/sparc/leon3/start/eirq.c b/bsps/sparc/leon3/start/eirq.c
index 05e6789f69..78a1baef25 100644
--- a/bsps/sparc/leon3/start/eirq.c
+++ b/bsps/sparc/leon3/start/eirq.c
@@ -1,8 +1,15 @@
 /* SPDX-License-Identifier: BSD-2-Clause */
 
-/*
- *  GRLIB/LEON3 extended interrupt controller
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsSPARCLEON3
  *
+ * @brief This source file contains the implementation of the interrupt
+ *   controller support.
+ */
+
+/*
  *  Copyright (C) 2021 embedded brains GmbH & Co. KG
  *
  *  COPYRIGHT (c) 2011