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Diffstat (limited to 'bsps/include/dev/grlib/spwrmap.h')
| -rw-r--r-- | bsps/include/dev/grlib/spwrmap.h | 1090 |
1 files changed, 1090 insertions, 0 deletions
diff --git a/bsps/include/dev/grlib/spwrmap.h b/bsps/include/dev/grlib/spwrmap.h new file mode 100644 index 0000000000..df1b5300d1 --- /dev/null +++ b/bsps/include/dev/grlib/spwrmap.h @@ -0,0 +1,1090 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSDeviceGRLIB + * + * @brief This header file defines the SPWRMAP register block interface. + */ + +/* + * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * This file is part of the RTEMS quality process and was automatically + * generated. If you find something that needs to be fixed or + * worded better please post a report or patch to an RTEMS mailing list + * or raise a bug report: + * + * https://www.rtems.org/bugs.html + * + * For information on updating and regenerating please refer to the How-To + * section in the Software Requirements Engineering chapter of the + * RTEMS Software Engineering manual. The manual is provided as a part of + * a release. For development sources please refer to the online + * documentation at: + * + * https://docs.rtems.org + */ + +/* Generated from spec:/dev/grlib/if/spwrmap-header */ + +#ifndef _DEV_GRLIB_SPWRMAP_H +#define _DEV_GRLIB_SPWRMAP_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Generated from spec:/dev/grlib/if/spwrmap */ + +/** + * @defgroup DevGrlibIfSpwrmap SpaceWire Remote Memory Access Protocol (RMAP) + * + * @ingroup RTEMSDeviceGRLIB + * + * @brief This group contains the SpaceWire Remote Memory Access Protocol + * (RMAP) interfaces. + * + * @{ + */ + +/** + * @defgroup DevGrlibIfSpwrmapRTPMAP RTPMAP + * + * @brief Routing table port mapping, addresses 1-12 and 32-255 + * + * @{ + */ + +#define SPWRMAP_RTPMAP_PE_SHIFT 1 +#define SPWRMAP_RTPMAP_PE_MASK 0x1ffeU +#define SPWRMAP_RTPMAP_PE_GET( _reg ) \ + ( ( ( _reg ) >> 1 ) & 0xfffU ) +#define SPWRMAP_RTPMAP_PE( _val ) ( ( _val ) << 1 ) + +#define SPWRMAP_RTPMAP_PD 0x1U + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapRTACTRL RTACTRL + * + * @brief Routing table address control, addresses 1-12 and 32-255 + * + * @{ + */ + +#define SPWRMAP_RTACTRL_SR 0x8U + +#define SPWRMAP_RTACTRL_EN 0x4U + +#define SPWRMAP_RTACTRL_PR 0x2U + +#define SPWRMAP_RTACTRL_HD 0x1U + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapPCTRLCFG PCTRLCFG + * + * @brief Port control, port 0 (configuration port) + * + * @{ + */ + +#define SPWRMAP_PCTRLCFG_PL 0x20000U + +#define SPWRMAP_PCTRLCFG_TS 0x10000U + +#define SPWRMAP_PCTRLCFG_TR 0x200U + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapPCTRL PCTRL + * + * @brief Port control, ports 1-12 (SpaceWire ports and AMBA ports) + * + * @{ + */ + +#define SPWRMAP_PCTRL_RD_SHIFT 24 +#define SPWRMAP_PCTRL_RD_MASK 0xff000000U +#define SPWRMAP_PCTRL_RD_GET( _reg ) \ + ( ( ( _reg ) >> 24 ) & 0xffU ) +#define SPWRMAP_PCTRL_RD( _val ) ( ( _val ) << 24 ) + +#define SPWRMAP_PCTRL_ST 0x200000U + +#define SPWRMAP_PCTRL_SR 0x100000U + +#define SPWRMAP_PCTRL_AD 0x80000U + +#define SPWRMAP_PCTRL_LR 0x40000U + +#define SPWRMAP_PCTRL_PL 0x20000U + +#define SPWRMAP_PCTRL_TS 0x10000U + +#define SPWRMAP_PCTRL_IC 0x8000U + +#define SPWRMAP_PCTRL_ET 0x4000U + +#define SPWRMAP_PCTRL_DI 0x400U + +#define SPWRMAP_PCTRL_TR 0x200U + +#define SPWRMAP_PCTRL_PR 0x100U + +#define SPWRMAP_PCTRL_TF 0x80U + +#define SPWRMAP_PCTRL_RS 0x40U + +#define SPWRMAP_PCTRL_TE 0x20U + +#define SPWRMAP_PCTRL_CE 0x8U + +#define SPWRMAP_PCTRL_AS 0x4U + +#define SPWRMAP_PCTRL_LS 0x2U + +#define SPWRMAP_PCTRL_LD 0x1U + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapPSTSCFG PSTSCFG + * + * @brief Port status, port 0 (configuration port) + * + * @{ + */ + +#define SPWRMAP_PSTSCFG_EO 0x80000000U + +#define SPWRMAP_PSTSCFG_EE 0x40000000U + +#define SPWRMAP_PSTSCFG_PL 0x20000000U + +#define SPWRMAP_PSTSCFG_TT 0x10000000U + +#define SPWRMAP_PSTSCFG_PT 0x8000000U + +#define SPWRMAP_PSTSCFG_HC 0x4000000U + +#define SPWRMAP_PSTSCFG_PI 0x2000000U + +#define SPWRMAP_PSTSCFG_CE 0x1000000U + +#define SPWRMAP_PSTSCFG_EC_SHIFT 20 +#define SPWRMAP_PSTSCFG_EC_MASK 0xf00000U +#define SPWRMAP_PSTSCFG_EC_GET( _reg ) \ + ( ( ( _reg ) >> 20 ) & 0xfU ) +#define SPWRMAP_PSTSCFG_EC( _val ) ( ( _val ) << 20 ) + +#define SPWRMAP_PSTSCFG_TS 0x40000U + +#define SPWRMAP_PSTSCFG_ME 0x20000U + +#define SPWRMAP_PSTSCFG_IP_SHIFT 7 +#define SPWRMAP_PSTSCFG_IP_MASK 0xf80U +#define SPWRMAP_PSTSCFG_IP_GET( _reg ) \ + ( ( ( _reg ) >> 7 ) & 0x1fU ) +#define SPWRMAP_PSTSCFG_IP( _val ) ( ( _val ) << 7 ) + +#define SPWRMAP_PSTSCFG_CP 0x10U + +#define SPWRMAP_PSTSCFG_PC_SHIFT 0 +#define SPWRMAP_PSTSCFG_PC_MASK 0xfU +#define SPWRMAP_PSTSCFG_PC_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0xfU ) +#define SPWRMAP_PSTSCFG_PC( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapPSTS PSTS + * + * @brief Port status, ports 1-12 (SpaceWire ports and AMBA ports) + * + * @{ + */ + +#define SPWRMAP_PSTS_PT_SHIFT 30 +#define SPWRMAP_PSTS_PT_MASK 0xc0000000U +#define SPWRMAP_PSTS_PT_GET( _reg ) \ + ( ( ( _reg ) >> 30 ) & 0x3U ) +#define SPWRMAP_PSTS_PT( _val ) ( ( _val ) << 30 ) + +#define SPWRMAP_PSTS_PL 0x20000000U + +#define SPWRMAP_PSTS_TT 0x10000000U + +#define SPWRMAP_PSTS_RS 0x8000000U + +#define SPWRMAP_PSTS_SR 0x4000000U + +#define SPWRMAP_PSTS_LR 0x400000U + +#define SPWRMAP_PSTS_SP 0x200000U + +#define SPWRMAP_PSTS_AC 0x100000U + +#define SPWRMAP_PSTS_TS 0x40000U + +#define SPWRMAP_PSTS_ME 0x20000U + +#define SPWRMAP_PSTS_TF 0x10000U + +#define SPWRMAP_PSTS_RE 0x8000U + +#define SPWRMAP_PSTS_LS_SHIFT 12 +#define SPWRMAP_PSTS_LS_MASK 0x7000U +#define SPWRMAP_PSTS_LS_GET( _reg ) \ + ( ( ( _reg ) >> 12 ) & 0x7U ) +#define SPWRMAP_PSTS_LS( _val ) ( ( _val ) << 12 ) + +#define SPWRMAP_PSTS_IP_SHIFT 7 +#define SPWRMAP_PSTS_IP_MASK 0xf80U +#define SPWRMAP_PSTS_IP_GET( _reg ) \ + ( ( ( _reg ) >> 7 ) & 0x1fU ) +#define SPWRMAP_PSTS_IP( _val ) ( ( _val ) << 7 ) + +#define SPWRMAP_PSTS_PR 0x40U + +#define SPWRMAP_PSTS_PB 0x20U + +#define SPWRMAP_PSTS_IA 0x10U + +#define SPWRMAP_PSTS_CE 0x8U + +#define SPWRMAP_PSTS_ER 0x4U + +#define SPWRMAP_PSTS_DE 0x2U + +#define SPWRMAP_PSTS_PE 0x1U + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapPTIMER PTIMER + * + * @brief Port timer reload, ports 0-12 + * + * @{ + */ + +#define SPWRMAP_PTIMER_RL_SHIFT 0 +#define SPWRMAP_PTIMER_RL_MASK 0xffffU +#define SPWRMAP_PTIMER_RL_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0xffffU ) +#define SPWRMAP_PTIMER_RL( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapPCTRL2CFG PCTRL2CFG + * + * @brief Port control 2, port 0 (configuration port) + * + * @{ + */ + +#define SPWRMAP_PCTRL2CFG_SM_SHIFT 24 +#define SPWRMAP_PCTRL2CFG_SM_MASK 0xff000000U +#define SPWRMAP_PCTRL2CFG_SM_GET( _reg ) \ + ( ( ( _reg ) >> 24 ) & 0xffU ) +#define SPWRMAP_PCTRL2CFG_SM( _val ) ( ( _val ) << 24 ) + +#define SPWRMAP_PCTRL2CFG_SV_SHIFT 16 +#define SPWRMAP_PCTRL2CFG_SV_MASK 0xff0000U +#define SPWRMAP_PCTRL2CFG_SV_GET( _reg ) \ + ( ( ( _reg ) >> 16 ) & 0xffU ) +#define SPWRMAP_PCTRL2CFG_SV( _val ) ( ( _val ) << 16 ) + +#define SPWRMAP_PCTRL2CFG_OR 0x8000U + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapPCTRL2 PCTRL2 + * + * @brief Port control 2, ports 1-12 (SpaceWire ports and AMBA ports) + * + * @{ + */ + +#define SPWRMAP_PCTRL2_SM_SHIFT 24 +#define SPWRMAP_PCTRL2_SM_MASK 0xff000000U +#define SPWRMAP_PCTRL2_SM_GET( _reg ) \ + ( ( ( _reg ) >> 24 ) & 0xffU ) +#define SPWRMAP_PCTRL2_SM( _val ) ( ( _val ) << 24 ) + +#define SPWRMAP_PCTRL2_SV_SHIFT 16 +#define SPWRMAP_PCTRL2_SV_MASK 0xff0000U +#define SPWRMAP_PCTRL2_SV_GET( _reg ) \ + ( ( ( _reg ) >> 16 ) & 0xffU ) +#define SPWRMAP_PCTRL2_SV( _val ) ( ( _val ) << 16 ) + +#define SPWRMAP_PCTRL2_OR 0x8000U + +#define SPWRMAP_PCTRL2_UR 0x4000U + +#define SPWRMAP_PCTRL2_AT 0x1000U + +#define SPWRMAP_PCTRL2_AR 0x800U + +#define SPWRMAP_PCTRL2_IT 0x400U + +#define SPWRMAP_PCTRL2_IR 0x200U + +#define SPWRMAP_PCTRL2_SD_SHIFT 1 +#define SPWRMAP_PCTRL2_SD_MASK 0x3eU +#define SPWRMAP_PCTRL2_SD_GET( _reg ) \ + ( ( ( _reg ) >> 1 ) & 0x1fU ) +#define SPWRMAP_PCTRL2_SD( _val ) ( ( _val ) << 1 ) + +#define SPWRMAP_PCTRL2_SC 0x1U + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapRTRCFG RTRCFG + * + * @brief Router configuration / status + * + * @{ + */ + +#define SPWRMAP_RTRCFG_SP_SHIFT 27 +#define SPWRMAP_RTRCFG_SP_MASK 0xf8000000U +#define SPWRMAP_RTRCFG_SP_GET( _reg ) \ + ( ( ( _reg ) >> 27 ) & 0x1fU ) +#define SPWRMAP_RTRCFG_SP( _val ) ( ( _val ) << 27 ) + +#define SPWRMAP_RTRCFG_AP_SHIFT 22 +#define SPWRMAP_RTRCFG_AP_MASK 0x7c00000U +#define SPWRMAP_RTRCFG_AP_GET( _reg ) \ + ( ( ( _reg ) >> 22 ) & 0x1fU ) +#define SPWRMAP_RTRCFG_AP( _val ) ( ( _val ) << 22 ) + +#define SPWRMAP_RTRCFG_SR 0x8000U + +#define SPWRMAP_RTRCFG_PE 0x4000U + +#define SPWRMAP_RTRCFG_IC 0x2000U + +#define SPWRMAP_RTRCFG_IS 0x1000U + +#define SPWRMAP_RTRCFG_IP 0x800U + +#define SPWRMAP_RTRCFG_AI 0x400U + +#define SPWRMAP_RTRCFG_AT 0x200U + +#define SPWRMAP_RTRCFG_IE 0x100U + +#define SPWRMAP_RTRCFG_RE 0x80U + +#define SPWRMAP_RTRCFG_EE 0x40U + +#define SPWRMAP_RTRCFG_SA 0x10U + +#define SPWRMAP_RTRCFG_TF 0x8U + +#define SPWRMAP_RTRCFG_ME 0x4U + +#define SPWRMAP_RTRCFG_TA 0x2U + +#define SPWRMAP_RTRCFG_PP 0x1U + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapTC TC + * + * @brief Time-code + * + * @{ + */ + +#define SPWRMAP_TC_RE 0x200U + +#define SPWRMAP_TC_EN 0x100U + +#define SPWRMAP_TC_CF_SHIFT 6 +#define SPWRMAP_TC_CF_MASK 0xc0U +#define SPWRMAP_TC_CF_GET( _reg ) \ + ( ( ( _reg ) >> 6 ) & 0x3U ) +#define SPWRMAP_TC_CF( _val ) ( ( _val ) << 6 ) + +#define SPWRMAP_TC_TC_SHIFT 0 +#define SPWRMAP_TC_TC_MASK 0x3fU +#define SPWRMAP_TC_TC_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0x3fU ) +#define SPWRMAP_TC_TC( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapVER VER + * + * @brief Version / instance ID + * + * @{ + */ + +#define SPWRMAP_VER_MA_SHIFT 24 +#define SPWRMAP_VER_MA_MASK 0xff000000U +#define SPWRMAP_VER_MA_GET( _reg ) \ + ( ( ( _reg ) >> 24 ) & 0xffU ) +#define SPWRMAP_VER_MA( _val ) ( ( _val ) << 24 ) + +#define SPWRMAP_VER_MI_SHIFT 16 +#define SPWRMAP_VER_MI_MASK 0xff0000U +#define SPWRMAP_VER_MI_GET( _reg ) \ + ( ( ( _reg ) >> 16 ) & 0xffU ) +#define SPWRMAP_VER_MI( _val ) ( ( _val ) << 16 ) + +#define SPWRMAP_VER_PA_SHIFT 8 +#define SPWRMAP_VER_PA_MASK 0xff00U +#define SPWRMAP_VER_PA_GET( _reg ) \ + ( ( ( _reg ) >> 8 ) & 0xffU ) +#define SPWRMAP_VER_PA( _val ) ( ( _val ) << 8 ) + +#define SPWRMAP_VER_ID_SHIFT 0 +#define SPWRMAP_VER_ID_MASK 0xffU +#define SPWRMAP_VER_ID_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0xffU ) +#define SPWRMAP_VER_ID( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapIDIV IDIV + * + * @brief Initialization divisor + * + * @{ + */ + +#define SPWRMAP_IDIV_ID_SHIFT 0 +#define SPWRMAP_IDIV_ID_MASK 0xffU +#define SPWRMAP_IDIV_ID_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0xffU ) +#define SPWRMAP_IDIV_ID( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapCFGWE CFGWE + * + * @brief Configuration port write enable + * + * @{ + */ + +#define SPWRMAP_CFGWE_WE 0x1U + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapPRESCALER PRESCALER + * + * @brief Timer prescaler reload + * + * @{ + */ + +#define SPWRMAP_PRESCALER_RL_SHIFT 0 +#define SPWRMAP_PRESCALER_RL_MASK 0xffffU +#define SPWRMAP_PRESCALER_RL_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0xffffU ) +#define SPWRMAP_PRESCALER_RL( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapIMASK IMASK + * + * @brief Interrupt mask + * + * @{ + */ + +#define SPWRMAP_IMASK_PE 0x400U + +#define SPWRMAP_IMASK_SR 0x200U + +#define SPWRMAP_IMASK_RS 0x100U + +#define SPWRMAP_IMASK_TT 0x80U + +#define SPWRMAP_IMASK_PL 0x40U + +#define SPWRMAP_IMASK_TS 0x20U + +#define SPWRMAP_IMASK_AC 0x10U + +#define SPWRMAP_IMASK_RE 0x8U + +#define SPWRMAP_IMASK_IA 0x4U + +#define SPWRMAP_IMASK_LE 0x2U + +#define SPWRMAP_IMASK_ME 0x1U + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapIPMASK IPMASK + * + * @brief Interrupt port mask + * + * @{ + */ + +#define SPWRMAP_IPMASK_IE_SHIFT 0 +#define SPWRMAP_IPMASK_IE_MASK 0xfffffU +#define SPWRMAP_IPMASK_IE_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0xfffffU ) +#define SPWRMAP_IPMASK_IE( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapPIP PIP + * + * @brief Port interrupt pending + * + * @{ + */ + +#define SPWRMAP_PIP_IP_SHIFT 0 +#define SPWRMAP_PIP_IP_MASK 0xfffffU +#define SPWRMAP_PIP_IP_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0xfffffU ) +#define SPWRMAP_PIP_IP( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapICODEGEN ICODEGEN + * + * @brief Interrupt code generation + * + * @{ + */ + +#define SPWRMAP_ICODEGEN_HI 0x200000U + +#define SPWRMAP_ICODEGEN_UA 0x100000U + +#define SPWRMAP_ICODEGEN_AH 0x80000U + +#define SPWRMAP_ICODEGEN_IT 0x40000U + +#define SPWRMAP_ICODEGEN_TE 0x20000U + +#define SPWRMAP_ICODEGEN_EN 0x10000U + +#define SPWRMAP_ICODEGEN_IN_SHIFT 0 +#define SPWRMAP_ICODEGEN_IN_MASK 0x3fU +#define SPWRMAP_ICODEGEN_IN_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0x3fU ) +#define SPWRMAP_ICODEGEN_IN( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapISR0 ISR0 + * + * @brief Interrupt code distribution ISR register, interrupt 0-31 + * + * @{ + */ + +#define SPWRMAP_ISR0_IB_SHIFT 0 +#define SPWRMAP_ISR0_IB_MASK 0xffffffffU +#define SPWRMAP_ISR0_IB_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0xffffffffU ) +#define SPWRMAP_ISR0_IB( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapISR1 ISR1 + * + * @brief Interrupt code distribution ISR register, interrupt 32-63 + * + * @{ + */ + +#define SPWRMAP_ISR1_IB_SHIFT 0 +#define SPWRMAP_ISR1_IB_MASK 0xffffffffU +#define SPWRMAP_ISR1_IB_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0xffffffffU ) +#define SPWRMAP_ISR1_IB( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapISRTIMER ISRTIMER + * + * @brief Interrupt code distribution ISR timer reload + * + * @{ + */ + +#define SPWRMAP_ISRTIMER_RL_SHIFT 0 +#define SPWRMAP_ISRTIMER_RL_MASK 0xffffU +#define SPWRMAP_ISRTIMER_RL_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0xffffU ) +#define SPWRMAP_ISRTIMER_RL( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapAITIMER AITIMER + * + * @brief Interrupt code distribution ACK-to-INT timer reload + * + * @{ + */ + +#define SPWRMAP_AITIMER_RL_SHIFT 0 +#define SPWRMAP_AITIMER_RL_MASK 0xffffU +#define SPWRMAP_AITIMER_RL_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0xffffU ) +#define SPWRMAP_AITIMER_RL( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapISRCTIMER ISRCTIMER + * + * @brief Interrupt code distribution ISR change timer reload + * + * @{ + */ + +#define SPWRMAP_ISRCTIMER_RL_SHIFT 0 +#define SPWRMAP_ISRCTIMER_RL_MASK 0x1fU +#define SPWRMAP_ISRCTIMER_RL_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0x1fU ) +#define SPWRMAP_ISRCTIMER_RL( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapLRUNSTAT LRUNSTAT + * + * @brief Link running status + * + * @{ + */ + +#define SPWRMAP_LRUNSTAT_LR_SHIFT 1 +#define SPWRMAP_LRUNSTAT_LR_MASK 0x7fffeU +#define SPWRMAP_LRUNSTAT_LR_GET( _reg ) \ + ( ( ( _reg ) >> 1 ) & 0x3ffffU ) +#define SPWRMAP_LRUNSTAT_LR( _val ) ( ( _val ) << 1 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapCAP CAP + * + * @brief Capability + * + * @{ + */ + +#define SPWRMAP_CAP_AF_SHIFT 24 +#define SPWRMAP_CAP_AF_MASK 0x3000000U +#define SPWRMAP_CAP_AF_GET( _reg ) \ + ( ( ( _reg ) >> 24 ) & 0x3U ) +#define SPWRMAP_CAP_AF( _val ) ( ( _val ) << 24 ) + +#define SPWRMAP_CAP_PF_SHIFT 20 +#define SPWRMAP_CAP_PF_MASK 0x700000U +#define SPWRMAP_CAP_PF_GET( _reg ) \ + ( ( ( _reg ) >> 20 ) & 0x7U ) +#define SPWRMAP_CAP_PF( _val ) ( ( _val ) << 20 ) + +#define SPWRMAP_CAP_RM_SHIFT 16 +#define SPWRMAP_CAP_RM_MASK 0x70000U +#define SPWRMAP_CAP_RM_GET( _reg ) \ + ( ( ( _reg ) >> 16 ) & 0x7U ) +#define SPWRMAP_CAP_RM( _val ) ( ( _val ) << 16 ) + +#define SPWRMAP_CAP_AS 0x4000U + +#define SPWRMAP_CAP_AX 0x2000U + +#define SPWRMAP_CAP_DP 0x1000U + +#define SPWRMAP_CAP_ID 0x800U + +#define SPWRMAP_CAP_SD 0x400U + +#define SPWRMAP_CAP_PC_SHIFT 5 +#define SPWRMAP_CAP_PC_MASK 0x3e0U +#define SPWRMAP_CAP_PC_GET( _reg ) \ + ( ( ( _reg ) >> 5 ) & 0x1fU ) +#define SPWRMAP_CAP_PC( _val ) ( ( _val ) << 5 ) + +#define SPWRMAP_CAP_CC_SHIFT 0 +#define SPWRMAP_CAP_CC_MASK 0x1fU +#define SPWRMAP_CAP_CC_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0x1fU ) +#define SPWRMAP_CAP_CC( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapPNPVEND PNPVEND + * + * @brief SpaceWire Plug-and-Play - Device Vendor and Product ID + * + * @{ + */ + +#define SPWRMAP_PNPVEND_VI_SHIFT 16 +#define SPWRMAP_PNPVEND_VI_MASK 0xffff0000U +#define SPWRMAP_PNPVEND_VI_GET( _reg ) \ + ( ( ( _reg ) >> 16 ) & 0xffffU ) +#define SPWRMAP_PNPVEND_VI( _val ) ( ( _val ) << 16 ) + +#define SPWRMAP_PNPVEND_PI_SHIFT 0 +#define SPWRMAP_PNPVEND_PI_MASK 0x3ffffffU +#define SPWRMAP_PNPVEND_PI_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0x3ffffffU ) +#define SPWRMAP_PNPVEND_PI( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapPNPUVEND PNPUVEND + * + * @brief SpaceWire Plug-and-Play - Unit Vendor and Product ID + * + * @{ + */ + +#define SPWRMAP_PNPUVEND_VI_SHIFT 16 +#define SPWRMAP_PNPUVEND_VI_MASK 0xffff0000U +#define SPWRMAP_PNPUVEND_VI_GET( _reg ) \ + ( ( ( _reg ) >> 16 ) & 0xffffU ) +#define SPWRMAP_PNPUVEND_VI( _val ) ( ( _val ) << 16 ) + +#define SPWRMAP_PNPUVEND_PI_SHIFT 0 +#define SPWRMAP_PNPUVEND_PI_MASK 0x3ffffffU +#define SPWRMAP_PNPUVEND_PI_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0x3ffffffU ) +#define SPWRMAP_PNPUVEND_PI( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapPNPUSN PNPUSN + * + * @brief SpaceWire Plug-and-Play - Unit Serial Number + * + * @{ + */ + +#define SPWRMAP_PNPUSN_SN_SHIFT 0 +#define SPWRMAP_PNPUSN_SN_MASK 0xffffffffU +#define SPWRMAP_PNPUSN_SN_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0xffffffffU ) +#define SPWRMAP_PNPUSN_SN( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapMAXPLEN MAXPLEN + * + * @brief Maximum packet length, ports 0-12 + * + * @{ + */ + +#define SPWRMAP_MAXPLEN_ML_SHIFT 0 +#define SPWRMAP_MAXPLEN_ML_MASK 0x1ffffffU +#define SPWRMAP_MAXPLEN_ML_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0x1ffffffU ) +#define SPWRMAP_MAXPLEN_ML( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapCREDCNT CREDCNT + * + * @brief Credit counter, ports 1-8 + * + * @{ + */ + +#define SPWRMAP_CREDCNT_OC_SHIFT 6 +#define SPWRMAP_CREDCNT_OC_MASK 0xfc0U +#define SPWRMAP_CREDCNT_OC_GET( _reg ) \ + ( ( ( _reg ) >> 6 ) & 0x3fU ) +#define SPWRMAP_CREDCNT_OC( _val ) ( ( _val ) << 6 ) + +#define SPWRMAP_CREDCNT_IC_SHIFT 0 +#define SPWRMAP_CREDCNT_IC_MASK 0x3fU +#define SPWRMAP_CREDCNT_IC_GET( _reg ) \ + ( ( ( _reg ) >> 0 ) & 0x3fU ) +#define SPWRMAP_CREDCNT_IC( _val ) ( ( _val ) << 0 ) + +/** @} */ + +/** + * @defgroup DevGrlibIfSpwrmapRTCOMB RTCOMB + * + * @brief Routing table, combined port mapping and address control, addresses + * 1-255 + * + * @{ + */ + +#define SPWRMAP_RTCOMB_SR 0x80000000U + +#define SPWRMAP_RTCOMB_EN 0x40000000U + +#define SPWRMAP_RTCOMB_PR 0x20000000U + +#define SPWRMAP_RTCOMB_HD 0x10000000U + +#define SPWRMAP_RTCOMB_PE_SHIFT 1 +#define SPWRMAP_RTCOMB_PE_MASK 0xffffeU +#define SPWRMAP_RTCOMB_PE_GET( _reg ) \ + ( ( ( _reg ) >> 1 ) & 0x7ffffU ) +#define SPWRMAP_RTCOMB_PE( _val ) ( ( _val ) << 1 ) + +#define SPWRMAP_RTCOMB_PD 0x1U + +/** @} */ + +/** + * @brief This set of defines the SpaceWire Remote Memory Access Protocol + * (RMAP) address map. + */ +typedef struct { + uint32_t reserved_0_4; + + /** + * @brief See @ref DevGrlibIfSpwrmapRTPMAP. + */ + uint32_t rtpmap; + + uint32_t reserved_8_404[ 255 ]; + + /** + * @brief See @ref DevGrlibIfSpwrmapRTACTRL. + */ + uint32_t rtactrl; + + uint32_t reserved_408_800[ 254 ]; + + /** + * @brief See @ref DevGrlibIfSpwrmapPCTRLCFG. + */ + uint32_t pctrlcfg; + + /** + * @brief See @ref DevGrlibIfSpwrmapPCTRL. + */ + uint32_t pctrl; + + uint32_t reserved_808_880[ 30 ]; + + /** + * @brief See @ref DevGrlibIfSpwrmapPSTSCFG. + */ + uint32_t pstscfg; + + /** + * @brief See @ref DevGrlibIfSpwrmapPSTS. + */ + uint32_t psts; + + uint32_t reserved_888_900[ 30 ]; + + /** + * @brief See @ref DevGrlibIfSpwrmapPTIMER. + */ + uint32_t ptimer; + + uint32_t reserved_904_980[ 31 ]; + + /** + * @brief See @ref DevGrlibIfSpwrmapPCTRL2CFG. + */ + uint32_t pctrl2cfg; + + /** + * @brief See @ref DevGrlibIfSpwrmapPCTRL2. + */ + uint32_t pctrl2; + + uint32_t reserved_988_a00[ 30 ]; + + /** + * @brief See @ref DevGrlibIfSpwrmapRTRCFG. + */ + uint32_t rtrcfg; + + /** + * @brief See @ref DevGrlibIfSpwrmapTC. + */ + uint32_t tc; + + /** + * @brief See @ref DevGrlibIfSpwrmapVER. + */ + uint32_t ver; + + /** + * @brief See @ref DevGrlibIfSpwrmapIDIV. + */ + uint32_t idiv; + + /** + * @brief See @ref DevGrlibIfSpwrmapCFGWE. + */ + uint32_t cfgwe; + + /** + * @brief See @ref DevGrlibIfSpwrmapPRESCALER. + */ + uint32_t prescaler; + + /** + * @brief See @ref DevGrlibIfSpwrmapIMASK. + */ + uint32_t imask; + + /** + * @brief See @ref DevGrlibIfSpwrmapIPMASK. + */ + uint32_t ipmask; + + /** + * @brief See @ref DevGrlibIfSpwrmapPIP. + */ + uint32_t pip; + + /** + * @brief See @ref DevGrlibIfSpwrmapICODEGEN. + */ + uint32_t icodegen; + + /** + * @brief See @ref DevGrlibIfSpwrmapISR0. + */ + uint32_t isr0; + + /** + * @brief See @ref DevGrlibIfSpwrmapISR1. + */ + uint32_t isr1; + + /** + * @brief See @ref DevGrlibIfSpwrmapISRTIMER. + */ + uint32_t isrtimer; + + /** + * @brief See @ref DevGrlibIfSpwrmapAITIMER. + */ + uint32_t aitimer; + + /** + * @brief See @ref DevGrlibIfSpwrmapISRCTIMER. + */ + uint32_t isrctimer; + + uint32_t reserved_a3c_a40; + + /** + * @brief See @ref DevGrlibIfSpwrmapLRUNSTAT. + */ + uint32_t lrunstat; + + /** + * @brief See @ref DevGrlibIfSpwrmapCAP. + */ + uint32_t cap; + + uint32_t reserved_a48_a50[ 2 ]; + + /** + * @brief See @ref DevGrlibIfSpwrmapPNPVEND. + */ + uint32_t pnpvend; + + /** + * @brief See @ref DevGrlibIfSpwrmapPNPUVEND. + */ + uint32_t pnpuvend; + + /** + * @brief See @ref DevGrlibIfSpwrmapPNPUSN. + */ + uint32_t pnpusn; + + uint32_t reserved_a5c_e00[ 233 ]; + + /** + * @brief See @ref DevGrlibIfSpwrmapMAXPLEN. + */ + uint32_t maxplen; + + uint32_t reserved_e04_e84[ 32 ]; + + /** + * @brief See @ref DevGrlibIfSpwrmapCREDCNT. + */ + uint32_t credcnt; + + uint32_t reserved_e88_1004[ 95 ]; + + /** + * @brief See @ref DevGrlibIfSpwrmapRTCOMB. + */ + uint32_t rtcomb; +} spwrmap; + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* _DEV_GRLIB_SPWRMAP_H */ |