1 files changed, 182 insertions, 0 deletions
diff --git a/bsps/include/dev/grlib/gr740thsens.h b/bsps/include/dev/grlib/gr740thsens.h
new file mode 100644
index 0000000000..04e92ec882
--- /dev/null
+++ b/bsps/include/dev/grlib/gr740thsens.h
@@ -0,0 +1,182 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSDeviceGRLIB
+ *
+ * @brief This header file defines the GR740THSENS register block interface.
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
+ *
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
+ *
+ * https://docs.rtems.org
+ */
+
+/* Generated from spec:/dev/grlib/if/gr740thsens-header */
+
+#ifndef _DEV_GRLIB_GR740THSENS_H
+#define _DEV_GRLIB_GR740THSENS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Generated from spec:/dev/grlib/if/gr740thsens */
+
+/**
+ * @defgroup DevGrlibIfGr740thsens GR740THSENS
+ *
+ * @ingroup RTEMSDeviceGRLIB
+ *
+ * @brief This group contains the GR740THSENS interfaces.
+ *
+ * @{
+ */
+
+/**
+ * @defgroup DevGrlibIfGr740thsensCTRL CTRL
+ *
+ * @brief Control register
+ *
+ * @{
+ */
+
+#define GR740THSENS_CTRL_DIV_SHIFT 16
+#define GR740THSENS_CTRL_DIV_MASK 0x3ff0000U
+#define GR740THSENS_CTRL_DIV_GET( _reg ) \
+  ( ( ( _reg ) >> 16 ) & 0x3ffU )
+#define GR740THSENS_CTRL_DIV( _val ) ( ( _val ) << 16 )
+
+#define GR740THSENS_CTRL_ALEN 0x100U
+
+#define GR740THSENS_CTRL_PDN 0x80U
+
+#define GR740THSENS_CTRL_DCORRECT_SHIFT 2
+#define GR740THSENS_CTRL_DCORRECT_MASK 0x7cU
+#define GR740THSENS_CTRL_DCORRECT_GET( _reg ) \
+  ( ( ( _reg ) >> 2 ) & 0x1fU )
+#define GR740THSENS_CTRL_DCORRECT( _val ) ( ( _val ) << 2 )
+
+#define GR740THSENS_CTRL_SRSTN 0x2U
+
+#define GR740THSENS_CTRL_CLKEN 0x1U
+
+/** @} */
+
+/**
+ * @defgroup DevGrlibIfGr740thsensSTATUS STATUS
+ *
+ * @brief Status register
+ *
+ * @{
+ */
+
+#define GR740THSENS_STATUS_MAX_SHIFT 24
+#define GR740THSENS_STATUS_MAX_MASK 0x7f000000U
+#define GR740THSENS_STATUS_MAX_GET( _reg ) \
+  ( ( ( _reg ) >> 24 ) & 0x7fU )
+#define GR740THSENS_STATUS_MAX( _val ) ( ( _val ) << 24 )
+
+#define GR740THSENS_STATUS_MIN_SHIFT 16
+#define GR740THSENS_STATUS_MIN_MASK 0x7f0000U
+#define GR740THSENS_STATUS_MIN_GET( _reg ) \
+  ( ( ( _reg ) >> 16 ) & 0x7fU )
+#define GR740THSENS_STATUS_MIN( _val ) ( ( _val ) << 16 )
+
+#define GR740THSENS_STATUS_SCLK 0x8000U
+
+#define GR740THSENS_STATUS_WE 0x400U
+
+#define GR740THSENS_STATUS_UPD 0x200U
+
+#define GR740THSENS_STATUS_ALACT 0x100U
+
+#define GR740THSENS_STATUS_DATA_SHIFT 0
+#define GR740THSENS_STATUS_DATA_MASK 0x7fU
+#define GR740THSENS_STATUS_DATA_GET( _reg ) \
+  ( ( ( _reg ) >> 0 ) & 0x7fU )
+#define GR740THSENS_STATUS_DATA( _val ) ( ( _val ) << 0 )
+
+/** @} */
+
+/**
+ * @defgroup DevGrlibIfGr740thsensTHRES THRES
+ *
+ * @brief Threshold register
+ *
+ * @{
+ */
+
+#define GR740THSENS_THRES_THRES_SHIFT 0
+#define GR740THSENS_THRES_THRES_MASK 0x7fU
+#define GR740THSENS_THRES_THRES_GET( _reg ) \
+  ( ( ( _reg ) >> 0 ) & 0x7fU )
+#define GR740THSENS_THRES_THRES( _val ) ( ( _val ) << 0 )
+
+/** @} */
+
+/**
+ * @brief This structure defines the GR740THSENS register block memory map.
+ */
+typedef struct {
+  /**
+   * @brief See @ref DevGrlibIfGr740thsensCTRL.
+   */
+  uint32_t ctrl;
+
+  /**
+   * @brief See @ref DevGrlibIfGr740thsensSTATUS.
+   */
+  uint32_t status;
+
+  /**
+   * @brief See @ref DevGrlibIfGr740thsensTHRES.
+   */
+  uint32_t thres;
+} gr740thsens;
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DEV_GRLIB_GR740THSENS_H */