1 files changed, 233 insertions, 0 deletions
diff --git a/bsps/include/dev/grlib/ftmctrl.h b/bsps/include/dev/grlib/ftmctrl.h
new file mode 100644
index 0000000000..5420054bda
--- /dev/null
+++ b/bsps/include/dev/grlib/ftmctrl.h
@@ -0,0 +1,233 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSDeviceGRLIB
+ *
+ * @brief This header file defines the FTMCTRL register block interface.
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is part of the RTEMS quality process and was automatically
+ * generated.  If you find something that needs to be fixed or
+ * worded better please post a report or patch to an RTEMS mailing list
+ * or raise a bug report:
+ *
+ * https://www.rtems.org/bugs.html
+ *
+ * For information on updating and regenerating please refer to the How-To
+ * section in the Software Requirements Engineering chapter of the
+ * RTEMS Software Engineering manual.  The manual is provided as a part of
+ * a release.  For development sources please refer to the online
+ * documentation at:
+ *
+ * https://docs.rtems.org
+ */
+
+/* Generated from spec:/dev/grlib/if/ftmctrl-header */
+
+#ifndef _DEV_GRLIB_FTMCTRL_H
+#define _DEV_GRLIB_FTMCTRL_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Generated from spec:/dev/grlib/if/ftmctrl */
+
+/**
+ * @defgroup DevGrlibIfFtmctrl FTMCTRL
+ *
+ * @ingroup RTEMSDeviceGRLIB
+ *
+ * @brief This group contains the FTMCTRL interfaces.
+ *
+ * @{
+ */
+
+/**
+ * @defgroup DevGrlibIfFtmctrlMCFG1 MCFG1
+ *
+ * @brief Memory configuration register 1
+ *
+ * @{
+ */
+
+#define FTMCTRL_MCFG1_PBRDY 0x80000000U
+
+#define FTMCTRL_MCFG1_ABRDY 0x40000000U
+
+#define FTMCTRL_MCFG1_IOBUSW 0x20000000U
+
+#define FTMCTRL_MCFG1_IBRDY_SHIFT 27
+#define FTMCTRL_MCFG1_IBRDY_MASK 0x18000000U
+#define FTMCTRL_MCFG1_IBRDY_GET( _reg ) \
+  ( ( ( _reg ) >> 27 ) & 0x3U )
+#define FTMCTRL_MCFG1_IBRDY( _val ) ( ( _val ) << 27 )
+
+#define FTMCTRL_MCFG1_BEXCN 0x4000000U
+
+#define FTMCTRL_MCFG1_IO_WAITSTATES 0x1000000U
+
+#define FTMCTRL_MCFG1_IOEN_SHIFT 20
+#define FTMCTRL_MCFG1_IOEN_MASK 0xf00000U
+#define FTMCTRL_MCFG1_IOEN_GET( _reg ) \
+  ( ( ( _reg ) >> 20 ) & 0xfU )
+#define FTMCTRL_MCFG1_IOEN( _val ) ( ( _val ) << 20 )
+
+#define FTMCTRL_MCFG1_ROMBANKSZ 0x80000U
+
+#define FTMCTRL_MCFG1_PWEN_SHIFT 14
+#define FTMCTRL_MCFG1_PWEN_MASK 0x3c000U
+#define FTMCTRL_MCFG1_PWEN_GET( _reg ) \
+  ( ( ( _reg ) >> 14 ) & 0xfU )
+#define FTMCTRL_MCFG1_PWEN( _val ) ( ( _val ) << 14 )
+
+#define FTMCTRL_MCFG1_PROM_WIDTH_SHIFT 12
+#define FTMCTRL_MCFG1_PROM_WIDTH_MASK 0x3000U
+#define FTMCTRL_MCFG1_PROM_WIDTH_GET( _reg ) \
+  ( ( ( _reg ) >> 12 ) & 0x3U )
+#define FTMCTRL_MCFG1_PROM_WIDTH( _val ) ( ( _val ) << 12 )
+
+#define FTMCTRL_MCFG1_PROM_WRITE_WS 0x800U
+
+#define FTMCTRL_MCFG1_PROM_READ_WS_SHIFT 8
+#define FTMCTRL_MCFG1_PROM_READ_WS_MASK 0x300U
+#define FTMCTRL_MCFG1_PROM_READ_WS_GET( _reg ) \
+  ( ( ( _reg ) >> 8 ) & 0x3U )
+#define FTMCTRL_MCFG1_PROM_READ_WS( _val ) ( ( _val ) << 8 )
+
+/** @} */
+
+/**
+ * @defgroup DevGrlibIfFtmctrlMCFG3 MCFG3
+ *
+ * @brief Memory configuration register 3
+ *
+ * @{
+ */
+
+#define FTMCTRL_MCFG3_ME 0x8000000U
+
+#define FTMCTRL_MCFG3_WB 0x800U
+
+#define FTMCTRL_MCFG3_RB 0x400U
+
+#define FTMCTRL_MCFG3_PE 0x100U
+
+#define FTMCTRL_MCFG3_TCB_SHIFT 0
+#define FTMCTRL_MCFG3_TCB_MASK 0xffU
+#define FTMCTRL_MCFG3_TCB_GET( _reg ) \
+  ( ( ( _reg ) >> 0 ) & 0xffU )
+#define FTMCTRL_MCFG3_TCB( _val ) ( ( _val ) << 0 )
+
+/** @} */
+
+/**
+ * @defgroup DevGrlibIfFtmctrlMCFG5 MCFG5
+ *
+ * @brief Memory configuration register 5
+ *
+ * @{
+ */
+
+#define FTMCTRL_MCFG5_IOHWS_SHIFT 23
+#define FTMCTRL_MCFG5_IOHWS_MASK 0x3f800000U
+#define FTMCTRL_MCFG5_IOHWS_GET( _reg ) \
+  ( ( ( _reg ) >> 23 ) & 0x7fU )
+#define FTMCTRL_MCFG5_IOHWS( _val ) ( ( _val ) << 23 )
+
+#define FTMCTRL_MCFG5_ROMHWS_SHIFT 7
+#define FTMCTRL_MCFG5_ROMHWS_MASK 0x3f80U
+#define FTMCTRL_MCFG5_ROMHWS_GET( _reg ) \
+  ( ( ( _reg ) >> 7 ) & 0x7fU )
+#define FTMCTRL_MCFG5_ROMHWS( _val ) ( ( _val ) << 7 )
+
+/** @} */
+
+/**
+ * @defgroup DevGrlibIfFtmctrlMCFG7 MCFG7
+ *
+ * @brief Memory configuration register 7
+ *
+ * @{
+ */
+
+#define FTMCTRL_MCFG7_BRDYNCNT_SHIFT 16
+#define FTMCTRL_MCFG7_BRDYNCNT_MASK 0xffff0000U
+#define FTMCTRL_MCFG7_BRDYNCNT_GET( _reg ) \
+  ( ( ( _reg ) >> 16 ) & 0xffffU )
+#define FTMCTRL_MCFG7_BRDYNCNT( _val ) ( ( _val ) << 16 )
+
+#define FTMCTRL_MCFG7_BRDYNRLD_SHIFT 0
+#define FTMCTRL_MCFG7_BRDYNRLD_MASK 0xffffU
+#define FTMCTRL_MCFG7_BRDYNRLD_GET( _reg ) \
+  ( ( ( _reg ) >> 0 ) & 0xffffU )
+#define FTMCTRL_MCFG7_BRDYNRLD( _val ) ( ( _val ) << 0 )
+
+/** @} */
+
+/**
+ * @brief This structure defines the FTMCTRL register block memory map.
+ */
+typedef struct {
+  /**
+   * @brief See @ref DevGrlibIfFtmctrlMCFG1.
+   */
+  uint32_t mcfg1;
+
+  uint32_t reserved_4_8;
+
+  /**
+   * @brief See @ref DevGrlibIfFtmctrlMCFG3.
+   */
+  uint32_t mcfg3;
+
+  uint32_t reserved_c_10;
+
+  /**
+   * @brief See @ref DevGrlibIfFtmctrlMCFG5.
+   */
+  uint32_t mcfg5;
+
+  uint32_t reserved_14_18;
+
+  /**
+   * @brief See @ref DevGrlibIfFtmctrlMCFG7.
+   */
+  uint32_t mcfg7;
+} ftmctrl;
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DEV_GRLIB_FTMCTRL_H */