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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-10 12:02:28 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-23 12:52:06 +0100 |
commit | 84e6f15c828869eb7d293096cfcfa0563b5752b3 (patch) | |
tree | efafb1ab17f6d1a612f79b6ec8d821ad9123756c /cpukit/score/cpu/sh | |
parent | a6283671f31498773d0842b43884048c8d2d61fd (diff) |
score: Robust thread dispatch
On SMP configurations, it is a fatal error to call blocking operating
system with interrupts disabled, since this prevents delivery of
inter-processor interrupts. This could lead to executing threads which
are not allowed to execute resulting in undefined behaviour.
The ARM Cortex-M port has a similar problem, since the interrupt state
is not a part of the thread context.
Update #2811.
Diffstat (limited to 'cpukit/score/cpu/sh')
-rw-r--r-- | cpukit/score/cpu/sh/rtems/score/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cpukit/score/cpu/sh/rtems/score/cpu.h b/cpukit/score/cpu/sh/rtems/score/cpu.h index 2b47bae908..b4e553273d 100644 --- a/cpukit/score/cpu/sh/rtems/score/cpu.h +++ b/cpukit/score/cpu/sh/rtems/score/cpu.h @@ -177,6 +177,8 @@ extern "C" { #define CPU_USE_DEFERRED_FP_SWITCH TRUE #endif +#define CPU_ENABLE_ROBUST_THREAD_DISPATCH FALSE + /* * Does this port provide a CPU dependent IDLE task implementation? * |