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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-09-08 10:37:05 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-09-08 10:51:07 +0200 |
| commit | 1776a8e83028d7a2daad89e1c229e84415901edc (patch) | |
| tree | 7dd9d14741006f36f6bff0fb9e9d7ca6c5a838d8 /cpukit/include/pci/access.h | |
| parent | 59907573846e63d4fd1b85227b309dc0d3cde083 (diff) | |
Do not use RTEMS_INLINE_ROUTINEremove-rtems-inline-routine
Directly use "static inline" which is available in C99 and later. This brings
the RTEMS implementation closer to standard C.
Close #3935.
Diffstat (limited to 'cpukit/include/pci/access.h')
| -rw-r--r-- | cpukit/include/pci/access.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/cpukit/include/pci/access.h b/cpukit/include/pci/access.h index 9a53c7e3a3..680c96d4dc 100644 --- a/cpukit/include/pci/access.h +++ b/cpukit/include/pci/access.h @@ -134,32 +134,32 @@ extern int pci_access_drv_register(struct pci_access_drv *drv); extern void pci_modify_cmdsts(pci_dev_t dev, uint32_t mask, uint32_t val); /* Enable Memory in command register */ -RTEMS_INLINE_ROUTINE void pci_mem_enable(pci_dev_t dev) +static inline void pci_mem_enable(pci_dev_t dev) { pci_modify_cmdsts(dev, PCIM_CMD_MEMEN, PCIM_CMD_MEMEN); } -RTEMS_INLINE_ROUTINE void pci_mem_disable(pci_dev_t dev) +static inline void pci_mem_disable(pci_dev_t dev) { pci_modify_cmdsts(dev, PCIM_CMD_MEMEN, 0); } -RTEMS_INLINE_ROUTINE void pci_io_enable(pci_dev_t dev) +static inline void pci_io_enable(pci_dev_t dev) { pci_modify_cmdsts(dev, PCIM_CMD_PORTEN, PCIM_CMD_PORTEN); } -RTEMS_INLINE_ROUTINE void pci_io_disable(pci_dev_t dev) +static inline void pci_io_disable(pci_dev_t dev) { pci_modify_cmdsts(dev, PCIM_CMD_PORTEN, 0); } -RTEMS_INLINE_ROUTINE void pci_master_enable(pci_dev_t dev) +static inline void pci_master_enable(pci_dev_t dev) { pci_modify_cmdsts(dev, PCIM_CMD_BUSMASTEREN, PCIM_CMD_BUSMASTEREN); } -RTEMS_INLINE_ROUTINE void pci_master_disable(pci_dev_t dev) +static inline void pci_master_disable(pci_dev_t dev) { pci_modify_cmdsts(dev, PCIM_CMD_BUSMASTEREN, 0); } @@ -185,25 +185,25 @@ extern void pci_io_w16(uint32_t adr, uint16_t data); extern void pci_io_w32(uint32_t adr, uint32_t data); /* Translate PCI address into CPU accessible address */ -RTEMS_INLINE_ROUTINE int pci_pci2cpu(uint32_t *address, int type) +static inline int pci_pci2cpu(uint32_t *address, int type) { return pci_access_ops.translate(address, type, 0); } /* Translate CPU accessible address into PCI address (for DMA) */ -RTEMS_INLINE_ROUTINE int pci_cpu2pci(uint32_t *address, int type) +static inline int pci_cpu2pci(uint32_t *address, int type) { return pci_access_ops.translate(address, type, 1); } /*** Read/Write a register over PCI Memory Space ***/ -RTEMS_INLINE_ROUTINE uint8_t pci_ld8(volatile uint8_t *addr) +static inline uint8_t pci_ld8(volatile uint8_t *addr) { return *addr; } -RTEMS_INLINE_ROUTINE void pci_st8(volatile uint8_t *addr, uint8_t val) +static inline void pci_st8(volatile uint8_t *addr, uint8_t val) { *addr = val; } |