bsps/grlib: Improve register bit field macros

Close #4828.

1 files changed, 69 insertions, 46 deletions

diff --git a/bsps/include/grlib/grcan-regs.h b/bsps/include/grlib/grcan-regs.h
index 85879c60c9..d1e30e5363 100644
--- a/bsps/include/grlib/grcan-regs.h
+++ b/bsps/include/grlib/grcan-regs.h
@@ -84,32 +84,37 @@ extern "C" {
 #define GRCAN_CANCONF_SCALER_SHIFT 24
 #define GRCAN_CANCONF_SCALER_MASK 0xff000000U
 #define GRCAN_CANCONF_SCALER_GET( _reg ) \
-  ( ( ( _reg ) >> 24 ) & 0xffU )
-#define GRCAN_CANCONF_SCALER( _val ) ( ( _val ) << 24 )
+  ( ( ( _reg ) & GRCAN_CANCONF_SCALER_MASK ) >> GRCAN_CANCONF_SCALER_SHIFT )
+#define GRCAN_CANCONF_SCALER( _val ) \
+  ( ( _val ) << GRCAN_CANCONF_SCALER_SHIFT )
 
 #define GRCAN_CANCONF_PS1_SHIFT 20
 #define GRCAN_CANCONF_PS1_MASK 0xf00000U
 #define GRCAN_CANCONF_PS1_GET( _reg ) \
-  ( ( ( _reg ) >> 20 ) & 0xfU )
-#define GRCAN_CANCONF_PS1( _val ) ( ( _val ) << 20 )
+  ( ( ( _reg ) & GRCAN_CANCONF_PS1_MASK ) >> GRCAN_CANCONF_PS1_SHIFT )
+#define GRCAN_CANCONF_PS1( _val ) \
+  ( ( _val ) << GRCAN_CANCONF_PS1_SHIFT )
 
 #define GRCAN_CANCONF_PS2_SHIFT 16
 #define GRCAN_CANCONF_PS2_MASK 0xf0000U
 #define GRCAN_CANCONF_PS2_GET( _reg ) \
-  ( ( ( _reg ) >> 16 ) & 0xfU )
-#define GRCAN_CANCONF_PS2( _val ) ( ( _val ) << 16 )
+  ( ( ( _reg ) & GRCAN_CANCONF_PS2_MASK ) >> GRCAN_CANCONF_PS2_SHIFT )
+#define GRCAN_CANCONF_PS2( _val ) \
+  ( ( _val ) << GRCAN_CANCONF_PS2_SHIFT )
 
 #define GRCAN_CANCONF_RSJ_SHIFT 12
 #define GRCAN_CANCONF_RSJ_MASK 0x7000U
 #define GRCAN_CANCONF_RSJ_GET( _reg ) \
-  ( ( ( _reg ) >> 12 ) & 0x7U )
-#define GRCAN_CANCONF_RSJ( _val ) ( ( _val ) << 12 )
+  ( ( ( _reg ) & GRCAN_CANCONF_RSJ_MASK ) >> GRCAN_CANCONF_RSJ_SHIFT )
+#define GRCAN_CANCONF_RSJ( _val ) \
+  ( ( _val ) << GRCAN_CANCONF_RSJ_SHIFT )
 
 #define GRCAN_CANCONF_BPR_SHIFT 8
 #define GRCAN_CANCONF_BPR_MASK 0x300U
 #define GRCAN_CANCONF_BPR_GET( _reg ) \
-  ( ( ( _reg ) >> 8 ) & 0x3U )
-#define GRCAN_CANCONF_BPR( _val ) ( ( _val ) << 8 )
+  ( ( ( _reg ) & GRCAN_CANCONF_BPR_MASK ) >> GRCAN_CANCONF_BPR_SHIFT )
+#define GRCAN_CANCONF_BPR( _val ) \
+  ( ( _val ) << GRCAN_CANCONF_BPR_SHIFT )
 
 #define GRCAN_CANCONF_SAM 0x20U
 
@@ -136,26 +141,30 @@ extern "C" {
 #define GRCAN_CANSTAT_TXCHANNELS_SHIFT 28
 #define GRCAN_CANSTAT_TXCHANNELS_MASK 0xf0000000U
 #define GRCAN_CANSTAT_TXCHANNELS_GET( _reg ) \
-  ( ( ( _reg ) >> 28 ) & 0xfU )
-#define GRCAN_CANSTAT_TXCHANNELS( _val ) ( ( _val ) << 28 )
+  ( ( ( _reg ) & GRCAN_CANSTAT_TXCHANNELS_MASK ) >> GRCAN_CANSTAT_TXCHANNELS_SHIFT )
+#define GRCAN_CANSTAT_TXCHANNELS( _val ) \
+  ( ( _val ) << GRCAN_CANSTAT_TXCHANNELS_SHIFT )
 
 #define GRCAN_CANSTAT_RXCHANNELS_SHIFT 24
 #define GRCAN_CANSTAT_RXCHANNELS_MASK 0xf000000U
 #define GRCAN_CANSTAT_RXCHANNELS_GET( _reg ) \
-  ( ( ( _reg ) >> 24 ) & 0xfU )
-#define GRCAN_CANSTAT_RXCHANNELS( _val ) ( ( _val ) << 24 )
+  ( ( ( _reg ) & GRCAN_CANSTAT_RXCHANNELS_MASK ) >> GRCAN_CANSTAT_RXCHANNELS_SHIFT )
+#define GRCAN_CANSTAT_RXCHANNELS( _val ) \
+  ( ( _val ) << GRCAN_CANSTAT_RXCHANNELS_SHIFT )
 
 #define GRCAN_CANSTAT_TXERRCNT_SHIFT 16
 #define GRCAN_CANSTAT_TXERRCNT_MASK 0xff0000U
 #define GRCAN_CANSTAT_TXERRCNT_GET( _reg ) \
-  ( ( ( _reg ) >> 16 ) & 0xffU )
-#define GRCAN_CANSTAT_TXERRCNT( _val ) ( ( _val ) << 16 )
+  ( ( ( _reg ) & GRCAN_CANSTAT_TXERRCNT_MASK ) >> GRCAN_CANSTAT_TXERRCNT_SHIFT )
+#define GRCAN_CANSTAT_TXERRCNT( _val ) \
+  ( ( _val ) << GRCAN_CANSTAT_TXERRCNT_SHIFT )
 
 #define GRCAN_CANSTAT_RXERRCNT_SHIFT 8
 #define GRCAN_CANSTAT_RXERRCNT_MASK 0xff00U
 #define GRCAN_CANSTAT_RXERRCNT_GET( _reg ) \
-  ( ( ( _reg ) >> 8 ) & 0xffU )
-#define GRCAN_CANSTAT_RXERRCNT( _val ) ( ( _val ) << 8 )
+  ( ( ( _reg ) & GRCAN_CANSTAT_RXERRCNT_MASK ) >> GRCAN_CANSTAT_RXERRCNT_SHIFT )
+#define GRCAN_CANSTAT_RXERRCNT( _val ) \
+  ( ( _val ) << GRCAN_CANSTAT_RXERRCNT_SHIFT )
 
 #define GRCAN_CANSTAT_ACTIVE 0x10U
 
@@ -194,8 +203,9 @@ extern "C" {
 #define GRCAN_CANMASK_MASK_SHIFT 0
 #define GRCAN_CANMASK_MASK_MASK 0x1fffffffU
 #define GRCAN_CANMASK_MASK_GET( _reg ) \
-  ( ( ( _reg ) >> 0 ) & 0x1fffffffU )
-#define GRCAN_CANMASK_MASK( _val ) ( ( _val ) << 0 )
+  ( ( ( _reg ) & GRCAN_CANMASK_MASK_MASK ) >> GRCAN_CANMASK_MASK_SHIFT )
+#define GRCAN_CANMASK_MASK( _val ) \
+  ( ( _val ) << GRCAN_CANMASK_MASK_SHIFT )
 
 /** @} */
 
@@ -210,8 +220,9 @@ extern "C" {
 #define GRCAN_CANCODE_SYNC_SHIFT 0
 #define GRCAN_CANCODE_SYNC_MASK 0x1fffffffU
 #define GRCAN_CANCODE_SYNC_GET( _reg ) \
-  ( ( ( _reg ) >> 0 ) & 0x1fffffffU )
-#define GRCAN_CANCODE_SYNC( _val ) ( ( _val ) << 0 )
+  ( ( ( _reg ) & GRCAN_CANCODE_SYNC_MASK ) >> GRCAN_CANCODE_SYNC_SHIFT )
+#define GRCAN_CANCODE_SYNC( _val ) \
+  ( ( _val ) << GRCAN_CANCODE_SYNC_SHIFT )
 
 /** @} */
 
@@ -244,8 +255,9 @@ extern "C" {
 #define GRCAN_CANTXADDR_ADDR_SHIFT 10
 #define GRCAN_CANTXADDR_ADDR_MASK 0xfffffc00U
 #define GRCAN_CANTXADDR_ADDR_GET( _reg ) \
-  ( ( ( _reg ) >> 10 ) & 0x3fffffU )
-#define GRCAN_CANTXADDR_ADDR( _val ) ( ( _val ) << 10 )
+  ( ( ( _reg ) & GRCAN_CANTXADDR_ADDR_MASK ) >> GRCAN_CANTXADDR_ADDR_SHIFT )
+#define GRCAN_CANTXADDR_ADDR( _val ) \
+  ( ( _val ) << GRCAN_CANTXADDR_ADDR_SHIFT )
 
 /** @} */
 
@@ -261,8 +273,9 @@ extern "C" {
 #define GRCAN_CANTXSIZE_SIZE_SHIFT 6
 #define GRCAN_CANTXSIZE_SIZE_MASK 0x1fffc0U
 #define GRCAN_CANTXSIZE_SIZE_GET( _reg ) \
-  ( ( ( _reg ) >> 6 ) & 0x7fffU )
-#define GRCAN_CANTXSIZE_SIZE( _val ) ( ( _val ) << 6 )
+  ( ( ( _reg ) & GRCAN_CANTXSIZE_SIZE_MASK ) >> GRCAN_CANTXSIZE_SIZE_SHIFT )
+#define GRCAN_CANTXSIZE_SIZE( _val ) \
+  ( ( _val ) << GRCAN_CANTXSIZE_SIZE_SHIFT )
 
 /** @} */
 
@@ -277,8 +290,9 @@ extern "C" {
 #define GRCAN_CANTXWR_WRITE_SHIFT 4
 #define GRCAN_CANTXWR_WRITE_MASK 0xffff0U
 #define GRCAN_CANTXWR_WRITE_GET( _reg ) \
-  ( ( ( _reg ) >> 4 ) & 0xffffU )
-#define GRCAN_CANTXWR_WRITE( _val ) ( ( _val ) << 4 )
+  ( ( ( _reg ) & GRCAN_CANTXWR_WRITE_MASK ) >> GRCAN_CANTXWR_WRITE_SHIFT )
+#define GRCAN_CANTXWR_WRITE( _val ) \
+  ( ( _val ) << GRCAN_CANTXWR_WRITE_SHIFT )
 
 /** @} */
 
@@ -293,8 +307,9 @@ extern "C" {
 #define GRCAN_CANTXRD_READ_SHIFT 4
 #define GRCAN_CANTXRD_READ_MASK 0xffff0U
 #define GRCAN_CANTXRD_READ_GET( _reg ) \
-  ( ( ( _reg ) >> 4 ) & 0xffffU )
-#define GRCAN_CANTXRD_READ( _val ) ( ( _val ) << 4 )
+  ( ( ( _reg ) & GRCAN_CANTXRD_READ_MASK ) >> GRCAN_CANTXRD_READ_SHIFT )
+#define GRCAN_CANTXRD_READ( _val ) \
+  ( ( _val ) << GRCAN_CANTXRD_READ_SHIFT )
 
 /** @} */
 
@@ -309,8 +324,9 @@ extern "C" {
 #define GRCAN_CANTXRD_IRQ_SHIFT 4
 #define GRCAN_CANTXRD_IRQ_MASK 0xffff0U
 #define GRCAN_CANTXRD_IRQ_GET( _reg ) \
-  ( ( ( _reg ) >> 4 ) & 0xffffU )
-#define GRCAN_CANTXRD_IRQ( _val ) ( ( _val ) << 4 )
+  ( ( ( _reg ) & GRCAN_CANTXRD_IRQ_MASK ) >> GRCAN_CANTXRD_IRQ_SHIFT )
+#define GRCAN_CANTXRD_IRQ( _val ) \
+  ( ( _val ) << GRCAN_CANTXRD_IRQ_SHIFT )
 
 /** @} */
 
@@ -341,8 +357,9 @@ extern "C" {
 #define GRCAN_CANRXADDR_ADDR_SHIFT 10
 #define GRCAN_CANRXADDR_ADDR_MASK 0xfffffc00U
 #define GRCAN_CANRXADDR_ADDR_GET( _reg ) \
-  ( ( ( _reg ) >> 10 ) & 0x3fffffU )
-#define GRCAN_CANRXADDR_ADDR( _val ) ( ( _val ) << 10 )
+  ( ( ( _reg ) & GRCAN_CANRXADDR_ADDR_MASK ) >> GRCAN_CANRXADDR_ADDR_SHIFT )
+#define GRCAN_CANRXADDR_ADDR( _val ) \
+  ( ( _val ) << GRCAN_CANRXADDR_ADDR_SHIFT )
 
 /** @} */
 
@@ -358,8 +375,9 @@ extern "C" {
 #define GRCAN_CANRXSIZE_SIZE_SHIFT 6
 #define GRCAN_CANRXSIZE_SIZE_MASK 0x1fffc0U
 #define GRCAN_CANRXSIZE_SIZE_GET( _reg ) \
-  ( ( ( _reg ) >> 6 ) & 0x7fffU )
-#define GRCAN_CANRXSIZE_SIZE( _val ) ( ( _val ) << 6 )
+  ( ( ( _reg ) & GRCAN_CANRXSIZE_SIZE_MASK ) >> GRCAN_CANRXSIZE_SIZE_SHIFT )
+#define GRCAN_CANRXSIZE_SIZE( _val ) \
+  ( ( _val ) << GRCAN_CANRXSIZE_SIZE_SHIFT )
 
 /** @} */
 
@@ -374,8 +392,9 @@ extern "C" {
 #define GRCAN_CANRXWR_WRITE_SHIFT 4
 #define GRCAN_CANRXWR_WRITE_MASK 0xffff0U
 #define GRCAN_CANRXWR_WRITE_GET( _reg ) \
-  ( ( ( _reg ) >> 4 ) & 0xffffU )
-#define GRCAN_CANRXWR_WRITE( _val ) ( ( _val ) << 4 )
+  ( ( ( _reg ) & GRCAN_CANRXWR_WRITE_MASK ) >> GRCAN_CANRXWR_WRITE_SHIFT )
+#define GRCAN_CANRXWR_WRITE( _val ) \
+  ( ( _val ) << GRCAN_CANRXWR_WRITE_SHIFT )
 
 /** @} */
 
@@ -390,8 +409,9 @@ extern "C" {
 #define GRCAN_CANRXRD_READ_SHIFT 4
 #define GRCAN_CANRXRD_READ_MASK 0xffff0U
 #define GRCAN_CANRXRD_READ_GET( _reg ) \
-  ( ( ( _reg ) >> 4 ) & 0xffffU )
-#define GRCAN_CANRXRD_READ( _val ) ( ( _val ) << 4 )
+  ( ( ( _reg ) & GRCAN_CANRXRD_READ_MASK ) >> GRCAN_CANRXRD_READ_SHIFT )
+#define GRCAN_CANRXRD_READ( _val ) \
+  ( ( _val ) << GRCAN_CANRXRD_READ_SHIFT )
 
 /** @} */
 
@@ -407,8 +427,9 @@ extern "C" {
 #define GRCAN_CANRXIRQ_IRQ_SHIFT 4
 #define GRCAN_CANRXIRQ_IRQ_MASK 0xffff0U
 #define GRCAN_CANRXIRQ_IRQ_GET( _reg ) \
-  ( ( ( _reg ) >> 4 ) & 0xffffU )
-#define GRCAN_CANRXIRQ_IRQ( _val ) ( ( _val ) << 4 )
+  ( ( ( _reg ) & GRCAN_CANRXIRQ_IRQ_MASK ) >> GRCAN_CANRXIRQ_IRQ_SHIFT )
+#define GRCAN_CANRXIRQ_IRQ( _val ) \
+  ( ( _val ) << GRCAN_CANRXIRQ_IRQ_SHIFT )
 
 /** @} */
 
@@ -424,8 +445,9 @@ extern "C" {
 #define GRCAN_CANRXMASK_AM_SHIFT 0
 #define GRCAN_CANRXMASK_AM_MASK 0x1fffffffU
 #define GRCAN_CANRXMASK_AM_GET( _reg ) \
-  ( ( ( _reg ) >> 0 ) & 0x1fffffffU )
-#define GRCAN_CANRXMASK_AM( _val ) ( ( _val ) << 0 )
+  ( ( ( _reg ) & GRCAN_CANRXMASK_AM_MASK ) >> GRCAN_CANRXMASK_AM_SHIFT )
+#define GRCAN_CANRXMASK_AM( _val ) \
+  ( ( _val ) << GRCAN_CANRXMASK_AM_SHIFT )
 
 /** @} */
 
@@ -441,8 +463,9 @@ extern "C" {
 #define GRCAN_CANRXCODE_AC_SHIFT 0
 #define GRCAN_CANRXCODE_AC_MASK 0x1fffffffU
 #define GRCAN_CANRXCODE_AC_GET( _reg ) \
-  ( ( ( _reg ) >> 0 ) & 0x1fffffffU )
-#define GRCAN_CANRXCODE_AC( _val ) ( ( _val ) << 0 )
+  ( ( ( _reg ) & GRCAN_CANRXCODE_AC_MASK ) >> GRCAN_CANRXCODE_AC_SHIFT )
+#define GRCAN_CANRXCODE_AC( _val ) \
+  ( ( _val ) << GRCAN_CANRXCODE_AC_SHIFT )
 
 /** @} */