diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-03-15 08:42:33 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-03-17 08:48:52 +0100 |
| commit | 375222ff9064b4ef4991f3fcb761ab389105df88 (patch) | |
| tree | a77a2969da38ef5c41c4e87a0157fe6f8f5f2a04 | |
| parent | de35b6382555395c1ec006f1ba47c40ebc4c96cf (diff) | |
bsps/grlib: Improve register bit field macros
Close #4828.
27 files changed, 1623 insertions, 1082 deletions
diff --git a/bsps/include/grlib/ahbstat-regs.h b/bsps/include/grlib/ahbstat-regs.h index 589c2bdf14..9241287b9e 100644 --- a/bsps/include/grlib/ahbstat-regs.h +++ b/bsps/include/grlib/ahbstat-regs.h @@ -98,14 +98,16 @@ extern "C" { #define AHBSTAT_AHBS_HMASTER_SHIFT 3 #define AHBSTAT_AHBS_HMASTER_MASK 0x78U #define AHBSTAT_AHBS_HMASTER_GET( _reg ) \ - ( ( ( _reg ) >> 3 ) & 0xfU ) -#define AHBSTAT_AHBS_HMASTER( _val ) ( ( _val ) << 3 ) + ( ( ( _reg ) & AHBSTAT_AHBS_HMASTER_MASK ) >> AHBSTAT_AHBS_HMASTER_SHIFT ) +#define AHBSTAT_AHBS_HMASTER( _val ) \ + ( ( _val ) << AHBSTAT_AHBS_HMASTER_SHIFT ) #define AHBSTAT_AHBS_HSIZE_SHIFT 0 #define AHBSTAT_AHBS_HSIZE_MASK 0x7U #define AHBSTAT_AHBS_HSIZE_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7U ) -#define AHBSTAT_AHBS_HSIZE( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & AHBSTAT_AHBS_HSIZE_MASK ) >> AHBSTAT_AHBS_HSIZE_SHIFT ) +#define AHBSTAT_AHBS_HSIZE( _val ) \ + ( ( _val ) << AHBSTAT_AHBS_HSIZE_SHIFT ) /** @} */ @@ -121,8 +123,9 @@ extern "C" { #define AHBSTAT_AHBFAR_HADDR_SHIFT 0 #define AHBSTAT_AHBFAR_HADDR_MASK 0xffffffffU #define AHBSTAT_AHBFAR_HADDR_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define AHBSTAT_AHBFAR_HADDR( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & AHBSTAT_AHBFAR_HADDR_MASK ) >> AHBSTAT_AHBFAR_HADDR_SHIFT ) +#define AHBSTAT_AHBFAR_HADDR( _val ) \ + ( ( _val ) << AHBSTAT_AHBFAR_HADDR_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/ahbtrace-regs.h b/bsps/include/grlib/ahbtrace-regs.h index c269916c81..1d2ff486c2 100644 --- a/bsps/include/grlib/ahbtrace-regs.h +++ b/bsps/include/grlib/ahbtrace-regs.h @@ -84,16 +84,18 @@ extern "C" { #define AHBTRACE_CTRL_DCNT_SHIFT 16 #define AHBTRACE_CTRL_DCNT_MASK 0x7f0000U #define AHBTRACE_CTRL_DCNT_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x7fU ) -#define AHBTRACE_CTRL_DCNT( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & AHBTRACE_CTRL_DCNT_MASK ) >> AHBTRACE_CTRL_DCNT_SHIFT ) +#define AHBTRACE_CTRL_DCNT( _val ) \ + ( ( _val ) << AHBTRACE_CTRL_DCNT_SHIFT ) #define AHBTRACE_CTRL_PF 0x100U #define AHBTRACE_CTRL_BW_SHIFT 6 #define AHBTRACE_CTRL_BW_MASK 0xc0U #define AHBTRACE_CTRL_BW_GET( _reg ) \ - ( ( ( _reg ) >> 6 ) & 0x3U ) -#define AHBTRACE_CTRL_BW( _val ) ( ( _val ) << 6 ) + ( ( ( _reg ) & AHBTRACE_CTRL_BW_MASK ) >> AHBTRACE_CTRL_BW_SHIFT ) +#define AHBTRACE_CTRL_BW( _val ) \ + ( ( _val ) << AHBTRACE_CTRL_BW_SHIFT ) #define AHBTRACE_CTRL_RF 0x20U @@ -120,8 +122,9 @@ extern "C" { #define AHBTRACE_INDEX_INDEX_SHIFT 4 #define AHBTRACE_INDEX_INDEX_MASK 0x7f0U #define AHBTRACE_INDEX_INDEX_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0x7fU ) -#define AHBTRACE_INDEX_INDEX( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & AHBTRACE_INDEX_INDEX_MASK ) >> AHBTRACE_INDEX_INDEX_SHIFT ) +#define AHBTRACE_INDEX_INDEX( _val ) \ + ( ( _val ) << AHBTRACE_INDEX_INDEX_SHIFT ) /** @} */ @@ -137,8 +140,9 @@ extern "C" { #define AHBTRACE_TIMETAG_TIMETAG_SHIFT 0 #define AHBTRACE_TIMETAG_TIMETAG_MASK 0xffffffffU #define AHBTRACE_TIMETAG_TIMETAG_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define AHBTRACE_TIMETAG_TIMETAG( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & AHBTRACE_TIMETAG_TIMETAG_MASK ) >> AHBTRACE_TIMETAG_TIMETAG_SHIFT ) +#define AHBTRACE_TIMETAG_TIMETAG( _val ) \ + ( ( _val ) << AHBTRACE_TIMETAG_TIMETAG_SHIFT ) /** @} */ @@ -154,14 +158,16 @@ extern "C" { #define AHBTRACE_MSFILT_SMASK_15_0_SHIFT 16 #define AHBTRACE_MSFILT_SMASK_15_0_MASK 0xffff0000U #define AHBTRACE_MSFILT_SMASK_15_0_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define AHBTRACE_MSFILT_SMASK_15_0( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & AHBTRACE_MSFILT_SMASK_15_0_MASK ) >> AHBTRACE_MSFILT_SMASK_15_0_SHIFT ) +#define AHBTRACE_MSFILT_SMASK_15_0( _val ) \ + ( ( _val ) << AHBTRACE_MSFILT_SMASK_15_0_SHIFT ) #define AHBTRACE_MSFILT_MMASK_15_0_SHIFT 0 #define AHBTRACE_MSFILT_MMASK_15_0_MASK 0xffffU #define AHBTRACE_MSFILT_MMASK_15_0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define AHBTRACE_MSFILT_MMASK_15_0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & AHBTRACE_MSFILT_MMASK_15_0_MASK ) >> AHBTRACE_MSFILT_MMASK_15_0_SHIFT ) +#define AHBTRACE_MSFILT_MMASK_15_0( _val ) \ + ( ( _val ) << AHBTRACE_MSFILT_MMASK_15_0_SHIFT ) /** @} */ @@ -177,8 +183,9 @@ extern "C" { #define AHBTRACE_TBBA_BADDR_31_2_SHIFT 2 #define AHBTRACE_TBBA_BADDR_31_2_MASK 0xfffffffcU #define AHBTRACE_TBBA_BADDR_31_2_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x3fffffffU ) -#define AHBTRACE_TBBA_BADDR_31_2( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & AHBTRACE_TBBA_BADDR_31_2_MASK ) >> AHBTRACE_TBBA_BADDR_31_2_SHIFT ) +#define AHBTRACE_TBBA_BADDR_31_2( _val ) \ + ( ( _val ) << AHBTRACE_TBBA_BADDR_31_2_SHIFT ) /** @} */ @@ -194,8 +201,9 @@ extern "C" { #define AHBTRACE_TBBM_BMASK_31_2_SHIFT 2 #define AHBTRACE_TBBM_BMASK_31_2_MASK 0xfffffffcU #define AHBTRACE_TBBM_BMASK_31_2_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x3fffffffU ) -#define AHBTRACE_TBBM_BMASK_31_2( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & AHBTRACE_TBBM_BMASK_31_2_MASK ) >> AHBTRACE_TBBM_BMASK_31_2_SHIFT ) +#define AHBTRACE_TBBM_BMASK_31_2( _val ) \ + ( ( _val ) << AHBTRACE_TBBM_BMASK_31_2_SHIFT ) #define AHBTRACE_TBBM_LD 0x2U diff --git a/bsps/include/grlib/apbuart-regs.h b/bsps/include/grlib/apbuart-regs.h index 9f0d7c95ba..195dc32ca0 100644 --- a/bsps/include/grlib/apbuart-regs.h +++ b/bsps/include/grlib/apbuart-regs.h @@ -84,8 +84,9 @@ extern "C" { #define APBUART_DATA_DATA_SHIFT 0 #define APBUART_DATA_DATA_MASK 0xffU #define APBUART_DATA_DATA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define APBUART_DATA_DATA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & APBUART_DATA_DATA_MASK ) >> APBUART_DATA_DATA_SHIFT ) +#define APBUART_DATA_DATA( _val ) \ + ( ( _val ) << APBUART_DATA_DATA_SHIFT ) /** @} */ @@ -100,14 +101,16 @@ extern "C" { #define APBUART_STATUS_RCNT_SHIFT 26 #define APBUART_STATUS_RCNT_MASK 0xfc000000U #define APBUART_STATUS_RCNT_GET( _reg ) \ - ( ( ( _reg ) >> 26 ) & 0x3fU ) -#define APBUART_STATUS_RCNT( _val ) ( ( _val ) << 26 ) + ( ( ( _reg ) & APBUART_STATUS_RCNT_MASK ) >> APBUART_STATUS_RCNT_SHIFT ) +#define APBUART_STATUS_RCNT( _val ) \ + ( ( _val ) << APBUART_STATUS_RCNT_SHIFT ) #define APBUART_STATUS_TCNT_SHIFT 20 #define APBUART_STATUS_TCNT_MASK 0x3f00000U #define APBUART_STATUS_TCNT_GET( _reg ) \ - ( ( ( _reg ) >> 20 ) & 0x3fU ) -#define APBUART_STATUS_TCNT( _val ) ( ( _val ) << 20 ) + ( ( ( _reg ) & APBUART_STATUS_TCNT_MASK ) >> APBUART_STATUS_TCNT_SHIFT ) +#define APBUART_STATUS_TCNT( _val ) \ + ( ( _val ) << APBUART_STATUS_TCNT_SHIFT ) #define APBUART_STATUS_RF 0x400U @@ -186,8 +189,9 @@ extern "C" { #define APBUART_SCALER_SCALER_RELOAD_VALUE_SHIFT 0 #define APBUART_SCALER_SCALER_RELOAD_VALUE_MASK 0xfffffU #define APBUART_SCALER_SCALER_RELOAD_VALUE_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfffffU ) -#define APBUART_SCALER_SCALER_RELOAD_VALUE( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & APBUART_SCALER_SCALER_RELOAD_VALUE_MASK ) >> APBUART_SCALER_SCALER_RELOAD_VALUE_SHIFT ) +#define APBUART_SCALER_SCALER_RELOAD_VALUE( _val ) \ + ( ( _val ) << APBUART_SCALER_SCALER_RELOAD_VALUE_SHIFT ) /** @} */ @@ -202,8 +206,9 @@ extern "C" { #define APBUART_FIFO_DATA_SHIFT 0 #define APBUART_FIFO_DATA_MASK 0xffU #define APBUART_FIFO_DATA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define APBUART_FIFO_DATA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & APBUART_FIFO_DATA_MASK ) >> APBUART_FIFO_DATA_SHIFT ) +#define APBUART_FIFO_DATA( _val ) \ + ( ( _val ) << APBUART_FIFO_DATA_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/dsu4-regs.h b/bsps/include/grlib/dsu4-regs.h index 30f104ab88..0d3bc0d15d 100644 --- a/bsps/include/grlib/dsu4-regs.h +++ b/bsps/include/grlib/dsu4-regs.h @@ -118,8 +118,9 @@ extern "C" { #define DSU4_DTTC_TIMETAG_SHIFT 0 #define DSU4_DTTC_TIMETAG_MASK 0xffffffffU #define DSU4_DTTC_TIMETAG_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define DSU4_DTTC_TIMETAG( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & DSU4_DTTC_TIMETAG_MASK ) >> DSU4_DTTC_TIMETAG_SHIFT ) +#define DSU4_DTTC_TIMETAG( _val ) \ + ( ( _val ) << DSU4_DTTC_TIMETAG_SHIFT ) /** @} */ @@ -134,14 +135,16 @@ extern "C" { #define DSU4_BRSS_SS_3_0_SHIFT 16 #define DSU4_BRSS_SS_3_0_MASK 0xf0000U #define DSU4_BRSS_SS_3_0_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xfU ) -#define DSU4_BRSS_SS_3_0( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & DSU4_BRSS_SS_3_0_MASK ) >> DSU4_BRSS_SS_3_0_SHIFT ) +#define DSU4_BRSS_SS_3_0( _val ) \ + ( ( _val ) << DSU4_BRSS_SS_3_0_SHIFT ) #define DSU4_BRSS_BN_3_0_SHIFT 0 #define DSU4_BRSS_BN_3_0_MASK 0xfU #define DSU4_BRSS_BN_3_0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfU ) -#define DSU4_BRSS_BN_3_0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & DSU4_BRSS_BN_3_0_MASK ) >> DSU4_BRSS_BN_3_0_SHIFT ) +#define DSU4_BRSS_BN_3_0( _val ) \ + ( ( _val ) << DSU4_BRSS_BN_3_0_SHIFT ) /** @} */ @@ -156,14 +159,16 @@ extern "C" { #define DSU4_DBGM_DM_3_0_SHIFT 16 #define DSU4_DBGM_DM_3_0_MASK 0xf0000U #define DSU4_DBGM_DM_3_0_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xfU ) -#define DSU4_DBGM_DM_3_0( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & DSU4_DBGM_DM_3_0_MASK ) >> DSU4_DBGM_DM_3_0_SHIFT ) +#define DSU4_DBGM_DM_3_0( _val ) \ + ( ( _val ) << DSU4_DBGM_DM_3_0_SHIFT ) #define DSU4_DBGM_ED_3_0_SHIFT 0 #define DSU4_DBGM_ED_3_0_MASK 0xfU #define DSU4_DBGM_ED_3_0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfU ) -#define DSU4_DBGM_ED_3_0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & DSU4_DBGM_ED_3_0_MASK ) >> DSU4_DBGM_ED_3_0_SHIFT ) +#define DSU4_DBGM_ED_3_0( _val ) \ + ( ( _val ) << DSU4_DBGM_ED_3_0_SHIFT ) /** @} */ @@ -180,8 +185,9 @@ extern "C" { #define DSU4_DTR_TRAPTYPE_SHIFT 4 #define DSU4_DTR_TRAPTYPE_MASK 0xff0U #define DSU4_DTR_TRAPTYPE_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xffU ) -#define DSU4_DTR_TRAPTYPE( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & DSU4_DTR_TRAPTYPE_MASK ) >> DSU4_DTR_TRAPTYPE_SHIFT ) +#define DSU4_DTR_TRAPTYPE( _val ) \ + ( ( _val ) << DSU4_DTR_TRAPTYPE_SHIFT ) /** @} */ @@ -196,8 +202,9 @@ extern "C" { #define DSU4_DASI_ASI_SHIFT 0 #define DSU4_DASI_ASI_MASK 0xffU #define DSU4_DASI_ASI_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define DSU4_DASI_ASI( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & DSU4_DASI_ASI_MASK ) >> DSU4_DASI_ASI_SHIFT ) +#define DSU4_DASI_ASI( _val ) \ + ( ( _val ) << DSU4_DASI_ASI_SHIFT ) /** @} */ @@ -212,8 +219,9 @@ extern "C" { #define DSU4_ATBC_DCNT_SHIFT 16 #define DSU4_ATBC_DCNT_MASK 0xff0000U #define DSU4_ATBC_DCNT_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffU ) -#define DSU4_ATBC_DCNT( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & DSU4_ATBC_DCNT_MASK ) >> DSU4_ATBC_DCNT_SHIFT ) +#define DSU4_ATBC_DCNT( _val ) \ + ( ( _val ) << DSU4_ATBC_DCNT_SHIFT ) #define DSU4_ATBC_DF 0x100U @@ -226,8 +234,9 @@ extern "C" { #define DSU4_ATBC_BW_SHIFT 3 #define DSU4_ATBC_BW_MASK 0x18U #define DSU4_ATBC_BW_GET( _reg ) \ - ( ( ( _reg ) >> 3 ) & 0x3U ) -#define DSU4_ATBC_BW( _val ) ( ( _val ) << 3 ) + ( ( ( _reg ) & DSU4_ATBC_BW_MASK ) >> DSU4_ATBC_BW_SHIFT ) +#define DSU4_ATBC_BW( _val ) \ + ( ( _val ) << DSU4_ATBC_BW_SHIFT ) #define DSU4_ATBC_BR 0x4U @@ -248,8 +257,9 @@ extern "C" { #define DSU4_ATBI_INDEX_SHIFT 4 #define DSU4_ATBI_INDEX_MASK 0xff0U #define DSU4_ATBI_INDEX_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xffU ) -#define DSU4_ATBI_INDEX( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & DSU4_ATBI_INDEX_MASK ) >> DSU4_ATBI_INDEX_SHIFT ) +#define DSU4_ATBI_INDEX( _val ) \ + ( ( _val ) << DSU4_ATBI_INDEX_SHIFT ) /** @} */ @@ -265,14 +275,16 @@ extern "C" { #define DSU4_ATBFC_WPF_SHIFT 12 #define DSU4_ATBFC_WPF_MASK 0x3000U #define DSU4_ATBFC_WPF_GET( _reg ) \ - ( ( ( _reg ) >> 12 ) & 0x3U ) -#define DSU4_ATBFC_WPF( _val ) ( ( _val ) << 12 ) + ( ( ( _reg ) & DSU4_ATBFC_WPF_MASK ) >> DSU4_ATBFC_WPF_SHIFT ) +#define DSU4_ATBFC_WPF( _val ) \ + ( ( _val ) << DSU4_ATBFC_WPF_SHIFT ) #define DSU4_ATBFC_BPF_SHIFT 8 #define DSU4_ATBFC_BPF_MASK 0x300U #define DSU4_ATBFC_BPF_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0x3U ) -#define DSU4_ATBFC_BPF( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & DSU4_ATBFC_BPF_MASK ) >> DSU4_ATBFC_BPF_SHIFT ) +#define DSU4_ATBFC_BPF( _val ) \ + ( ( _val ) << DSU4_ATBFC_BPF_SHIFT ) #define DSU4_ATBFC_PF 0x8U @@ -296,14 +308,16 @@ extern "C" { #define DSU4_ATBFM_SMASK_15_0_SHIFT 16 #define DSU4_ATBFM_SMASK_15_0_MASK 0xffff0000U #define DSU4_ATBFM_SMASK_15_0_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define DSU4_ATBFM_SMASK_15_0( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & DSU4_ATBFM_SMASK_15_0_MASK ) >> DSU4_ATBFM_SMASK_15_0_SHIFT ) +#define DSU4_ATBFM_SMASK_15_0( _val ) \ + ( ( _val ) << DSU4_ATBFM_SMASK_15_0_SHIFT ) #define DSU4_ATBFM_MMASK_15_0_SHIFT 0 #define DSU4_ATBFM_MMASK_15_0_MASK 0xffffU #define DSU4_ATBFM_MMASK_15_0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define DSU4_ATBFM_MMASK_15_0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & DSU4_ATBFM_MMASK_15_0_MASK ) >> DSU4_ATBFM_MMASK_15_0_SHIFT ) +#define DSU4_ATBFM_MMASK_15_0( _val ) \ + ( ( _val ) << DSU4_ATBFM_MMASK_15_0_SHIFT ) /** @} */ @@ -319,8 +333,9 @@ extern "C" { #define DSU4_ATBBA_BADDR_31_2_SHIFT 2 #define DSU4_ATBBA_BADDR_31_2_MASK 0xfffffffcU #define DSU4_ATBBA_BADDR_31_2_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x3fffffffU ) -#define DSU4_ATBBA_BADDR_31_2( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & DSU4_ATBBA_BADDR_31_2_MASK ) >> DSU4_ATBBA_BADDR_31_2_SHIFT ) +#define DSU4_ATBBA_BADDR_31_2( _val ) \ + ( ( _val ) << DSU4_ATBBA_BADDR_31_2_SHIFT ) /** @} */ @@ -336,8 +351,9 @@ extern "C" { #define DSU4_ATBBM_BMASK_31_2_SHIFT 2 #define DSU4_ATBBM_BMASK_31_2_MASK 0xfffffffcU #define DSU4_ATBBM_BMASK_31_2_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x3fffffffU ) -#define DSU4_ATBBM_BMASK_31_2( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & DSU4_ATBBM_BMASK_31_2_MASK ) >> DSU4_ATBBM_BMASK_31_2_SHIFT ) +#define DSU4_ATBBM_BMASK_31_2( _val ) \ + ( ( _val ) << DSU4_ATBBM_BMASK_31_2_SHIFT ) #define DSU4_ATBBM_LD 0x2U @@ -362,8 +378,9 @@ extern "C" { #define DSU4_ICNT_ICOUNT_28_0_SHIFT 0 #define DSU4_ICNT_ICOUNT_28_0_MASK 0x1fffffffU #define DSU4_ICNT_ICOUNT_28_0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fffffffU ) -#define DSU4_ICNT_ICOUNT_28_0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & DSU4_ICNT_ICOUNT_28_0_MASK ) >> DSU4_ICNT_ICOUNT_28_0_SHIFT ) +#define DSU4_ICNT_ICOUNT_28_0( _val ) \ + ( ( _val ) << DSU4_ICNT_ICOUNT_28_0_SHIFT ) /** @} */ @@ -401,8 +418,9 @@ extern "C" { #define DSU4_AHBWPD_DATA_SHIFT 0 #define DSU4_AHBWPD_DATA_MASK 0xffffffffU #define DSU4_AHBWPD_DATA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define DSU4_AHBWPD_DATA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & DSU4_AHBWPD_DATA_MASK ) >> DSU4_AHBWPD_DATA_SHIFT ) +#define DSU4_AHBWPD_DATA( _val ) \ + ( ( _val ) << DSU4_AHBWPD_DATA_SHIFT ) /** @} */ @@ -417,8 +435,9 @@ extern "C" { #define DSU4_AHBWPM_MASK_SHIFT 0 #define DSU4_AHBWPM_MASK_MASK 0xffffffffU #define DSU4_AHBWPM_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define DSU4_AHBWPM_MASK( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & DSU4_AHBWPM_MASK_MASK ) >> DSU4_AHBWPM_MASK_SHIFT ) +#define DSU4_AHBWPM_MASK( _val ) \ + ( ( _val ) << DSU4_AHBWPM_MASK_SHIFT ) /** @} */ @@ -434,14 +453,16 @@ extern "C" { #define DSU4_ITBC0_TFILT_SHIFT 28 #define DSU4_ITBC0_TFILT_MASK 0xf0000000U #define DSU4_ITBC0_TFILT_GET( _reg ) \ - ( ( ( _reg ) >> 28 ) & 0xfU ) -#define DSU4_ITBC0_TFILT( _val ) ( ( _val ) << 28 ) + ( ( ( _reg ) & DSU4_ITBC0_TFILT_MASK ) >> DSU4_ITBC0_TFILT_SHIFT ) +#define DSU4_ITBC0_TFILT( _val ) \ + ( ( _val ) << DSU4_ITBC0_TFILT_SHIFT ) #define DSU4_ITBC0_ITPOINTER_SHIFT 0 #define DSU4_ITBC0_ITPOINTER_MASK 0xffffU #define DSU4_ITBC0_ITPOINTER_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define DSU4_ITBC0_ITPOINTER( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & DSU4_ITBC0_ITPOINTER_MASK ) >> DSU4_ITBC0_ITPOINTER_SHIFT ) +#define DSU4_ITBC0_ITPOINTER( _val ) \ + ( ( _val ) << DSU4_ITBC0_ITPOINTER_SHIFT ) /** @} */ @@ -459,8 +480,9 @@ extern "C" { #define DSU4_ITBC1_TLIM_SHIFT 24 #define DSU4_ITBC1_TLIM_MASK 0x7000000U #define DSU4_ITBC1_TLIM_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0x7U ) -#define DSU4_ITBC1_TLIM( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & DSU4_ITBC1_TLIM_MASK ) >> DSU4_ITBC1_TLIM_SHIFT ) +#define DSU4_ITBC1_TLIM( _val ) \ + ( ( _val ) << DSU4_ITBC1_TLIM_SHIFT ) #define DSU4_ITBC1_TOV 0x800000U diff --git a/bsps/include/grlib/ftmctrl-regs.h b/bsps/include/grlib/ftmctrl-regs.h index afc5620274..ee46602c57 100644 --- a/bsps/include/grlib/ftmctrl-regs.h +++ b/bsps/include/grlib/ftmctrl-regs.h @@ -89,8 +89,9 @@ extern "C" { #define FTMCTRL_MCFG1_IOBUSW_SHIFT 27 #define FTMCTRL_MCFG1_IOBUSW_MASK 0x18000000U #define FTMCTRL_MCFG1_IOBUSW_GET( _reg ) \ - ( ( ( _reg ) >> 27 ) & 0x3U ) -#define FTMCTRL_MCFG1_IOBUSW( _val ) ( ( _val ) << 27 ) + ( ( ( _reg ) & FTMCTRL_MCFG1_IOBUSW_MASK ) >> FTMCTRL_MCFG1_IOBUSW_SHIFT ) +#define FTMCTRL_MCFG1_IOBUSW( _val ) \ + ( ( _val ) << FTMCTRL_MCFG1_IOBUSW_SHIFT ) #define FTMCTRL_MCFG1_IBRDY 0x4000000U @@ -99,8 +100,9 @@ extern "C" { #define FTMCTRL_MCFG1_IO_WAITSTATES_SHIFT 20 #define FTMCTRL_MCFG1_IO_WAITSTATES_MASK 0xf00000U #define FTMCTRL_MCFG1_IO_WAITSTATES_GET( _reg ) \ - ( ( ( _reg ) >> 20 ) & 0xfU ) -#define FTMCTRL_MCFG1_IO_WAITSTATES( _val ) ( ( _val ) << 20 ) + ( ( ( _reg ) & FTMCTRL_MCFG1_IO_WAITSTATES_MASK ) >> FTMCTRL_MCFG1_IO_WAITSTATES_SHIFT ) +#define FTMCTRL_MCFG1_IO_WAITSTATES( _val ) \ + ( ( _val ) << FTMCTRL_MCFG1_IO_WAITSTATES_SHIFT ) #define FTMCTRL_MCFG1_IOEN 0x80000U @@ -109,28 +111,32 @@ extern "C" { #define FTMCTRL_MCFG1_ROMBANKSZ_SHIFT 14 #define FTMCTRL_MCFG1_ROMBANKSZ_MASK 0x3c000U #define FTMCTRL_MCFG1_ROMBANKSZ_GET( _reg ) \ - ( ( ( _reg ) >> 14 ) & 0xfU ) -#define FTMCTRL_MCFG1_ROMBANKSZ( _val ) ( ( _val ) << 14 ) + ( ( ( _reg ) & FTMCTRL_MCFG1_ROMBANKSZ_MASK ) >> FTMCTRL_MCFG1_ROMBANKSZ_SHIFT ) +#define FTMCTRL_MCFG1_ROMBANKSZ( _val ) \ + ( ( _val ) << FTMCTRL_MCFG1_ROMBANKSZ_SHIFT ) #define FTMCTRL_MCFG1_PWEN 0x800U #define FTMCTRL_MCFG1_PROM_WIDTH_SHIFT 8 #define FTMCTRL_MCFG1_PROM_WIDTH_MASK 0x300U #define FTMCTRL_MCFG1_PROM_WIDTH_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0x3U ) -#define FTMCTRL_MCFG1_PROM_WIDTH( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & FTMCTRL_MCFG1_PROM_WIDTH_MASK ) >> FTMCTRL_MCFG1_PROM_WIDTH_SHIFT ) +#define FTMCTRL_MCFG1_PROM_WIDTH( _val ) \ + ( ( _val ) << FTMCTRL_MCFG1_PROM_WIDTH_SHIFT ) #define FTMCTRL_MCFG1_PROM_WRITE_WS_SHIFT 4 #define FTMCTRL_MCFG1_PROM_WRITE_WS_MASK 0xf0U #define FTMCTRL_MCFG1_PROM_WRITE_WS_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xfU ) -#define FTMCTRL_MCFG1_PROM_WRITE_WS( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & FTMCTRL_MCFG1_PROM_WRITE_WS_MASK ) >> FTMCTRL_MCFG1_PROM_WRITE_WS_SHIFT ) +#define FTMCTRL_MCFG1_PROM_WRITE_WS( _val ) \ + ( ( _val ) << FTMCTRL_MCFG1_PROM_WRITE_WS_SHIFT ) #define FTMCTRL_MCFG1_PROM_READ_WS_SHIFT 0 #define FTMCTRL_MCFG1_PROM_READ_WS_MASK 0xfU #define FTMCTRL_MCFG1_PROM_READ_WS_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfU ) -#define FTMCTRL_MCFG1_PROM_READ_WS( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & FTMCTRL_MCFG1_PROM_READ_WS_MASK ) >> FTMCTRL_MCFG1_PROM_READ_WS_SHIFT ) +#define FTMCTRL_MCFG1_PROM_READ_WS( _val ) \ + ( ( _val ) << FTMCTRL_MCFG1_PROM_READ_WS_SHIFT ) /** @} */ @@ -154,8 +160,9 @@ extern "C" { #define FTMCTRL_MCFG3_TCB_SHIFT 0 #define FTMCTRL_MCFG3_TCB_MASK 0xffU #define FTMCTRL_MCFG3_TCB_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define FTMCTRL_MCFG3_TCB( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & FTMCTRL_MCFG3_TCB_MASK ) >> FTMCTRL_MCFG3_TCB_SHIFT ) +#define FTMCTRL_MCFG3_TCB( _val ) \ + ( ( _val ) << FTMCTRL_MCFG3_TCB_SHIFT ) /** @} */ @@ -171,14 +178,16 @@ extern "C" { #define FTMCTRL_MCFG5_IOHWS_SHIFT 23 #define FTMCTRL_MCFG5_IOHWS_MASK 0x3f800000U #define FTMCTRL_MCFG5_IOHWS_GET( _reg ) \ - ( ( ( _reg ) >> 23 ) & 0x7fU ) -#define FTMCTRL_MCFG5_IOHWS( _val ) ( ( _val ) << 23 ) + ( ( ( _reg ) & FTMCTRL_MCFG5_IOHWS_MASK ) >> FTMCTRL_MCFG5_IOHWS_SHIFT ) +#define FTMCTRL_MCFG5_IOHWS( _val ) \ + ( ( _val ) << FTMCTRL_MCFG5_IOHWS_SHIFT ) #define FTMCTRL_MCFG5_ROMHWS_SHIFT 7 #define FTMCTRL_MCFG5_ROMHWS_MASK 0x3f80U #define FTMCTRL_MCFG5_ROMHWS_GET( _reg ) \ - ( ( ( _reg ) >> 7 ) & 0x7fU ) -#define FTMCTRL_MCFG5_ROMHWS( _val ) ( ( _val ) << 7 ) + ( ( ( _reg ) & FTMCTRL_MCFG5_ROMHWS_MASK ) >> FTMCTRL_MCFG5_ROMHWS_SHIFT ) +#define FTMCTRL_MCFG5_ROMHWS( _val ) \ + ( ( _val ) << FTMCTRL_MCFG5_ROMHWS_SHIFT ) /** @} */ @@ -194,14 +203,16 @@ extern "C" { #define FTMCTRL_MCFG7_BRDYNCNT_SHIFT 16 #define FTMCTRL_MCFG7_BRDYNCNT_MASK 0xffff0000U #define FTMCTRL_MCFG7_BRDYNCNT_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define FTMCTRL_MCFG7_BRDYNCNT( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & FTMCTRL_MCFG7_BRDYNCNT_MASK ) >> FTMCTRL_MCFG7_BRDYNCNT_SHIFT ) +#define FTMCTRL_MCFG7_BRDYNCNT( _val ) \ + ( ( _val ) << FTMCTRL_MCFG7_BRDYNCNT_SHIFT ) #define FTMCTRL_MCFG7_BRDYNRLD_SHIFT 0 #define FTMCTRL_MCFG7_BRDYNRLD_MASK 0xffffU #define FTMCTRL_MCFG7_BRDYNRLD_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define FTMCTRL_MCFG7_BRDYNRLD( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & FTMCTRL_MCFG7_BRDYNRLD_MASK ) >> FTMCTRL_MCFG7_BRDYNRLD_SHIFT ) +#define FTMCTRL_MCFG7_BRDYNRLD( _val ) \ + ( ( _val ) << FTMCTRL_MCFG7_BRDYNRLD_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/gptimer-regs.h b/bsps/include/grlib/gptimer-regs.h index d0d0001f80..a924121cd8 100644 --- a/bsps/include/grlib/gptimer-regs.h +++ b/bsps/include/grlib/gptimer-regs.h @@ -95,8 +95,9 @@ extern "C" { #define GPTIMER_TCNTVAL_TCVAL_SHIFT 0 #define GPTIMER_TCNTVAL_TCVAL_MASK 0xffffffffU #define GPTIMER_TCNTVAL_TCVAL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GPTIMER_TCNTVAL_TCVAL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GPTIMER_TCNTVAL_TCVAL_MASK ) >> GPTIMER_TCNTVAL_TCVAL_SHIFT ) +#define GPTIMER_TCNTVAL_TCVAL( _val ) \ + ( ( _val ) << GPTIMER_TCNTVAL_TCVAL_SHIFT ) /** @} */ @@ -112,8 +113,9 @@ extern "C" { #define GPTIMER_TRLDVAL_TRLDVAL_SHIFT 0 #define GPTIMER_TRLDVAL_TRLDVAL_MASK 0xffffffffU #define GPTIMER_TRLDVAL_TRLDVAL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GPTIMER_TRLDVAL_TRLDVAL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GPTIMER_TRLDVAL_TRLDVAL_MASK ) >> GPTIMER_TRLDVAL_TRLDVAL_SHIFT ) +#define GPTIMER_TRLDVAL_TRLDVAL( _val ) \ + ( ( _val ) << GPTIMER_TRLDVAL_TRLDVAL_SHIFT ) /** @} */ @@ -156,8 +158,9 @@ extern "C" { #define GPTIMER_TLATCH_LTCV_SHIFT 0 #define GPTIMER_TLATCH_LTCV_MASK 0xffffffffU #define GPTIMER_TLATCH_LTCV_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GPTIMER_TLATCH_LTCV( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GPTIMER_TLATCH_LTCV_MASK ) >> GPTIMER_TLATCH_LTCV_SHIFT ) +#define GPTIMER_TLATCH_LTCV( _val ) \ + ( ( _val ) << GPTIMER_TLATCH_LTCV_SHIFT ) /** @} */ @@ -211,8 +214,9 @@ typedef struct gptimer_timer { #define GPTIMER_SCALER_SCALER_SHIFT 0 #define GPTIMER_SCALER_SCALER_MASK 0xffffU #define GPTIMER_SCALER_SCALER_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define GPTIMER_SCALER_SCALER( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GPTIMER_SCALER_SCALER_MASK ) >> GPTIMER_SCALER_SCALER_SHIFT ) +#define GPTIMER_SCALER_SCALER( _val ) \ + ( ( _val ) << GPTIMER_SCALER_SCALER_SHIFT ) /** @} */ @@ -228,8 +232,9 @@ typedef struct gptimer_timer { #define GPTIMER_SRELOAD_SRELOAD_SHIFT 0 #define GPTIMER_SRELOAD_SRELOAD_MASK 0xffffU #define GPTIMER_SRELOAD_SRELOAD_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define GPTIMER_SRELOAD_SRELOAD( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GPTIMER_SRELOAD_SRELOAD_MASK ) >> GPTIMER_SRELOAD_SRELOAD_SHIFT ) +#define GPTIMER_SRELOAD_SRELOAD( _val ) \ + ( ( _val ) << GPTIMER_SRELOAD_SRELOAD_SHIFT ) /** @} */ @@ -256,14 +261,16 @@ typedef struct gptimer_timer { #define GPTIMER_CONFIG_IRQ_SHIFT 3 #define GPTIMER_CONFIG_IRQ_MASK 0xf8U #define GPTIMER_CONFIG_IRQ_GET( _reg ) \ - ( ( ( _reg ) >> 3 ) & 0x1fU ) -#define GPTIMER_CONFIG_IRQ( _val ) ( ( _val ) << 3 ) + ( ( ( _reg ) & GPTIMER_CONFIG_IRQ_MASK ) >> GPTIMER_CONFIG_IRQ_SHIFT ) +#define GPTIMER_CONFIG_IRQ( _val ) \ + ( ( _val ) << GPTIMER_CONFIG_IRQ_SHIFT ) #define GPTIMER_CONFIG_TIMERS_SHIFT 0 #define GPTIMER_CONFIG_TIMERS_MASK 0x7U #define GPTIMER_CONFIG_TIMERS_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7U ) -#define GPTIMER_CONFIG_TIMERS( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GPTIMER_CONFIG_TIMERS_MASK ) >> GPTIMER_CONFIG_TIMERS_SHIFT ) +#define GPTIMER_CONFIG_TIMERS( _val ) \ + ( ( _val ) << GPTIMER_CONFIG_TIMERS_SHIFT ) /** @} */ @@ -279,8 +286,9 @@ typedef struct gptimer_timer { #define GPTIMER_LATCHCFG_LATCHSEL_SHIFT 0 #define GPTIMER_LATCHCFG_LATCHSEL_MASK 0xffffffffU #define GPTIMER_LATCHCFG_LATCHSEL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GPTIMER_LATCHCFG_LATCHSEL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GPTIMER_LATCHCFG_LATCHSEL_MASK ) >> GPTIMER_LATCHCFG_LATCHSEL_SHIFT ) +#define GPTIMER_LATCHCFG_LATCHSEL( _val ) \ + ( ( _val ) << GPTIMER_LATCHCFG_LATCHSEL_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/gr1553b-regs.h b/bsps/include/grlib/gr1553b-regs.h index d045acd5bd..bb702b180e 100644 --- a/bsps/include/grlib/gr1553b-regs.h +++ b/bsps/include/grlib/gr1553b-regs.h @@ -142,16 +142,18 @@ extern "C" { #define GR1553B_HC_ENDIAN_SHIFT 9 #define GR1553B_HC_ENDIAN_MASK 0x600U #define GR1553B_HC_ENDIAN_GET( _reg ) \ - ( ( ( _reg ) >> 9 ) & 0x3U ) -#define GR1553B_HC_ENDIAN( _val ) ( ( _val ) << 9 ) + ( ( ( _reg ) & GR1553B_HC_ENDIAN_MASK ) >> GR1553B_HC_ENDIAN_SHIFT ) +#define GR1553B_HC_ENDIAN( _val ) \ + ( ( _val ) << GR1553B_HC_ENDIAN_SHIFT ) #define GR1553B_HC_SCLK 0x100U #define GR1553B_HC_CCFREQ_SHIFT 0 #define GR1553B_HC_CCFREQ_MASK 0xffU #define GR1553B_HC_CCFREQ_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define GR1553B_HC_CCFREQ( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_HC_CCFREQ_MASK ) >> GR1553B_HC_CCFREQ_SHIFT ) +#define GR1553B_HC_CCFREQ( _val ) \ + ( ( _val ) << GR1553B_HC_CCFREQ_SHIFT ) /** @} */ @@ -169,34 +171,39 @@ extern "C" { #define GR1553B_BCSC_BCFEAT_SHIFT 28 #define GR1553B_BCSC_BCFEAT_MASK 0x70000000U #define GR1553B_BCSC_BCFEAT_GET( _reg ) \ - ( ( ( _reg ) >> 28 ) & 0x7U ) -#define GR1553B_BCSC_BCFEAT( _val ) ( ( _val ) << 28 ) + ( ( ( _reg ) & GR1553B_BCSC_BCFEAT_MASK ) >> GR1553B_BCSC_BCFEAT_SHIFT ) +#define GR1553B_BCSC_BCFEAT( _val ) \ + ( ( _val ) << GR1553B_BCSC_BCFEAT_SHIFT ) #define GR1553B_BCSC_BCCHK 0x10000U #define GR1553B_BCSC_ASADL_SHIFT 11 #define GR1553B_BCSC_ASADL_MASK 0xf800U #define GR1553B_BCSC_ASADL_GET( _reg ) \ - ( ( ( _reg ) >> 11 ) & 0x1fU ) -#define GR1553B_BCSC_ASADL( _val ) ( ( _val ) << 11 ) + ( ( ( _reg ) & GR1553B_BCSC_ASADL_MASK ) >> GR1553B_BCSC_ASADL_SHIFT ) +#define GR1553B_BCSC_ASADL( _val ) \ + ( ( _val ) << GR1553B_BCSC_ASADL_SHIFT ) #define GR1553B_BCSC_ASST_SHIFT 8 #define GR1553B_BCSC_ASST_MASK 0x300U #define GR1553B_BCSC_ASST_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0x3U ) -#define GR1553B_BCSC_ASST( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GR1553B_BCSC_ASST_MASK ) >> GR1553B_BCSC_ASST_SHIFT ) +#define GR1553B_BCSC_ASST( _val ) \ + ( ( _val ) << GR1553B_BCSC_ASST_SHIFT ) #define GR1553B_BCSC_SCADL_SHIFT 3 #define GR1553B_BCSC_SCADL_MASK 0xf8U #define GR1553B_BCSC_SCADL_GET( _reg ) \ - ( ( ( _reg ) >> 3 ) & 0x1fU ) -#define GR1553B_BCSC_SCADL( _val ) ( ( _val ) << 3 ) + ( ( ( _reg ) & GR1553B_BCSC_SCADL_MASK ) >> GR1553B_BCSC_SCADL_SHIFT ) +#define GR1553B_BCSC_SCADL( _val ) \ + ( ( _val ) << GR1553B_BCSC_SCADL_SHIFT ) #define GR1553B_BCSC_SCST_SHIFT 0 #define GR1553B_BCSC_SCST_MASK 0x7U #define GR1553B_BCSC_SCST_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7U ) -#define GR1553B_BCSC_SCST( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_BCSC_SCST_MASK ) >> GR1553B_BCSC_SCST_SHIFT ) +#define GR1553B_BCSC_SCST( _val ) \ + ( ( _val ) << GR1553B_BCSC_SCST_SHIFT ) /** @} */ @@ -211,8 +218,9 @@ extern "C" { #define GR1553B_BCA_BCKEY_SHIFT 16 #define GR1553B_BCA_BCKEY_MASK 0xffff0000U #define GR1553B_BCA_BCKEY_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define GR1553B_BCA_BCKEY( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GR1553B_BCA_BCKEY_MASK ) >> GR1553B_BCA_BCKEY_SHIFT ) +#define GR1553B_BCA_BCKEY( _val ) \ + ( ( _val ) << GR1553B_BCA_BCKEY_SHIFT ) #define GR1553B_BCA_ASSTP 0x200U @@ -242,8 +250,9 @@ extern "C" { #define GR1553B_BCTNP_POINTER_SHIFT 0 #define GR1553B_BCTNP_POINTER_MASK 0xffffffffU #define GR1553B_BCTNP_POINTER_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GR1553B_BCTNP_POINTER( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_BCTNP_POINTER_MASK ) >> GR1553B_BCTNP_POINTER_SHIFT ) +#define GR1553B_BCTNP_POINTER( _val ) \ + ( ( _val ) << GR1553B_BCTNP_POINTER_SHIFT ) /** @} */ @@ -259,8 +268,9 @@ extern "C" { #define GR1553B_BCANP_POINTER_SHIFT 0 #define GR1553B_BCANP_POINTER_MASK 0xffffffffU #define GR1553B_BCANP_POINTER_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GR1553B_BCANP_POINTER( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_BCANP_POINTER_MASK ) >> GR1553B_BCANP_POINTER_SHIFT ) +#define GR1553B_BCANP_POINTER( _val ) \ + ( ( _val ) << GR1553B_BCANP_POINTER_SHIFT ) /** @} */ @@ -275,8 +285,9 @@ extern "C" { #define GR1553B_BCT_SCTM_SHIFT 0 #define GR1553B_BCT_SCTM_MASK 0xffffffU #define GR1553B_BCT_SCTM_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffU ) -#define GR1553B_BCT_SCTM( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_BCT_SCTM_MASK ) >> GR1553B_BCT_SCTM_SHIFT ) +#define GR1553B_BCT_SCTM( _val ) \ + ( ( _val ) << GR1553B_BCT_SCTM_SHIFT ) /** @} */ @@ -292,8 +303,9 @@ extern "C" { #define GR1553B_BCRP_POSITION_SHIFT 0 #define GR1553B_BCRP_POSITION_MASK 0xffffffffU #define GR1553B_BCRP_POSITION_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GR1553B_BCRP_POSITION( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_BCRP_POSITION_MASK ) >> GR1553B_BCRP_POSITION_SHIFT ) +#define GR1553B_BCRP_POSITION( _val ) \ + ( ( _val ) << GR1553B_BCRP_POSITION_SHIFT ) /** @} */ @@ -308,8 +320,9 @@ extern "C" { #define GR1553B_BCBS_SWAP_SHIFT 0 #define GR1553B_BCBS_SWAP_MASK 0xffffffffU #define GR1553B_BCBS_SWAP_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GR1553B_BCBS_SWAP( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_BCBS_SWAP_MASK ) >> GR1553B_BCBS_SWAP_SHIFT ) +#define GR1553B_BCBS_SWAP( _val ) \ + ( ( _val ) << GR1553B_BCBS_SWAP_SHIFT ) /** @} */ @@ -325,8 +338,9 @@ extern "C" { #define GR1553B_BCTCP_POINTER_SHIFT 0 #define GR1553B_BCTCP_POINTER_MASK 0xffffffffU #define GR1553B_BCTCP_POINTER_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GR1553B_BCTCP_POINTER( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_BCTCP_POINTER_MASK ) >> GR1553B_BCTCP_POINTER_SHIFT ) +#define GR1553B_BCTCP_POINTER( _val ) \ + ( ( _val ) << GR1553B_BCTCP_POINTER_SHIFT ) /** @} */ @@ -342,8 +356,9 @@ extern "C" { #define GR1553B_BCACP_POINTER_SHIFT 0 #define GR1553B_BCACP_POINTER_MASK 0xffffffffU #define GR1553B_BCACP_POINTER_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GR1553B_BCACP_POINTER( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_BCACP_POINTER_MASK ) >> GR1553B_BCACP_POINTER_SHIFT ) +#define GR1553B_BCACP_POINTER( _val ) \ + ( ( _val ) << GR1553B_BCACP_POINTER_SHIFT ) /** @} */ @@ -378,8 +393,9 @@ extern "C" { #define GR1553B_RTC_RTKEY_SHIFT 16 #define GR1553B_RTC_RTKEY_MASK 0xffff0000U #define GR1553B_RTC_RTKEY_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define GR1553B_RTC_RTKEY( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GR1553B_RTC_RTKEY_MASK ) >> GR1553B_RTC_RTKEY_SHIFT ) +#define GR1553B_RTC_RTKEY( _val ) \ + ( ( _val ) << GR1553B_RTC_RTKEY_SHIFT ) #define GR1553B_RTC_SYS 0x8000U @@ -392,8 +408,9 @@ extern "C" { #define GR1553B_RTC_RTADDR_SHIFT 1 #define GR1553B_RTC_RTADDR_MASK 0x3eU #define GR1553B_RTC_RTADDR_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0x1fU ) -#define GR1553B_RTC_RTADDR( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & GR1553B_RTC_RTADDR_MASK ) >> GR1553B_RTC_RTADDR_SHIFT ) +#define GR1553B_RTC_RTADDR( _val ) \ + ( ( _val ) << GR1553B_RTC_RTADDR_SHIFT ) #define GR1553B_RTC_RTEN 0x1U @@ -432,14 +449,16 @@ extern "C" { #define GR1553B_RTSW_BITW_SHIFT 16 #define GR1553B_RTSW_BITW_MASK 0xffff0000U #define GR1553B_RTSW_BITW_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define GR1553B_RTSW_BITW( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GR1553B_RTSW_BITW_MASK ) >> GR1553B_RTSW_BITW_SHIFT ) +#define GR1553B_RTSW_BITW( _val ) \ + ( ( _val ) << GR1553B_RTSW_BITW_SHIFT ) #define GR1553B_RTSW_VECW_SHIFT 0 #define GR1553B_RTSW_VECW_MASK 0xffffU #define GR1553B_RTSW_VECW_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define GR1553B_RTSW_VECW( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_RTSW_VECW_MASK ) >> GR1553B_RTSW_VECW_SHIFT ) +#define GR1553B_RTSW_VECW( _val ) \ + ( ( _val ) << GR1553B_RTSW_VECW_SHIFT ) /** @} */ @@ -454,14 +473,16 @@ extern "C" { #define GR1553B_RTSY_SYTM_SHIFT 16 #define GR1553B_RTSY_SYTM_MASK 0xffff0000U #define GR1553B_RTSY_SYTM_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define GR1553B_RTSY_SYTM( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GR1553B_RTSY_SYTM_MASK ) >> GR1553B_RTSY_SYTM_SHIFT ) +#define GR1553B_RTSY_SYTM( _val ) \ + ( ( _val ) << GR1553B_RTSY_SYTM_SHIFT ) #define GR1553B_RTSY_SYD_SHIFT 0 #define GR1553B_RTSY_SYD_MASK 0xffffU #define GR1553B_RTSY_SYD_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define GR1553B_RTSY_SYD( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_RTSY_SYD_MASK ) >> GR1553B_RTSY_SYD_SHIFT ) +#define GR1553B_RTSY_SYD( _val ) \ + ( ( _val ) << GR1553B_RTSY_SYD_SHIFT ) /** @} */ @@ -477,8 +498,9 @@ extern "C" { #define GR1553B_RTSTBA_SATB_SHIFT 9 #define GR1553B_RTSTBA_SATB_MASK 0xfffffe00U #define GR1553B_RTSTBA_SATB_GET( _reg ) \ - ( ( ( _reg ) >> 9 ) & 0x7fffffU ) -#define GR1553B_RTSTBA_SATB( _val ) ( ( _val ) << 9 ) + ( ( ( _reg ) & GR1553B_RTSTBA_SATB_MASK ) >> GR1553B_RTSTBA_SATB_SHIFT ) +#define GR1553B_RTSTBA_SATB( _val ) \ + ( ( _val ) << GR1553B_RTSTBA_SATB_SHIFT ) /** @} */ @@ -494,92 +516,107 @@ extern "C" { #define GR1553B_RTMCC_RRTB_SHIFT 28 #define GR1553B_RTMCC_RRTB_MASK 0x30000000U #define GR1553B_RTMCC_RRTB_GET( _reg ) \ - ( ( ( _reg ) >> 28 ) & 0x3U ) -#define GR1553B_RTMCC_RRTB( _val ) ( ( _val ) << 28 ) + ( ( ( _reg ) & GR1553B_RTMCC_RRTB_MASK ) >> GR1553B_RTMCC_RRTB_SHIFT ) +#define GR1553B_RTMCC_RRTB( _val ) \ + ( ( _val ) << GR1553B_RTMCC_RRTB_SHIFT ) #define GR1553B_RTMCC_RRT_SHIFT 26 #define GR1553B_RTMCC_RRT_MASK 0xc000000U #define GR1553B_RTMCC_RRT_GET( _reg ) \ - ( ( ( _reg ) >> 26 ) & 0x3U ) -#define GR1553B_RTMCC_RRT( _val ) ( ( _val ) << 26 ) + ( ( ( _reg ) & GR1553B_RTMCC_RRT_MASK ) >> GR1553B_RTMCC_RRT_SHIFT ) +#define GR1553B_RTMCC_RRT( _val ) \ + ( ( _val ) << GR1553B_RTMCC_RRT_SHIFT ) #define GR1553B_RTMCC_ITFB_SHIFT 24 #define GR1553B_RTMCC_ITFB_MASK 0x3000000U #define GR1553B_RTMCC_ITFB_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0x3U ) -#define GR1553B_RTMCC_ITFB( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & GR1553B_RTMCC_ITFB_MASK ) >> GR1553B_RTMCC_ITFB_SHIFT ) +#define GR1553B_RTMCC_ITFB( _val ) \ + ( ( _val ) << GR1553B_RTMCC_ITFB_SHIFT ) #define GR1553B_RTMCC_ITF_SHIFT 22 #define GR1553B_RTMCC_ITF_MASK 0xc00000U #define GR1553B_RTMCC_ITF_GET( _reg ) \ - ( ( ( _reg ) >> 22 ) & 0x3U ) -#define GR1553B_RTMCC_ITF( _val ) ( ( _val ) << 22 ) + ( ( ( _reg ) & GR1553B_RTMCC_ITF_MASK ) >> GR1553B_RTMCC_ITF_SHIFT ) +#define GR1553B_RTMCC_ITF( _val ) \ + ( ( _val ) << GR1553B_RTMCC_ITF_SHIFT ) #define GR1553B_RTMCC_ISTB_SHIFT 20 #define GR1553B_RTMCC_ISTB_MASK 0x300000U #define GR1553B_RTMCC_ISTB_GET( _reg ) \ - ( ( ( _reg ) >> 20 ) & 0x3U ) -#define GR1553B_RTMCC_ISTB( _val ) ( ( _val ) << 20 ) + ( ( ( _reg ) & GR1553B_RTMCC_ISTB_MASK ) >> GR1553B_RTMCC_ISTB_SHIFT ) +#define GR1553B_RTMCC_ISTB( _val ) \ + ( ( _val ) << GR1553B_RTMCC_ISTB_SHIFT ) #define GR1553B_RTMCC_IST_SHIFT 18 #define GR1553B_RTMCC_IST_MASK 0xc0000U #define GR1553B_RTMCC_IST_GET( _reg ) \ - ( ( ( _reg ) >> 18 ) & 0x3U ) -#define GR1553B_RTMCC_IST( _val ) ( ( _val ) << 18 ) + ( ( ( _reg ) & GR1553B_RTMCC_IST_MASK ) >> GR1553B_RTMCC_IST_SHIFT ) +#define GR1553B_RTMCC_IST( _val ) \ + ( ( _val ) << GR1553B_RTMCC_IST_SHIFT ) #define GR1553B_RTMCC_DBC_SHIFT 16 #define GR1553B_RTMCC_DBC_MASK 0x30000U #define GR1553B_RTMCC_DBC_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x3U ) -#define GR1553B_RTMCC_DBC( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GR1553B_RTMCC_DBC_MASK ) >> GR1553B_RTMCC_DBC_SHIFT ) +#define GR1553B_RTMCC_DBC( _val ) \ + ( ( _val ) << GR1553B_RTMCC_DBC_SHIFT ) #define GR1553B_RTMCC_TBW_SHIFT 14 #define GR1553B_RTMCC_TBW_MASK 0xc000U #define GR1553B_RTMCC_TBW_GET( _reg ) \ - ( ( ( _reg ) >> 14 ) & 0x3U ) -#define GR1553B_RTMCC_TBW( _val ) ( ( _val ) << 14 ) + ( ( ( _reg ) & GR1553B_RTMCC_TBW_MASK ) >> GR1553B_RTMCC_TBW_SHIFT ) +#define GR1553B_RTMCC_TBW( _val ) \ + ( ( _val ) << GR1553B_RTMCC_TBW_SHIFT ) #define GR1553B_RTMCC_TVW_SHIFT 12 #define GR1553B_RTMCC_TVW_MASK 0x3000U #define GR1553B_RTMCC_TVW_GET( _reg ) \ - ( ( ( _reg ) >> 12 ) & 0x3U ) -#define GR1553B_RTMCC_TVW( _val ) ( ( _val ) << 12 ) + ( ( ( _reg ) & GR1553B_RTMCC_TVW_MASK ) >> GR1553B_RTMCC_TVW_SHIFT ) +#define GR1553B_RTMCC_TVW( _val ) \ + ( ( _val ) << GR1553B_RTMCC_TVW_SHIFT ) #define GR1553B_RTMCC_TSB_SHIFT 10 #define GR1553B_RTMCC_TSB_MASK 0xc00U #define GR1553B_RTMCC_TSB_GET( _reg ) \ - ( ( ( _reg ) >> 10 ) & 0x3U ) -#define GR1553B_RTMCC_TSB( _val ) ( ( _val ) << 10 ) + ( ( ( _reg ) & GR1553B_RTMCC_TSB_MASK ) >> GR1553B_RTMCC_TSB_SHIFT ) +#define GR1553B_RTMCC_TSB( _val ) \ + ( ( _val ) << GR1553B_RTMCC_TSB_SHIFT ) #define GR1553B_RTMCC_TS_SHIFT 8 #define GR1553B_RTMCC_TS_MASK 0x300U #define GR1553B_RTMCC_TS_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0x3U ) -#define GR1553B_RTMCC_TS( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GR1553B_RTMCC_TS_MASK ) >> GR1553B_RTMCC_TS_SHIFT ) +#define GR1553B_RTMCC_TS( _val ) \ + ( ( _val ) << GR1553B_RTMCC_TS_SHIFT ) #define GR1553B_RTMCC_SDB_SHIFT 6 #define GR1553B_RTMCC_SDB_MASK 0xc0U #define GR1553B_RTMCC_SDB_GET( _reg ) \ - ( ( ( _reg ) >> 6 ) & 0x3U ) -#define GR1553B_RTMCC_SDB( _val ) ( ( _val ) << 6 ) + ( ( ( _reg ) & GR1553B_RTMCC_SDB_MASK ) >> GR1553B_RTMCC_SDB_SHIFT ) +#define GR1553B_RTMCC_SDB( _val ) \ + ( ( _val ) << GR1553B_RTMCC_SDB_SHIFT ) #define GR1553B_RTMCC_SD_SHIFT 4 #define GR1553B_RTMCC_SD_MASK 0x30U #define GR1553B_RTMCC_SD_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0x3U ) -#define GR1553B_RTMCC_SD( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GR1553B_RTMCC_SD_MASK ) >> GR1553B_RTMCC_SD_SHIFT ) +#define GR1553B_RTMCC_SD( _val ) \ + ( ( _val ) << GR1553B_RTMCC_SD_SHIFT ) #define GR1553B_RTMCC_SB_SHIFT 2 #define GR1553B_RTMCC_SB_MASK 0xcU #define GR1553B_RTMCC_SB_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x3U ) -#define GR1553B_RTMCC_SB( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & GR1553B_RTMCC_SB_MASK ) >> GR1553B_RTMCC_SB_SHIFT ) +#define GR1553B_RTMCC_SB( _val ) \ + ( ( _val ) << GR1553B_RTMCC_SB_SHIFT ) #define GR1553B_RTMCC_S_SHIFT 0 #define GR1553B_RTMCC_S_MASK 0x3U #define GR1553B_RTMCC_S_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3U ) -#define GR1553B_RTMCC_S( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_RTMCC_S_MASK ) >> GR1553B_RTMCC_S_SHIFT ) +#define GR1553B_RTMCC_S( _val ) \ + ( ( _val ) << GR1553B_RTMCC_S_SHIFT ) /** @} */ @@ -595,14 +632,16 @@ extern "C" { #define GR1553B_RTTTC_TRES_SHIFT 16 #define GR1553B_RTTTC_TRES_MASK 0xffff0000U #define GR1553B_RTTTC_TRES_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define GR1553B_RTTTC_TRES( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GR1553B_RTTTC_TRES_MASK ) >> GR1553B_RTTTC_TRES_SHIFT ) +#define GR1553B_RTTTC_TRES( _val ) \ + ( ( _val ) << GR1553B_RTTTC_TRES_SHIFT ) #define GR1553B_RTTTC_TVAL_SHIFT 0 #define GR1553B_RTTTC_TVAL_MASK 0xffffU #define GR1553B_RTTTC_TVAL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define GR1553B_RTTTC_TVAL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_RTTTC_TVAL_MASK ) >> GR1553B_RTTTC_TVAL_SHIFT ) +#define GR1553B_RTTTC_TVAL( _val ) \ + ( ( _val ) << GR1553B_RTTTC_TVAL_SHIFT ) /** @} */ @@ -618,8 +657,9 @@ extern "C" { #define GR1553B_RTELM_MASK_SHIFT 0 #define GR1553B_RTELM_MASK_MASK 0xffffffffU #define GR1553B_RTELM_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GR1553B_RTELM_MASK( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_RTELM_MASK_MASK ) >> GR1553B_RTELM_MASK_SHIFT ) +#define GR1553B_RTELM_MASK( _val ) \ + ( ( _val ) << GR1553B_RTELM_MASK_SHIFT ) /** @} */ @@ -635,8 +675,9 @@ extern "C" { #define GR1553B_RTELP_POINTER_SHIFT 0 #define GR1553B_RTELP_POINTER_MASK 0xffffffffU #define GR1553B_RTELP_POINTER_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GR1553B_RTELP_POINTER( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_RTELP_POINTER_MASK ) >> GR1553B_RTELP_POINTER_SHIFT ) +#define GR1553B_RTELP_POINTER( _val ) \ + ( ( _val ) << GR1553B_RTELP_POINTER_SHIFT ) /** @} */ @@ -652,8 +693,9 @@ extern "C" { #define GR1553B_RTELIP_POINTER_SHIFT 0 #define GR1553B_RTELIP_POINTER_MASK 0xffffffffU #define GR1553B_RTELIP_POINTER_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GR1553B_RTELIP_POINTER( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_RTELIP_POINTER_MASK ) >> GR1553B_RTELIP_POINTER_SHIFT ) +#define GR1553B_RTELIP_POINTER( _val ) \ + ( ( _val ) << GR1553B_RTELIP_POINTER_SHIFT ) /** @} */ @@ -682,8 +724,9 @@ extern "C" { #define GR1553B_BMC_BMKEY_SHIFT 16 #define GR1553B_BMC_BMKEY_MASK 0xffff0000U #define GR1553B_BMC_BMKEY_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define GR1553B_BMC_BMKEY( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GR1553B_BMC_BMKEY_MASK ) >> GR1553B_BMC_BMKEY_SHIFT ) +#define GR1553B_BMC_BMKEY( _val ) \ + ( ( _val ) << GR1553B_BMC_BMKEY_SHIFT ) #define GR1553B_BMC_WRSTP 0x20U @@ -711,8 +754,9 @@ extern "C" { #define GR1553B_BMRTAF_MASK_SHIFT 0 #define GR1553B_BMRTAF_MASK_MASK 0xffffffffU #define GR1553B_BMRTAF_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GR1553B_BMRTAF_MASK( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_BMRTAF_MASK_MASK ) >> GR1553B_BMRTAF_MASK_SHIFT ) +#define GR1553B_BMRTAF_MASK( _val ) \ + ( ( _val ) << GR1553B_BMRTAF_MASK_SHIFT ) /** @} */ @@ -728,8 +772,9 @@ extern "C" { #define GR1553B_BMRTSF_MASK_SHIFT 0 #define GR1553B_BMRTSF_MASK_MASK 0xffffffffU #define GR1553B_BMRTSF_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GR1553B_BMRTSF_MASK( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_BMRTSF_MASK_MASK ) >> GR1553B_BMRTSF_MASK_SHIFT ) +#define GR1553B_BMRTSF_MASK( _val ) \ + ( ( _val ) << GR1553B_BMRTSF_MASK_SHIFT ) /** @} */ @@ -793,8 +838,9 @@ extern "C" { #define GR1553B_BMLBS_START_SHIFT 0 #define GR1553B_BMLBS_START_MASK 0xffffffffU #define GR1553B_BMLBS_START_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GR1553B_BMLBS_START( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_BMLBS_START_MASK ) >> GR1553B_BMLBS_START_SHIFT ) +#define GR1553B_BMLBS_START( _val ) \ + ( ( _val ) << GR1553B_BMLBS_START_SHIFT ) /** @} */ @@ -809,8 +855,9 @@ extern "C" { #define GR1553B_BMLBE_END_SHIFT 0 #define GR1553B_BMLBE_END_MASK 0xffffffffU #define GR1553B_BMLBE_END_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GR1553B_BMLBE_END( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_BMLBE_END_MASK ) >> GR1553B_BMLBE_END_SHIFT ) +#define GR1553B_BMLBE_END( _val ) \ + ( ( _val ) << GR1553B_BMLBE_END_SHIFT ) /** @} */ @@ -825,8 +872,9 @@ extern "C" { #define GR1553B_BMLBP_POSITION_SHIFT 0 #define GR1553B_BMLBP_POSITION_MASK 0xffffffffU #define GR1553B_BMLBP_POSITION_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GR1553B_BMLBP_POSITION( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_BMLBP_POSITION_MASK ) >> GR1553B_BMLBP_POSITION_SHIFT ) +#define GR1553B_BMLBP_POSITION( _val ) \ + ( ( _val ) << GR1553B_BMLBP_POSITION_SHIFT ) /** @} */ @@ -842,14 +890,16 @@ extern "C" { #define GR1553B_BMTTC_TRES_SHIFT 24 #define GR1553B_BMTTC_TRES_MASK 0xff000000U #define GR1553B_BMTTC_TRES_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define GR1553B_BMTTC_TRES( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & GR1553B_BMTTC_TRES_MASK ) >> GR1553B_BMTTC_TRES_SHIFT ) +#define GR1553B_BMTTC_TRES( _val ) \ + ( ( _val ) << GR1553B_BMTTC_TRES_SHIFT ) #define GR1553B_BMTTC_TVAL_SHIFT 0 #define GR1553B_BMTTC_TVAL_MASK 0xffffffU #define GR1553B_BMTTC_TVAL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffU ) -#define GR1553B_BMTTC_TVAL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR1553B_BMTTC_TVAL_MASK ) >> GR1553B_BMTTC_TVAL_SHIFT ) +#define GR1553B_BMTTC_TVAL( _val ) \ + ( ( _val ) << GR1553B_BMTTC_TVAL_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/gr740thsens-regs.h b/bsps/include/grlib/gr740thsens-regs.h index 172ea1fd02..d1100370e8 100644 --- a/bsps/include/grlib/gr740thsens-regs.h +++ b/bsps/include/grlib/gr740thsens-regs.h @@ -84,8 +84,9 @@ extern "C" { #define GR740THSENS_CTRL_DIV_SHIFT 16 #define GR740THSENS_CTRL_DIV_MASK 0x3ff0000U #define GR740THSENS_CTRL_DIV_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x3ffU ) -#define GR740THSENS_CTRL_DIV( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GR740THSENS_CTRL_DIV_MASK ) >> GR740THSENS_CTRL_DIV_SHIFT ) +#define GR740THSENS_CTRL_DIV( _val ) \ + ( ( _val ) << GR740THSENS_CTRL_DIV_SHIFT ) #define GR740THSENS_CTRL_ALEN 0x100U @@ -94,8 +95,9 @@ extern "C" { #define GR740THSENS_CTRL_DCORRECT_SHIFT 2 #define GR740THSENS_CTRL_DCORRECT_MASK 0x7cU #define GR740THSENS_CTRL_DCORRECT_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x1fU ) -#define GR740THSENS_CTRL_DCORRECT( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & GR740THSENS_CTRL_DCORRECT_MASK ) >> GR740THSENS_CTRL_DCORRECT_SHIFT ) +#define GR740THSENS_CTRL_DCORRECT( _val ) \ + ( ( _val ) << GR740THSENS_CTRL_DCORRECT_SHIFT ) #define GR740THSENS_CTRL_SRSTN 0x2U @@ -114,14 +116,16 @@ extern "C" { #define GR740THSENS_STATUS_MAX_SHIFT 24 #define GR740THSENS_STATUS_MAX_MASK 0x7f000000U #define GR740THSENS_STATUS_MAX_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0x7fU ) -#define GR740THSENS_STATUS_MAX( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & GR740THSENS_STATUS_MAX_MASK ) >> GR740THSENS_STATUS_MAX_SHIFT ) +#define GR740THSENS_STATUS_MAX( _val ) \ + ( ( _val ) << GR740THSENS_STATUS_MAX_SHIFT ) #define GR740THSENS_STATUS_MIN_SHIFT 16 #define GR740THSENS_STATUS_MIN_MASK 0x7f0000U #define GR740THSENS_STATUS_MIN_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x7fU ) -#define GR740THSENS_STATUS_MIN( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GR740THSENS_STATUS_MIN_MASK ) >> GR740THSENS_STATUS_MIN_SHIFT ) +#define GR740THSENS_STATUS_MIN( _val ) \ + ( ( _val ) << GR740THSENS_STATUS_MIN_SHIFT ) #define GR740THSENS_STATUS_SCLK 0x8000U @@ -134,8 +138,9 @@ extern "C" { #define GR740THSENS_STATUS_DATA_SHIFT 0 #define GR740THSENS_STATUS_DATA_MASK 0x7fU #define GR740THSENS_STATUS_DATA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7fU ) -#define GR740THSENS_STATUS_DATA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR740THSENS_STATUS_DATA_MASK ) >> GR740THSENS_STATUS_DATA_SHIFT ) +#define GR740THSENS_STATUS_DATA( _val ) \ + ( ( _val ) << GR740THSENS_STATUS_DATA_SHIFT ) /** @} */ @@ -150,8 +155,9 @@ extern "C" { #define GR740THSENS_THRES_THRES_SHIFT 0 #define GR740THSENS_THRES_THRES_MASK 0x7fU #define GR740THSENS_THRES_THRES_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7fU ) -#define GR740THSENS_THRES_THRES( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GR740THSENS_THRES_THRES_MASK ) >> GR740THSENS_THRES_THRES_SHIFT ) +#define GR740THSENS_THRES_THRES( _val ) \ + ( ( _val ) << GR740THSENS_THRES_THRES_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/grcan-regs.h b/bsps/include/grlib/grcan-regs.h index 85879c60c9..d1e30e5363 100644 --- a/bsps/include/grlib/grcan-regs.h +++ b/bsps/include/grlib/grcan-regs.h @@ -84,32 +84,37 @@ extern "C" { #define GRCAN_CANCONF_SCALER_SHIFT 24 #define GRCAN_CANCONF_SCALER_MASK 0xff000000U #define GRCAN_CANCONF_SCALER_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define GRCAN_CANCONF_SCALER( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & GRCAN_CANCONF_SCALER_MASK ) >> GRCAN_CANCONF_SCALER_SHIFT ) +#define GRCAN_CANCONF_SCALER( _val ) \ + ( ( _val ) << GRCAN_CANCONF_SCALER_SHIFT ) #define GRCAN_CANCONF_PS1_SHIFT 20 #define GRCAN_CANCONF_PS1_MASK 0xf00000U #define GRCAN_CANCONF_PS1_GET( _reg ) \ - ( ( ( _reg ) >> 20 ) & 0xfU ) -#define GRCAN_CANCONF_PS1( _val ) ( ( _val ) << 20 ) + ( ( ( _reg ) & GRCAN_CANCONF_PS1_MASK ) >> GRCAN_CANCONF_PS1_SHIFT ) +#define GRCAN_CANCONF_PS1( _val ) \ + ( ( _val ) << GRCAN_CANCONF_PS1_SHIFT ) #define GRCAN_CANCONF_PS2_SHIFT 16 #define GRCAN_CANCONF_PS2_MASK 0xf0000U #define GRCAN_CANCONF_PS2_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xfU ) -#define GRCAN_CANCONF_PS2( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRCAN_CANCONF_PS2_MASK ) >> GRCAN_CANCONF_PS2_SHIFT ) +#define GRCAN_CANCONF_PS2( _val ) \ + ( ( _val ) << GRCAN_CANCONF_PS2_SHIFT ) #define GRCAN_CANCONF_RSJ_SHIFT 12 #define GRCAN_CANCONF_RSJ_MASK 0x7000U #define GRCAN_CANCONF_RSJ_GET( _reg ) \ - ( ( ( _reg ) >> 12 ) & 0x7U ) -#define GRCAN_CANCONF_RSJ( _val ) ( ( _val ) << 12 ) + ( ( ( _reg ) & GRCAN_CANCONF_RSJ_MASK ) >> GRCAN_CANCONF_RSJ_SHIFT ) +#define GRCAN_CANCONF_RSJ( _val ) \ + ( ( _val ) << GRCAN_CANCONF_RSJ_SHIFT ) #define GRCAN_CANCONF_BPR_SHIFT 8 #define GRCAN_CANCONF_BPR_MASK 0x300U #define GRCAN_CANCONF_BPR_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0x3U ) -#define GRCAN_CANCONF_BPR( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRCAN_CANCONF_BPR_MASK ) >> GRCAN_CANCONF_BPR_SHIFT ) +#define GRCAN_CANCONF_BPR( _val ) \ + ( ( _val ) << GRCAN_CANCONF_BPR_SHIFT ) #define GRCAN_CANCONF_SAM 0x20U @@ -136,26 +141,30 @@ extern "C" { #define GRCAN_CANSTAT_TXCHANNELS_SHIFT 28 #define GRCAN_CANSTAT_TXCHANNELS_MASK 0xf0000000U #define GRCAN_CANSTAT_TXCHANNELS_GET( _reg ) \ - ( ( ( _reg ) >> 28 ) & 0xfU ) -#define GRCAN_CANSTAT_TXCHANNELS( _val ) ( ( _val ) << 28 ) + ( ( ( _reg ) & GRCAN_CANSTAT_TXCHANNELS_MASK ) >> GRCAN_CANSTAT_TXCHANNELS_SHIFT ) +#define GRCAN_CANSTAT_TXCHANNELS( _val ) \ + ( ( _val ) << GRCAN_CANSTAT_TXCHANNELS_SHIFT ) #define GRCAN_CANSTAT_RXCHANNELS_SHIFT 24 #define GRCAN_CANSTAT_RXCHANNELS_MASK 0xf000000U #define GRCAN_CANSTAT_RXCHANNELS_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xfU ) -#define GRCAN_CANSTAT_RXCHANNELS( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & GRCAN_CANSTAT_RXCHANNELS_MASK ) >> GRCAN_CANSTAT_RXCHANNELS_SHIFT ) +#define GRCAN_CANSTAT_RXCHANNELS( _val ) \ + ( ( _val ) << GRCAN_CANSTAT_RXCHANNELS_SHIFT ) #define GRCAN_CANSTAT_TXERRCNT_SHIFT 16 #define GRCAN_CANSTAT_TXERRCNT_MASK 0xff0000U #define GRCAN_CANSTAT_TXERRCNT_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffU ) -#define GRCAN_CANSTAT_TXERRCNT( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRCAN_CANSTAT_TXERRCNT_MASK ) >> GRCAN_CANSTAT_TXERRCNT_SHIFT ) +#define GRCAN_CANSTAT_TXERRCNT( _val ) \ + ( ( _val ) << GRCAN_CANSTAT_TXERRCNT_SHIFT ) #define GRCAN_CANSTAT_RXERRCNT_SHIFT 8 #define GRCAN_CANSTAT_RXERRCNT_MASK 0xff00U #define GRCAN_CANSTAT_RXERRCNT_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xffU ) -#define GRCAN_CANSTAT_RXERRCNT( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRCAN_CANSTAT_RXERRCNT_MASK ) >> GRCAN_CANSTAT_RXERRCNT_SHIFT ) +#define GRCAN_CANSTAT_RXERRCNT( _val ) \ + ( ( _val ) << GRCAN_CANSTAT_RXERRCNT_SHIFT ) #define GRCAN_CANSTAT_ACTIVE 0x10U @@ -194,8 +203,9 @@ extern "C" { #define GRCAN_CANMASK_MASK_SHIFT 0 #define GRCAN_CANMASK_MASK_MASK 0x1fffffffU #define GRCAN_CANMASK_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fffffffU ) -#define GRCAN_CANMASK_MASK( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRCAN_CANMASK_MASK_MASK ) >> GRCAN_CANMASK_MASK_SHIFT ) +#define GRCAN_CANMASK_MASK( _val ) \ + ( ( _val ) << GRCAN_CANMASK_MASK_SHIFT ) /** @} */ @@ -210,8 +220,9 @@ extern "C" { #define GRCAN_CANCODE_SYNC_SHIFT 0 #define GRCAN_CANCODE_SYNC_MASK 0x1fffffffU #define GRCAN_CANCODE_SYNC_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fffffffU ) -#define GRCAN_CANCODE_SYNC( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRCAN_CANCODE_SYNC_MASK ) >> GRCAN_CANCODE_SYNC_SHIFT ) +#define GRCAN_CANCODE_SYNC( _val ) \ + ( ( _val ) << GRCAN_CANCODE_SYNC_SHIFT ) /** @} */ @@ -244,8 +255,9 @@ extern "C" { #define GRCAN_CANTXADDR_ADDR_SHIFT 10 #define GRCAN_CANTXADDR_ADDR_MASK 0xfffffc00U #define GRCAN_CANTXADDR_ADDR_GET( _reg ) \ - ( ( ( _reg ) >> 10 ) & 0x3fffffU ) -#define GRCAN_CANTXADDR_ADDR( _val ) ( ( _val ) << 10 ) + ( ( ( _reg ) & GRCAN_CANTXADDR_ADDR_MASK ) >> GRCAN_CANTXADDR_ADDR_SHIFT ) +#define GRCAN_CANTXADDR_ADDR( _val ) \ + ( ( _val ) << GRCAN_CANTXADDR_ADDR_SHIFT ) /** @} */ @@ -261,8 +273,9 @@ extern "C" { #define GRCAN_CANTXSIZE_SIZE_SHIFT 6 #define GRCAN_CANTXSIZE_SIZE_MASK 0x1fffc0U #define GRCAN_CANTXSIZE_SIZE_GET( _reg ) \ - ( ( ( _reg ) >> 6 ) & 0x7fffU ) -#define GRCAN_CANTXSIZE_SIZE( _val ) ( ( _val ) << 6 ) + ( ( ( _reg ) & GRCAN_CANTXSIZE_SIZE_MASK ) >> GRCAN_CANTXSIZE_SIZE_SHIFT ) +#define GRCAN_CANTXSIZE_SIZE( _val ) \ + ( ( _val ) << GRCAN_CANTXSIZE_SIZE_SHIFT ) /** @} */ @@ -277,8 +290,9 @@ extern "C" { #define GRCAN_CANTXWR_WRITE_SHIFT 4 #define GRCAN_CANTXWR_WRITE_MASK 0xffff0U #define GRCAN_CANTXWR_WRITE_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xffffU ) -#define GRCAN_CANTXWR_WRITE( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRCAN_CANTXWR_WRITE_MASK ) >> GRCAN_CANTXWR_WRITE_SHIFT ) +#define GRCAN_CANTXWR_WRITE( _val ) \ + ( ( _val ) << GRCAN_CANTXWR_WRITE_SHIFT ) /** @} */ @@ -293,8 +307,9 @@ extern "C" { #define GRCAN_CANTXRD_READ_SHIFT 4 #define GRCAN_CANTXRD_READ_MASK 0xffff0U #define GRCAN_CANTXRD_READ_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xffffU ) -#define GRCAN_CANTXRD_READ( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRCAN_CANTXRD_READ_MASK ) >> GRCAN_CANTXRD_READ_SHIFT ) +#define GRCAN_CANTXRD_READ( _val ) \ + ( ( _val ) << GRCAN_CANTXRD_READ_SHIFT ) /** @} */ @@ -309,8 +324,9 @@ extern "C" { #define GRCAN_CANTXRD_IRQ_SHIFT 4 #define GRCAN_CANTXRD_IRQ_MASK 0xffff0U #define GRCAN_CANTXRD_IRQ_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xffffU ) -#define GRCAN_CANTXRD_IRQ( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRCAN_CANTXRD_IRQ_MASK ) >> GRCAN_CANTXRD_IRQ_SHIFT ) +#define GRCAN_CANTXRD_IRQ( _val ) \ + ( ( _val ) << GRCAN_CANTXRD_IRQ_SHIFT ) /** @} */ @@ -341,8 +357,9 @@ extern "C" { #define GRCAN_CANRXADDR_ADDR_SHIFT 10 #define GRCAN_CANRXADDR_ADDR_MASK 0xfffffc00U #define GRCAN_CANRXADDR_ADDR_GET( _reg ) \ - ( ( ( _reg ) >> 10 ) & 0x3fffffU ) -#define GRCAN_CANRXADDR_ADDR( _val ) ( ( _val ) << 10 ) + ( ( ( _reg ) & GRCAN_CANRXADDR_ADDR_MASK ) >> GRCAN_CANRXADDR_ADDR_SHIFT ) +#define GRCAN_CANRXADDR_ADDR( _val ) \ + ( ( _val ) << GRCAN_CANRXADDR_ADDR_SHIFT ) /** @} */ @@ -358,8 +375,9 @@ extern "C" { #define GRCAN_CANRXSIZE_SIZE_SHIFT 6 #define GRCAN_CANRXSIZE_SIZE_MASK 0x1fffc0U #define GRCAN_CANRXSIZE_SIZE_GET( _reg ) \ - ( ( ( _reg ) >> 6 ) & 0x7fffU ) -#define GRCAN_CANRXSIZE_SIZE( _val ) ( ( _val ) << 6 ) + ( ( ( _reg ) & GRCAN_CANRXSIZE_SIZE_MASK ) >> GRCAN_CANRXSIZE_SIZE_SHIFT ) +#define GRCAN_CANRXSIZE_SIZE( _val ) \ + ( ( _val ) << GRCAN_CANRXSIZE_SIZE_SHIFT ) /** @} */ @@ -374,8 +392,9 @@ extern "C" { #define GRCAN_CANRXWR_WRITE_SHIFT 4 #define GRCAN_CANRXWR_WRITE_MASK 0xffff0U #define GRCAN_CANRXWR_WRITE_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xffffU ) -#define GRCAN_CANRXWR_WRITE( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRCAN_CANRXWR_WRITE_MASK ) >> GRCAN_CANRXWR_WRITE_SHIFT ) +#define GRCAN_CANRXWR_WRITE( _val ) \ + ( ( _val ) << GRCAN_CANRXWR_WRITE_SHIFT ) /** @} */ @@ -390,8 +409,9 @@ extern "C" { #define GRCAN_CANRXRD_READ_SHIFT 4 #define GRCAN_CANRXRD_READ_MASK 0xffff0U #define GRCAN_CANRXRD_READ_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xffffU ) -#define GRCAN_CANRXRD_READ( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRCAN_CANRXRD_READ_MASK ) >> GRCAN_CANRXRD_READ_SHIFT ) +#define GRCAN_CANRXRD_READ( _val ) \ + ( ( _val ) << GRCAN_CANRXRD_READ_SHIFT ) /** @} */ @@ -407,8 +427,9 @@ extern "C" { #define GRCAN_CANRXIRQ_IRQ_SHIFT 4 #define GRCAN_CANRXIRQ_IRQ_MASK 0xffff0U #define GRCAN_CANRXIRQ_IRQ_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xffffU ) -#define GRCAN_CANRXIRQ_IRQ( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRCAN_CANRXIRQ_IRQ_MASK ) >> GRCAN_CANRXIRQ_IRQ_SHIFT ) +#define GRCAN_CANRXIRQ_IRQ( _val ) \ + ( ( _val ) << GRCAN_CANRXIRQ_IRQ_SHIFT ) /** @} */ @@ -424,8 +445,9 @@ extern "C" { #define GRCAN_CANRXMASK_AM_SHIFT 0 #define GRCAN_CANRXMASK_AM_MASK 0x1fffffffU #define GRCAN_CANRXMASK_AM_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fffffffU ) -#define GRCAN_CANRXMASK_AM( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRCAN_CANRXMASK_AM_MASK ) >> GRCAN_CANRXMASK_AM_SHIFT ) +#define GRCAN_CANRXMASK_AM( _val ) \ + ( ( _val ) << GRCAN_CANRXMASK_AM_SHIFT ) /** @} */ @@ -441,8 +463,9 @@ extern "C" { #define GRCAN_CANRXCODE_AC_SHIFT 0 #define GRCAN_CANRXCODE_AC_MASK 0x1fffffffU #define GRCAN_CANRXCODE_AC_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fffffffU ) -#define GRCAN_CANRXCODE_AC( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRCAN_CANRXCODE_AC_MASK ) >> GRCAN_CANRXCODE_AC_SHIFT ) +#define GRCAN_CANRXCODE_AC( _val ) \ + ( ( _val ) << GRCAN_CANRXCODE_AC_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/grclkgate-regs.h b/bsps/include/grlib/grclkgate-regs.h index cd66d6854e..d2cac13b94 100644 --- a/bsps/include/grlib/grclkgate-regs.h +++ b/bsps/include/grlib/grclkgate-regs.h @@ -84,8 +84,9 @@ extern "C" { #define GRCLKGATE_UNLOCK_UNLOCK_SHIFT 0 #define GRCLKGATE_UNLOCK_UNLOCK_MASK 0x7ffU #define GRCLKGATE_UNLOCK_UNLOCK_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7ffU ) -#define GRCLKGATE_UNLOCK_UNLOCK( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRCLKGATE_UNLOCK_UNLOCK_MASK ) >> GRCLKGATE_UNLOCK_UNLOCK_SHIFT ) +#define GRCLKGATE_UNLOCK_UNLOCK( _val ) \ + ( ( _val ) << GRCLKGATE_UNLOCK_UNLOCK_SHIFT ) /** @} */ @@ -100,8 +101,9 @@ extern "C" { #define GRCLKGATE_CLKEN_ENABLE_SHIFT 0 #define GRCLKGATE_CLKEN_ENABLE_MASK 0x7ffU #define GRCLKGATE_CLKEN_ENABLE_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7ffU ) -#define GRCLKGATE_CLKEN_ENABLE( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRCLKGATE_CLKEN_ENABLE_MASK ) >> GRCLKGATE_CLKEN_ENABLE_SHIFT ) +#define GRCLKGATE_CLKEN_ENABLE( _val ) \ + ( ( _val ) << GRCLKGATE_CLKEN_ENABLE_SHIFT ) /** @} */ @@ -116,8 +118,9 @@ extern "C" { #define GRCLKGATE_RESET_RESET_SHIFT 0 #define GRCLKGATE_RESET_RESET_MASK 0x7ffU #define GRCLKGATE_RESET_RESET_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7ffU ) -#define GRCLKGATE_RESET_RESET( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRCLKGATE_RESET_RESET_MASK ) >> GRCLKGATE_RESET_RESET_SHIFT ) +#define GRCLKGATE_RESET_RESET( _val ) \ + ( ( _val ) << GRCLKGATE_RESET_RESET_SHIFT ) /** @} */ @@ -132,14 +135,16 @@ extern "C" { #define GRCLKGATE_OVERRIDE_FOVERRIDE_SHIFT 16 #define GRCLKGATE_OVERRIDE_FOVERRIDE_MASK 0xf0000U #define GRCLKGATE_OVERRIDE_FOVERRIDE_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xfU ) -#define GRCLKGATE_OVERRIDE_FOVERRIDE( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRCLKGATE_OVERRIDE_FOVERRIDE_MASK ) >> GRCLKGATE_OVERRIDE_FOVERRIDE_SHIFT ) +#define GRCLKGATE_OVERRIDE_FOVERRIDE( _val ) \ + ( ( _val ) << GRCLKGATE_OVERRIDE_FOVERRIDE_SHIFT ) #define GRCLKGATE_OVERRIDE_OVERRIDE_SHIFT 0 #define GRCLKGATE_OVERRIDE_OVERRIDE_MASK 0xfU #define GRCLKGATE_OVERRIDE_OVERRIDE_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfU ) -#define GRCLKGATE_OVERRIDE_OVERRIDE( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRCLKGATE_OVERRIDE_OVERRIDE_MASK ) >> GRCLKGATE_OVERRIDE_OVERRIDE_SHIFT ) +#define GRCLKGATE_OVERRIDE_OVERRIDE( _val ) \ + ( ( _val ) << GRCLKGATE_OVERRIDE_OVERRIDE_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/grethgbit-regs.h b/bsps/include/grlib/grethgbit-regs.h index 1959742bc5..f008f4bf01 100644 --- a/bsps/include/grlib/grethgbit-regs.h +++ b/bsps/include/grlib/grethgbit-regs.h @@ -86,8 +86,9 @@ extern "C" { #define GRETHGBIT_CR_BS_SHIFT 28 #define GRETHGBIT_CR_BS_MASK 0x70000000U #define GRETHGBIT_CR_BS_GET( _reg ) \ - ( ( ( _reg ) >> 28 ) & 0x7U ) -#define GRETHGBIT_CR_BS( _val ) ( ( _val ) << 28 ) + ( ( ( _reg ) & GRETHGBIT_CR_BS_MASK ) >> GRETHGBIT_CR_BS_SHIFT ) +#define GRETHGBIT_CR_BS( _val ) \ + ( ( _val ) << GRETHGBIT_CR_BS_SHIFT ) #define GRETHGBIT_CR_GA 0x8000000U @@ -166,8 +167,9 @@ extern "C" { #define GRETHGBIT_MACMSB_MSB_SHIFT 0 #define GRETHGBIT_MACMSB_MSB_MASK 0xffffU #define GRETHGBIT_MACMSB_MSB_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define GRETHGBIT_MACMSB_MSB( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRETHGBIT_MACMSB_MSB_MASK ) >> GRETHGBIT_MACMSB_MSB_SHIFT ) +#define GRETHGBIT_MACMSB_MSB( _val ) \ + ( ( _val ) << GRETHGBIT_MACMSB_MSB_SHIFT ) /** @} */ @@ -182,8 +184,9 @@ extern "C" { #define GRETHGBIT_MACLSB_LSB_SHIFT 0 #define GRETHGBIT_MACLSB_LSB_MASK 0xffffffffU #define GRETHGBIT_MACLSB_LSB_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRETHGBIT_MACLSB_LSB( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRETHGBIT_MACLSB_LSB_MASK ) >> GRETHGBIT_MACLSB_LSB_SHIFT ) +#define GRETHGBIT_MACLSB_LSB( _val ) \ + ( ( _val ) << GRETHGBIT_MACLSB_LSB_SHIFT ) /** @} */ @@ -198,20 +201,23 @@ extern "C" { #define GRETHGBIT_MDIO_DATA_SHIFT 16 #define GRETHGBIT_MDIO_DATA_MASK 0xffff0000U #define GRETHGBIT_MDIO_DATA_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define GRETHGBIT_MDIO_DATA( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRETHGBIT_MDIO_DATA_MASK ) >> GRETHGBIT_MDIO_DATA_SHIFT ) +#define GRETHGBIT_MDIO_DATA( _val ) \ + ( ( _val ) << GRETHGBIT_MDIO_DATA_SHIFT ) #define GRETHGBIT_MDIO_PHYADDR_SHIFT 11 #define GRETHGBIT_MDIO_PHYADDR_MASK 0xf800U #define GRETHGBIT_MDIO_PHYADDR_GET( _reg ) \ - ( ( ( _reg ) >> 11 ) & 0x1fU ) -#define GRETHGBIT_MDIO_PHYADDR( _val ) ( ( _val ) << 11 ) + ( ( ( _reg ) & GRETHGBIT_MDIO_PHYADDR_MASK ) >> GRETHGBIT_MDIO_PHYADDR_SHIFT ) +#define GRETHGBIT_MDIO_PHYADDR( _val ) \ + ( ( _val ) << GRETHGBIT_MDIO_PHYADDR_SHIFT ) #define GRETHGBIT_MDIO_REGADDR_SHIFT 6 #define GRETHGBIT_MDIO_REGADDR_MASK 0x7c0U #define GRETHGBIT_MDIO_REGADDR_GET( _reg ) \ - ( ( ( _reg ) >> 6 ) & 0x1fU ) -#define GRETHGBIT_MDIO_REGADDR( _val ) ( ( _val ) << 6 ) + ( ( ( _reg ) & GRETHGBIT_MDIO_REGADDR_MASK ) >> GRETHGBIT_MDIO_REGADDR_SHIFT ) +#define GRETHGBIT_MDIO_REGADDR( _val ) \ + ( ( _val ) << GRETHGBIT_MDIO_REGADDR_SHIFT ) #define GRETHGBIT_MDIO_BU 0x8U @@ -235,14 +241,16 @@ extern "C" { #define GRETHGBIT_TDTBA_BASEADDR_SHIFT 10 #define GRETHGBIT_TDTBA_BASEADDR_MASK 0xfffffc00U #define GRETHGBIT_TDTBA_BASEADDR_GET( _reg ) \ - ( ( ( _reg ) >> 10 ) & 0x3fffffU ) -#define GRETHGBIT_TDTBA_BASEADDR( _val ) ( ( _val ) << 10 ) + ( ( ( _reg ) & GRETHGBIT_TDTBA_BASEADDR_MASK ) >> GRETHGBIT_TDTBA_BASEADDR_SHIFT ) +#define GRETHGBIT_TDTBA_BASEADDR( _val ) \ + ( ( _val ) << GRETHGBIT_TDTBA_BASEADDR_SHIFT ) #define GRETHGBIT_TDTBA_DESCPNT_SHIFT 3 #define GRETHGBIT_TDTBA_DESCPNT_MASK 0x3f8U #define GRETHGBIT_TDTBA_DESCPNT_GET( _reg ) \ - ( ( ( _reg ) >> 3 ) & 0x7fU ) -#define GRETHGBIT_TDTBA_DESCPNT( _val ) ( ( _val ) << 3 ) + ( ( ( _reg ) & GRETHGBIT_TDTBA_DESCPNT_MASK ) >> GRETHGBIT_TDTBA_DESCPNT_SHIFT ) +#define GRETHGBIT_TDTBA_DESCPNT( _val ) \ + ( ( _val ) << GRETHGBIT_TDTBA_DESCPNT_SHIFT ) /** @} */ @@ -258,14 +266,16 @@ extern "C" { #define GRETHGBIT_RDTBA_BASEADDR_SHIFT 10 #define GRETHGBIT_RDTBA_BASEADDR_MASK 0xfffffc00U #define GRETHGBIT_RDTBA_BASEADDR_GET( _reg ) \ - ( ( ( _reg ) >> 10 ) & 0x3fffffU ) -#define GRETHGBIT_RDTBA_BASEADDR( _val ) ( ( _val ) << 10 ) + ( ( ( _reg ) & GRETHGBIT_RDTBA_BASEADDR_MASK ) >> GRETHGBIT_RDTBA_BASEADDR_SHIFT ) +#define GRETHGBIT_RDTBA_BASEADDR( _val ) \ + ( ( _val ) << GRETHGBIT_RDTBA_BASEADDR_SHIFT ) #define GRETHGBIT_RDTBA_DESCPNT_SHIFT 3 #define GRETHGBIT_RDTBA_DESCPNT_MASK 0x3f8U #define GRETHGBIT_RDTBA_DESCPNT_GET( _reg ) \ - ( ( ( _reg ) >> 3 ) & 0x7fU ) -#define GRETHGBIT_RDTBA_DESCPNT( _val ) ( ( _val ) << 3 ) + ( ( ( _reg ) & GRETHGBIT_RDTBA_DESCPNT_MASK ) >> GRETHGBIT_RDTBA_DESCPNT_SHIFT ) +#define GRETHGBIT_RDTBA_DESCPNT( _val ) \ + ( ( _val ) << GRETHGBIT_RDTBA_DESCPNT_SHIFT ) /** @} */ @@ -280,8 +290,9 @@ extern "C" { #define GRETHGBIT_EDCLMACMSB_MSB_SHIFT 0 #define GRETHGBIT_EDCLMACMSB_MSB_MASK 0xffffU #define GRETHGBIT_EDCLMACMSB_MSB_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define GRETHGBIT_EDCLMACMSB_MSB( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRETHGBIT_EDCLMACMSB_MSB_MASK ) >> GRETHGBIT_EDCLMACMSB_MSB_SHIFT ) +#define GRETHGBIT_EDCLMACMSB_MSB( _val ) \ + ( ( _val ) << GRETHGBIT_EDCLMACMSB_MSB_SHIFT ) /** @} */ @@ -296,8 +307,9 @@ extern "C" { #define GRETHGBIT_EDCLMACLSB_LSB_SHIFT 0 #define GRETHGBIT_EDCLMACLSB_LSB_MASK 0xffffffffU #define GRETHGBIT_EDCLMACLSB_LSB_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRETHGBIT_EDCLMACLSB_LSB( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRETHGBIT_EDCLMACLSB_LSB_MASK ) >> GRETHGBIT_EDCLMACLSB_LSB_SHIFT ) +#define GRETHGBIT_EDCLMACLSB_LSB( _val ) \ + ( ( _val ) << GRETHGBIT_EDCLMACLSB_LSB_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/grgpio-regs.h b/bsps/include/grlib/grgpio-regs.h index f2836adb5b..1b8c98da4a 100644 --- a/bsps/include/grlib/grgpio-regs.h +++ b/bsps/include/grlib/grgpio-regs.h @@ -84,8 +84,9 @@ extern "C" { #define GRGPIO_DATA_DATA_SHIFT 0 #define GRGPIO_DATA_DATA_MASK 0xffffffffU #define GRGPIO_DATA_DATA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRGPIO_DATA_DATA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_DATA_DATA_MASK ) >> GRGPIO_DATA_DATA_SHIFT ) +#define GRGPIO_DATA_DATA( _val ) \ + ( ( _val ) << GRGPIO_DATA_DATA_SHIFT ) /** @} */ @@ -100,8 +101,9 @@ extern "C" { #define GRGPIO_OUTPUT_DATA_SHIFT 0 #define GRGPIO_OUTPUT_DATA_MASK 0xffffffffU #define GRGPIO_OUTPUT_DATA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRGPIO_OUTPUT_DATA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_OUTPUT_DATA_MASK ) >> GRGPIO_OUTPUT_DATA_SHIFT ) +#define GRGPIO_OUTPUT_DATA( _val ) \ + ( ( _val ) << GRGPIO_OUTPUT_DATA_SHIFT ) /** @} */ @@ -116,8 +118,9 @@ extern "C" { #define GRGPIO_DIRECTION_DIR_SHIFT 0 #define GRGPIO_DIRECTION_DIR_MASK 0xffffffffU #define GRGPIO_DIRECTION_DIR_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRGPIO_DIRECTION_DIR( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_DIRECTION_DIR_MASK ) >> GRGPIO_DIRECTION_DIR_SHIFT ) +#define GRGPIO_DIRECTION_DIR( _val ) \ + ( ( _val ) << GRGPIO_DIRECTION_DIR_SHIFT ) /** @} */ @@ -132,8 +135,9 @@ extern "C" { #define GRGPIO_IMASK_MASK_SHIFT 0 #define GRGPIO_IMASK_MASK_MASK 0xffffffffU #define GRGPIO_IMASK_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRGPIO_IMASK_MASK( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_IMASK_MASK_MASK ) >> GRGPIO_IMASK_MASK_SHIFT ) +#define GRGPIO_IMASK_MASK( _val ) \ + ( ( _val ) << GRGPIO_IMASK_MASK_SHIFT ) /** @} */ @@ -148,8 +152,9 @@ extern "C" { #define GRGPIO_IPOL_POL_SHIFT 0 #define GRGPIO_IPOL_POL_MASK 0xffffffffU #define GRGPIO_IPOL_POL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRGPIO_IPOL_POL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_IPOL_POL_MASK ) >> GRGPIO_IPOL_POL_SHIFT ) +#define GRGPIO_IPOL_POL( _val ) \ + ( ( _val ) << GRGPIO_IPOL_POL_SHIFT ) /** @} */ @@ -164,8 +169,9 @@ extern "C" { #define GRGPIO_IEDGE_EDGE_SHIFT 0 #define GRGPIO_IEDGE_EDGE_MASK 0xffffffffU #define GRGPIO_IEDGE_EDGE_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRGPIO_IEDGE_EDGE( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_IEDGE_EDGE_MASK ) >> GRGPIO_IEDGE_EDGE_SHIFT ) +#define GRGPIO_IEDGE_EDGE( _val ) \ + ( ( _val ) << GRGPIO_IEDGE_EDGE_SHIFT ) /** @} */ @@ -180,8 +186,9 @@ extern "C" { #define GRGPIO_BYPASS_BYPASS_SHIFT 0 #define GRGPIO_BYPASS_BYPASS_MASK 0xffffffffU #define GRGPIO_BYPASS_BYPASS_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRGPIO_BYPASS_BYPASS( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_BYPASS_BYPASS_MASK ) >> GRGPIO_BYPASS_BYPASS_SHIFT ) +#define GRGPIO_BYPASS_BYPASS( _val ) \ + ( ( _val ) << GRGPIO_BYPASS_BYPASS_SHIFT ) /** @} */ @@ -202,14 +209,16 @@ extern "C" { #define GRGPIO_CAP_IRQGEN_SHIFT 8 #define GRGPIO_CAP_IRQGEN_MASK 0x1f00U #define GRGPIO_CAP_IRQGEN_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0x1fU ) -#define GRGPIO_CAP_IRQGEN( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRGPIO_CAP_IRQGEN_MASK ) >> GRGPIO_CAP_IRQGEN_SHIFT ) +#define GRGPIO_CAP_IRQGEN( _val ) \ + ( ( _val ) << GRGPIO_CAP_IRQGEN_SHIFT ) #define GRGPIO_CAP_NLINES_SHIFT 0 #define GRGPIO_CAP_NLINES_MASK 0x1fU #define GRGPIO_CAP_NLINES_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fU ) -#define GRGPIO_CAP_NLINES( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_CAP_NLINES_MASK ) >> GRGPIO_CAP_NLINES_SHIFT ) +#define GRGPIO_CAP_NLINES( _val ) \ + ( ( _val ) << GRGPIO_CAP_NLINES_SHIFT ) /** @} */ @@ -225,26 +234,30 @@ extern "C" { #define GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT 24 #define GRGPIO_IRQMAPR_IRQMAP_I_0_MASK 0x1f000000U #define GRGPIO_IRQMAPR_IRQMAP_I_0_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0x1fU ) -#define GRGPIO_IRQMAPR_IRQMAP_I_0( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & GRGPIO_IRQMAPR_IRQMAP_I_0_MASK ) >> GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT ) +#define GRGPIO_IRQMAPR_IRQMAP_I_0( _val ) \ + ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT ) #define GRGPIO_IRQMAPR_IRQMAP_I_1_SHIFT 16 #define GRGPIO_IRQMAPR_IRQMAP_I_1_MASK 0x1f0000U #define GRGPIO_IRQMAPR_IRQMAP_I_1_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x1fU ) -#define GRGPIO_IRQMAPR_IRQMAP_I_1( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRGPIO_IRQMAPR_IRQMAP_I_1_MASK ) >> GRGPIO_IRQMAPR_IRQMAP_I_1_SHIFT ) +#define GRGPIO_IRQMAPR_IRQMAP_I_1( _val ) \ + ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_1_SHIFT ) #define GRGPIO_IRQMAPR_IRQMAP_I_2_SHIFT 8 #define GRGPIO_IRQMAPR_IRQMAP_I_2_MASK 0x1f00U #define GRGPIO_IRQMAPR_IRQMAP_I_2_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0x1fU ) -#define GRGPIO_IRQMAPR_IRQMAP_I_2( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRGPIO_IRQMAPR_IRQMAP_I_2_MASK ) >> GRGPIO_IRQMAPR_IRQMAP_I_2_SHIFT ) +#define GRGPIO_IRQMAPR_IRQMAP_I_2( _val ) \ + ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_2_SHIFT ) #define GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT 0 #define GRGPIO_IRQMAPR_IRQMAP_I_3_MASK 0x1fU #define GRGPIO_IRQMAPR_IRQMAP_I_3_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fU ) -#define GRGPIO_IRQMAPR_IRQMAP_I_3( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_IRQMAPR_IRQMAP_I_3_MASK ) >> GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT ) +#define GRGPIO_IRQMAPR_IRQMAP_I_3( _val ) \ + ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT ) /** @} */ @@ -259,8 +272,9 @@ extern "C" { #define GRGPIO_IAVAIL_IMASK_SHIFT 0 #define GRGPIO_IAVAIL_IMASK_MASK 0xffffffffU #define GRGPIO_IAVAIL_IMASK_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRGPIO_IAVAIL_IMASK( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_IAVAIL_IMASK_MASK ) >> GRGPIO_IAVAIL_IMASK_SHIFT ) +#define GRGPIO_IAVAIL_IMASK( _val ) \ + ( ( _val ) << GRGPIO_IAVAIL_IMASK_SHIFT ) /** @} */ @@ -275,8 +289,9 @@ extern "C" { #define GRGPIO_IFLAG_IFLAG_SHIFT 0 #define GRGPIO_IFLAG_IFLAG_MASK 0xffffffffU #define GRGPIO_IFLAG_IFLAG_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRGPIO_IFLAG_IFLAG( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_IFLAG_IFLAG_MASK ) >> GRGPIO_IFLAG_IFLAG_SHIFT ) +#define GRGPIO_IFLAG_IFLAG( _val ) \ + ( ( _val ) << GRGPIO_IFLAG_IFLAG_SHIFT ) /** @} */ @@ -291,8 +306,9 @@ extern "C" { #define GRGPIO_IPEN_IPEN_SHIFT 0 #define GRGPIO_IPEN_IPEN_MASK 0xffffffffU #define GRGPIO_IPEN_IPEN_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRGPIO_IPEN_IPEN( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_IPEN_IPEN_MASK ) >> GRGPIO_IPEN_IPEN_SHIFT ) +#define GRGPIO_IPEN_IPEN( _val ) \ + ( ( _val ) << GRGPIO_IPEN_IPEN_SHIFT ) /** @} */ @@ -307,8 +323,9 @@ extern "C" { #define GRGPIO_PULSE_PULSE_SHIFT 0 #define GRGPIO_PULSE_PULSE_MASK 0xffffffffU #define GRGPIO_PULSE_PULSE_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRGPIO_PULSE_PULSE( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_PULSE_PULSE_MASK ) >> GRGPIO_PULSE_PULSE_SHIFT ) +#define GRGPIO_PULSE_PULSE( _val ) \ + ( ( _val ) << GRGPIO_PULSE_PULSE_SHIFT ) /** @} */ @@ -323,8 +340,9 @@ extern "C" { #define GRGPIO_LOR_DATA_SHIFT 0 #define GRGPIO_LOR_DATA_MASK 0xffffffffU #define GRGPIO_LOR_DATA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRGPIO_LOR_DATA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_LOR_DATA_MASK ) >> GRGPIO_LOR_DATA_SHIFT ) +#define GRGPIO_LOR_DATA( _val ) \ + ( ( _val ) << GRGPIO_LOR_DATA_SHIFT ) /** @} */ @@ -339,8 +357,9 @@ extern "C" { #define GRGPIO_LAND_DATA_SHIFT 0 #define GRGPIO_LAND_DATA_MASK 0xffffffffU #define GRGPIO_LAND_DATA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRGPIO_LAND_DATA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_LAND_DATA_MASK ) >> GRGPIO_LAND_DATA_SHIFT ) +#define GRGPIO_LAND_DATA( _val ) \ + ( ( _val ) << GRGPIO_LAND_DATA_SHIFT ) /** @} */ @@ -355,8 +374,9 @@ extern "C" { #define GRGPIO_LXOR_DATA_SHIFT 0 #define GRGPIO_LXOR_DATA_MASK 0xffffffffU #define GRGPIO_LXOR_DATA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRGPIO_LXOR_DATA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPIO_LXOR_DATA_MASK ) >> GRGPIO_LXOR_DATA_SHIFT ) +#define GRGPIO_LXOR_DATA( _val ) \ + ( ( _val ) << GRGPIO_LXOR_DATA_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/grgprbank-regs.h b/bsps/include/grlib/grgprbank-regs.h index cd579f54a6..24611f41a3 100644 --- a/bsps/include/grlib/grgprbank-regs.h +++ b/bsps/include/grlib/grgprbank-regs.h @@ -85,8 +85,9 @@ extern "C" { #define GRGPRBANK_FTMFUNC_FTMEN_SHIFT 0 #define GRGPRBANK_FTMFUNC_FTMEN_MASK 0x3fffffU #define GRGPRBANK_FTMFUNC_FTMEN_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3fffffU ) -#define GRGPRBANK_FTMFUNC_FTMEN( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPRBANK_FTMFUNC_FTMEN_MASK ) >> GRGPRBANK_FTMFUNC_FTMEN_SHIFT ) +#define GRGPRBANK_FTMFUNC_FTMEN( _val ) \ + ( ( _val ) << GRGPRBANK_FTMFUNC_FTMEN_SHIFT ) /** @} */ @@ -102,8 +103,9 @@ extern "C" { #define GRGPRBANK_ALTFUNC_ALTEN_SHIFT 0 #define GRGPRBANK_ALTFUNC_ALTEN_MASK 0x3fffffU #define GRGPRBANK_ALTFUNC_ALTEN_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3fffffU ) -#define GRGPRBANK_ALTFUNC_ALTEN( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPRBANK_ALTFUNC_ALTEN_MASK ) >> GRGPRBANK_ALTFUNC_ALTEN_SHIFT ) +#define GRGPRBANK_ALTFUNC_ALTEN( _val ) \ + ( ( _val ) << GRGPRBANK_ALTFUNC_ALTEN_SHIFT ) /** @} */ @@ -123,8 +125,9 @@ extern "C" { #define GRGPRBANK_LVDSMCLK_SPWOE_SHIFT 0 #define GRGPRBANK_LVDSMCLK_SPWOE_MASK 0xffU #define GRGPRBANK_LVDSMCLK_SPWOE_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define GRGPRBANK_LVDSMCLK_SPWOE( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPRBANK_LVDSMCLK_SPWOE_MASK ) >> GRGPRBANK_LVDSMCLK_SPWOE_SHIFT ) +#define GRGPRBANK_LVDSMCLK_SPWOE( _val ) \ + ( ( _val ) << GRGPRBANK_LVDSMCLK_SPWOE_SHIFT ) /** @} */ @@ -140,26 +143,30 @@ extern "C" { #define GRGPRBANK_PLLNEWCFG_SWTAG_SHIFT 27 #define GRGPRBANK_PLLNEWCFG_SWTAG_MASK 0x18000000U #define GRGPRBANK_PLLNEWCFG_SWTAG_GET( _reg ) \ - ( ( ( _reg ) >> 27 ) & 0x3U ) -#define GRGPRBANK_PLLNEWCFG_SWTAG( _val ) ( ( _val ) << 27 ) + ( ( ( _reg ) & GRGPRBANK_PLLNEWCFG_SWTAG_MASK ) >> GRGPRBANK_PLLNEWCFG_SWTAG_SHIFT ) +#define GRGPRBANK_PLLNEWCFG_SWTAG( _val ) \ + ( ( _val ) << GRGPRBANK_PLLNEWCFG_SWTAG_SHIFT ) #define GRGPRBANK_PLLNEWCFG_SPWPLLCFG_SHIFT 18 #define GRGPRBANK_PLLNEWCFG_SPWPLLCFG_MASK 0x7fc0000U #define GRGPRBANK_PLLNEWCFG_SPWPLLCFG_GET( _reg ) \ - ( ( ( _reg ) >> 18 ) & 0x1ffU ) -#define GRGPRBANK_PLLNEWCFG_SPWPLLCFG( _val ) ( ( _val ) << 18 ) + ( ( ( _reg ) & GRGPRBANK_PLLNEWCFG_SPWPLLCFG_MASK ) >> GRGPRBANK_PLLNEWCFG_SPWPLLCFG_SHIFT ) +#define GRGPRBANK_PLLNEWCFG_SPWPLLCFG( _val ) \ + ( ( _val ) << GRGPRBANK_PLLNEWCFG_SPWPLLCFG_SHIFT ) #define GRGPRBANK_PLLNEWCFG_MEMPLLCFG_SHIFT 9 #define GRGPRBANK_PLLNEWCFG_MEMPLLCFG_MASK 0x3fe00U #define GRGPRBANK_PLLNEWCFG_MEMPLLCFG_GET( _reg ) \ - ( ( ( _reg ) >> 9 ) & 0x1ffU ) -#define GRGPRBANK_PLLNEWCFG_MEMPLLCFG( _val ) ( ( _val ) << 9 ) + ( ( ( _reg ) & GRGPRBANK_PLLNEWCFG_MEMPLLCFG_MASK ) >> GRGPRBANK_PLLNEWCFG_MEMPLLCFG_SHIFT ) +#define GRGPRBANK_PLLNEWCFG_MEMPLLCFG( _val ) \ + ( ( _val ) << GRGPRBANK_PLLNEWCFG_MEMPLLCFG_SHIFT ) #define GRGPRBANK_PLLNEWCFG_SYSPLLCFG_SHIFT 0 #define GRGPRBANK_PLLNEWCFG_SYSPLLCFG_MASK 0x1ffU #define GRGPRBANK_PLLNEWCFG_SYSPLLCFG_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1ffU ) -#define GRGPRBANK_PLLNEWCFG_SYSPLLCFG( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPRBANK_PLLNEWCFG_SYSPLLCFG_MASK ) >> GRGPRBANK_PLLNEWCFG_SYSPLLCFG_SHIFT ) +#define GRGPRBANK_PLLNEWCFG_SYSPLLCFG( _val ) \ + ( ( _val ) << GRGPRBANK_PLLNEWCFG_SYSPLLCFG_SHIFT ) /** @} */ @@ -175,8 +182,9 @@ extern "C" { #define GRGPRBANK_PLLRECFG_RECONF_SHIFT 0 #define GRGPRBANK_PLLRECFG_RECONF_MASK 0x7U #define GRGPRBANK_PLLRECFG_RECONF_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7U ) -#define GRGPRBANK_PLLRECFG_RECONF( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPRBANK_PLLRECFG_RECONF_MASK ) >> GRGPRBANK_PLLRECFG_RECONF_SHIFT ) +#define GRGPRBANK_PLLRECFG_RECONF( _val ) \ + ( ( _val ) << GRGPRBANK_PLLRECFG_RECONF_SHIFT ) /** @} */ @@ -192,26 +200,30 @@ extern "C" { #define GRGPRBANK_PLLCURCFG_SWTAG_SHIFT 27 #define GRGPRBANK_PLLCURCFG_SWTAG_MASK 0x18000000U #define GRGPRBANK_PLLCURCFG_SWTAG_GET( _reg ) \ - ( ( ( _reg ) >> 27 ) & 0x3U ) -#define GRGPRBANK_PLLCURCFG_SWTAG( _val ) ( ( _val ) << 27 ) + ( ( ( _reg ) & GRGPRBANK_PLLCURCFG_SWTAG_MASK ) >> GRGPRBANK_PLLCURCFG_SWTAG_SHIFT ) +#define GRGPRBANK_PLLCURCFG_SWTAG( _val ) \ + ( ( _val ) << GRGPRBANK_PLLCURCFG_SWTAG_SHIFT ) #define GRGPRBANK_PLLCURCFG_SPWPLLCFG_SHIFT 18 #define GRGPRBANK_PLLCURCFG_SPWPLLCFG_MASK 0x7fc0000U #define GRGPRBANK_PLLCURCFG_SPWPLLCFG_GET( _reg ) \ - ( ( ( _reg ) >> 18 ) & 0x1ffU ) -#define GRGPRBANK_PLLCURCFG_SPWPLLCFG( _val ) ( ( _val ) << 18 ) + ( ( ( _reg ) & GRGPRBANK_PLLCURCFG_SPWPLLCFG_MASK ) >> GRGPRBANK_PLLCURCFG_SPWPLLCFG_SHIFT ) +#define GRGPRBANK_PLLCURCFG_SPWPLLCFG( _val ) \ + ( ( _val ) << GRGPRBANK_PLLCURCFG_SPWPLLCFG_SHIFT ) #define GRGPRBANK_PLLCURCFG_MEMPLLCFG_SHIFT 9 #define GRGPRBANK_PLLCURCFG_MEMPLLCFG_MASK 0x3fe00U #define GRGPRBANK_PLLCURCFG_MEMPLLCFG_GET( _reg ) \ - ( ( ( _reg ) >> 9 ) & 0x1ffU ) -#define GRGPRBANK_PLLCURCFG_MEMPLLCFG( _val ) ( ( _val ) << 9 ) + ( ( ( _reg ) & GRGPRBANK_PLLCURCFG_MEMPLLCFG_MASK ) >> GRGPRBANK_PLLCURCFG_MEMPLLCFG_SHIFT ) +#define GRGPRBANK_PLLCURCFG_MEMPLLCFG( _val ) \ + ( ( _val ) << GRGPRBANK_PLLCURCFG_MEMPLLCFG_SHIFT ) #define GRGPRBANK_PLLCURCFG_SYSPLLCFG_SHIFT 0 #define GRGPRBANK_PLLCURCFG_SYSPLLCFG_MASK 0x1ffU #define GRGPRBANK_PLLCURCFG_SYSPLLCFG_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1ffU ) -#define GRGPRBANK_PLLCURCFG_SYSPLLCFG( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPRBANK_PLLCURCFG_SYSPLLCFG_MASK ) >> GRGPRBANK_PLLCURCFG_SYSPLLCFG_SHIFT ) +#define GRGPRBANK_PLLCURCFG_SYSPLLCFG( _val ) \ + ( ( _val ) << GRGPRBANK_PLLCURCFG_SYSPLLCFG_SHIFT ) /** @} */ @@ -227,62 +239,72 @@ extern "C" { #define GRGPRBANK_DRVSTR1_S9_SHIFT 18 #define GRGPRBANK_DRVSTR1_S9_MASK 0xc0000U #define GRGPRBANK_DRVSTR1_S9_GET( _reg ) \ - ( ( ( _reg ) >> 18 ) & 0x3U ) -#define GRGPRBANK_DRVSTR1_S9( _val ) ( ( _val ) << 18 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR1_S9_MASK ) >> GRGPRBANK_DRVSTR1_S9_SHIFT ) +#define GRGPRBANK_DRVSTR1_S9( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR1_S9_SHIFT ) #define GRGPRBANK_DRVSTR1_S8_SHIFT 16 #define GRGPRBANK_DRVSTR1_S8_MASK 0x30000U #define GRGPRBANK_DRVSTR1_S8_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x3U ) -#define GRGPRBANK_DRVSTR1_S8( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR1_S8_MASK ) >> GRGPRBANK_DRVSTR1_S8_SHIFT ) +#define GRGPRBANK_DRVSTR1_S8( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR1_S8_SHIFT ) #define GRGPRBANK_DRVSTR1_S7_SHIFT 14 #define GRGPRBANK_DRVSTR1_S7_MASK 0xc000U #define GRGPRBANK_DRVSTR1_S7_GET( _reg ) \ - ( ( ( _reg ) >> 14 ) & 0x3U ) -#define GRGPRBANK_DRVSTR1_S7( _val ) ( ( _val ) << 14 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR1_S7_MASK ) >> GRGPRBANK_DRVSTR1_S7_SHIFT ) +#define GRGPRBANK_DRVSTR1_S7( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR1_S7_SHIFT ) #define GRGPRBANK_DRVSTR1_S6_SHIFT 12 #define GRGPRBANK_DRVSTR1_S6_MASK 0x3000U #define GRGPRBANK_DRVSTR1_S6_GET( _reg ) \ - ( ( ( _reg ) >> 12 ) & 0x3U ) -#define GRGPRBANK_DRVSTR1_S6( _val ) ( ( _val ) << 12 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR1_S6_MASK ) >> GRGPRBANK_DRVSTR1_S6_SHIFT ) +#define GRGPRBANK_DRVSTR1_S6( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR1_S6_SHIFT ) #define GRGPRBANK_DRVSTR1_S5_SHIFT 10 #define GRGPRBANK_DRVSTR1_S5_MASK 0xc00U #define GRGPRBANK_DRVSTR1_S5_GET( _reg ) \ - ( ( ( _reg ) >> 10 ) & 0x3U ) -#define GRGPRBANK_DRVSTR1_S5( _val ) ( ( _val ) << 10 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR1_S5_MASK ) >> GRGPRBANK_DRVSTR1_S5_SHIFT ) +#define GRGPRBANK_DRVSTR1_S5( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR1_S5_SHIFT ) #define GRGPRBANK_DRVSTR1_S4_SHIFT 8 #define GRGPRBANK_DRVSTR1_S4_MASK 0x300U #define GRGPRBANK_DRVSTR1_S4_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0x3U ) -#define GRGPRBANK_DRVSTR1_S4( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR1_S4_MASK ) >> GRGPRBANK_DRVSTR1_S4_SHIFT ) +#define GRGPRBANK_DRVSTR1_S4( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR1_S4_SHIFT ) #define GRGPRBANK_DRVSTR1_S3_SHIFT 6 #define GRGPRBANK_DRVSTR1_S3_MASK 0xc0U #define GRGPRBANK_DRVSTR1_S3_GET( _reg ) \ - ( ( ( _reg ) >> 6 ) & 0x3U ) -#define GRGPRBANK_DRVSTR1_S3( _val ) ( ( _val ) << 6 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR1_S3_MASK ) >> GRGPRBANK_DRVSTR1_S3_SHIFT ) +#define GRGPRBANK_DRVSTR1_S3( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR1_S3_SHIFT ) #define GRGPRBANK_DRVSTR1_S2_SHIFT 4 #define GRGPRBANK_DRVSTR1_S2_MASK 0x30U #define GRGPRBANK_DRVSTR1_S2_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0x3U ) -#define GRGPRBANK_DRVSTR1_S2( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR1_S2_MASK ) >> GRGPRBANK_DRVSTR1_S2_SHIFT ) +#define GRGPRBANK_DRVSTR1_S2( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR1_S2_SHIFT ) #define GRGPRBANK_DRVSTR1_S1_SHIFT 2 #define GRGPRBANK_DRVSTR1_S1_MASK 0xcU #define GRGPRBANK_DRVSTR1_S1_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x3U ) -#define GRGPRBANK_DRVSTR1_S1( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR1_S1_MASK ) >> GRGPRBANK_DRVSTR1_S1_SHIFT ) +#define GRGPRBANK_DRVSTR1_S1( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR1_S1_SHIFT ) #define GRGPRBANK_DRVSTR1_S0_SHIFT 0 #define GRGPRBANK_DRVSTR1_S0_MASK 0x3U #define GRGPRBANK_DRVSTR1_S0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3U ) -#define GRGPRBANK_DRVSTR1_S0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR1_S0_MASK ) >> GRGPRBANK_DRVSTR1_S0_SHIFT ) +#define GRGPRBANK_DRVSTR1_S0( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR1_S0_SHIFT ) /** @} */ @@ -298,62 +320,72 @@ extern "C" { #define GRGPRBANK_DRVSTR2_S19_SHIFT 18 #define GRGPRBANK_DRVSTR2_S19_MASK 0xc0000U #define GRGPRBANK_DRVSTR2_S19_GET( _reg ) \ - ( ( ( _reg ) >> 18 ) & 0x3U ) -#define GRGPRBANK_DRVSTR2_S19( _val ) ( ( _val ) << 18 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR2_S19_MASK ) >> GRGPRBANK_DRVSTR2_S19_SHIFT ) +#define GRGPRBANK_DRVSTR2_S19( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR2_S19_SHIFT ) #define GRGPRBANK_DRVSTR2_S18_SHIFT 16 #define GRGPRBANK_DRVSTR2_S18_MASK 0x30000U #define GRGPRBANK_DRVSTR2_S18_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x3U ) -#define GRGPRBANK_DRVSTR2_S18( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR2_S18_MASK ) >> GRGPRBANK_DRVSTR2_S18_SHIFT ) +#define GRGPRBANK_DRVSTR2_S18( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR2_S18_SHIFT ) #define GRGPRBANK_DRVSTR2_S17_SHIFT 14 #define GRGPRBANK_DRVSTR2_S17_MASK 0xc000U #define GRGPRBANK_DRVSTR2_S17_GET( _reg ) \ - ( ( ( _reg ) >> 14 ) & 0x3U ) -#define GRGPRBANK_DRVSTR2_S17( _val ) ( ( _val ) << 14 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR2_S17_MASK ) >> GRGPRBANK_DRVSTR2_S17_SHIFT ) +#define GRGPRBANK_DRVSTR2_S17( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR2_S17_SHIFT ) #define GRGPRBANK_DRVSTR2_S16_SHIFT 12 #define GRGPRBANK_DRVSTR2_S16_MASK 0x3000U #define GRGPRBANK_DRVSTR2_S16_GET( _reg ) \ - ( ( ( _reg ) >> 12 ) & 0x3U ) -#define GRGPRBANK_DRVSTR2_S16( _val ) ( ( _val ) << 12 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR2_S16_MASK ) >> GRGPRBANK_DRVSTR2_S16_SHIFT ) +#define GRGPRBANK_DRVSTR2_S16( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR2_S16_SHIFT ) #define GRGPRBANK_DRVSTR2_S15_SHIFT 10 #define GRGPRBANK_DRVSTR2_S15_MASK 0xc00U #define GRGPRBANK_DRVSTR2_S15_GET( _reg ) \ - ( ( ( _reg ) >> 10 ) & 0x3U ) -#define GRGPRBANK_DRVSTR2_S15( _val ) ( ( _val ) << 10 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR2_S15_MASK ) >> GRGPRBANK_DRVSTR2_S15_SHIFT ) +#define GRGPRBANK_DRVSTR2_S15( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR2_S15_SHIFT ) #define GRGPRBANK_DRVSTR2_S14_SHIFT 8 #define GRGPRBANK_DRVSTR2_S14_MASK 0x300U #define GRGPRBANK_DRVSTR2_S14_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0x3U ) -#define GRGPRBANK_DRVSTR2_S14( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR2_S14_MASK ) >> GRGPRBANK_DRVSTR2_S14_SHIFT ) +#define GRGPRBANK_DRVSTR2_S14( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR2_S14_SHIFT ) #define GRGPRBANK_DRVSTR2_S13_SHIFT 6 #define GRGPRBANK_DRVSTR2_S13_MASK 0xc0U #define GRGPRBANK_DRVSTR2_S13_GET( _reg ) \ - ( ( ( _reg ) >> 6 ) & 0x3U ) -#define GRGPRBANK_DRVSTR2_S13( _val ) ( ( _val ) << 6 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR2_S13_MASK ) >> GRGPRBANK_DRVSTR2_S13_SHIFT ) +#define GRGPRBANK_DRVSTR2_S13( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR2_S13_SHIFT ) #define GRGPRBANK_DRVSTR2_S12_SHIFT 4 #define GRGPRBANK_DRVSTR2_S12_MASK 0x30U #define GRGPRBANK_DRVSTR2_S12_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0x3U ) -#define GRGPRBANK_DRVSTR2_S12( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR2_S12_MASK ) >> GRGPRBANK_DRVSTR2_S12_SHIFT ) +#define GRGPRBANK_DRVSTR2_S12( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR2_S12_SHIFT ) #define GRGPRBANK_DRVSTR2_S11_SHIFT 2 #define GRGPRBANK_DRVSTR2_S11_MASK 0xcU #define GRGPRBANK_DRVSTR2_S11_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x3U ) -#define GRGPRBANK_DRVSTR2_S11( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR2_S11_MASK ) >> GRGPRBANK_DRVSTR2_S11_SHIFT ) +#define GRGPRBANK_DRVSTR2_S11( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR2_S11_SHIFT ) #define GRGPRBANK_DRVSTR2_S10_SHIFT 0 #define GRGPRBANK_DRVSTR2_S10_MASK 0x3U #define GRGPRBANK_DRVSTR2_S10_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3U ) -#define GRGPRBANK_DRVSTR2_S10( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPRBANK_DRVSTR2_S10_MASK ) >> GRGPRBANK_DRVSTR2_S10_SHIFT ) +#define GRGPRBANK_DRVSTR2_S10( _val ) \ + ( ( _val ) << GRGPRBANK_DRVSTR2_S10_SHIFT ) /** @} */ @@ -369,14 +401,16 @@ extern "C" { #define GRGPRBANK_LOCKDOWN_PERMANENT_SHIFT 16 #define GRGPRBANK_LOCKDOWN_PERMANENT_MASK 0xff0000U #define GRGPRBANK_LOCKDOWN_PERMANENT_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffU ) -#define GRGPRBANK_LOCKDOWN_PERMANENT( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRGPRBANK_LOCKDOWN_PERMANENT_MASK ) >> GRGPRBANK_LOCKDOWN_PERMANENT_SHIFT ) +#define GRGPRBANK_LOCKDOWN_PERMANENT( _val ) \ + ( ( _val ) << GRGPRBANK_LOCKDOWN_PERMANENT_SHIFT ) #define GRGPRBANK_LOCKDOWN_REVOCABLE_SHIFT 0 #define GRGPRBANK_LOCKDOWN_REVOCABLE_MASK 0xffU #define GRGPRBANK_LOCKDOWN_REVOCABLE_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define GRGPRBANK_LOCKDOWN_REVOCABLE( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPRBANK_LOCKDOWN_REVOCABLE_MASK ) >> GRGPRBANK_LOCKDOWN_REVOCABLE_SHIFT ) +#define GRGPRBANK_LOCKDOWN_REVOCABLE( _val ) \ + ( ( _val ) << GRGPRBANK_LOCKDOWN_REVOCABLE_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/grgpreg-regs.h b/bsps/include/grlib/grgpreg-regs.h index 52a21559bd..eac1a6bb62 100644 --- a/bsps/include/grlib/grgpreg-regs.h +++ b/bsps/include/grlib/grgpreg-regs.h @@ -104,8 +104,9 @@ extern "C" { #define GRGPREG_BOOTSTRAP_GPIO_SHIFT 0 #define GRGPREG_BOOTSTRAP_GPIO_MASK 0xffffU #define GRGPREG_BOOTSTRAP_GPIO_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define GRGPREG_BOOTSTRAP_GPIO( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRGPREG_BOOTSTRAP_GPIO_MASK ) >> GRGPREG_BOOTSTRAP_GPIO_SHIFT ) +#define GRGPREG_BOOTSTRAP_GPIO( _val ) \ + ( ( _val ) << GRGPREG_BOOTSTRAP_GPIO_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/griommu-regs.h b/bsps/include/grlib/griommu-regs.h index b7f7334d96..d790f1a860 100644 --- a/bsps/include/grlib/griommu-regs.h +++ b/bsps/include/grlib/griommu-regs.h @@ -92,16 +92,18 @@ extern "C" { #define GRIOMMU_CAP0_NARB_SHIFT 20 #define GRIOMMU_CAP0_NARB_MASK 0xf00000U #define GRIOMMU_CAP0_NARB_GET( _reg ) \ - ( ( ( _reg ) >> 20 ) & 0xfU ) -#define GRIOMMU_CAP0_NARB( _val ) ( ( _val ) << 20 ) + ( ( ( _reg ) & GRIOMMU_CAP0_NARB_MASK ) >> GRIOMMU_CAP0_NARB_SHIFT ) +#define GRIOMMU_CAP0_NARB( _val ) \ + ( ( _val ) << GRIOMMU_CAP0_NARB_SHIFT ) #define GRIOMMU_CAP0_CS 0x80000U #define GRIOMMU_CAP0_FT_SHIFT 17 #define GRIOMMU_CAP0_FT_MASK 0x60000U #define GRIOMMU_CAP0_FT_GET( _reg ) \ - ( ( ( _reg ) >> 17 ) & 0x3U ) -#define GRIOMMU_CAP0_FT( _val ) ( ( _val ) << 17 ) + ( ( ( _reg ) & GRIOMMU_CAP0_FT_MASK ) >> GRIOMMU_CAP0_FT_SHIFT ) +#define GRIOMMU_CAP0_FT( _val ) \ + ( ( _val ) << GRIOMMU_CAP0_FT_SHIFT ) #define GRIOMMU_CAP0_ST 0x10000U @@ -118,14 +120,16 @@ extern "C" { #define GRIOMMU_CAP0_GRPS_SHIFT 4 #define GRIOMMU_CAP0_GRPS_MASK 0xf0U #define GRIOMMU_CAP0_GRPS_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xfU ) -#define GRIOMMU_CAP0_GRPS( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRIOMMU_CAP0_GRPS_MASK ) >> GRIOMMU_CAP0_GRPS_SHIFT ) +#define GRIOMMU_CAP0_GRPS( _val ) \ + ( ( _val ) << GRIOMMU_CAP0_GRPS_SHIFT ) #define GRIOMMU_CAP0_MSTS_SHIFT 0 #define GRIOMMU_CAP0_MSTS_MASK 0xfU #define GRIOMMU_CAP0_MSTS_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfU ) -#define GRIOMMU_CAP0_MSTS( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRIOMMU_CAP0_MSTS_MASK ) >> GRIOMMU_CAP0_MSTS_SHIFT ) +#define GRIOMMU_CAP0_MSTS( _val ) \ + ( ( _val ) << GRIOMMU_CAP0_MSTS_SHIFT ) /** @} */ @@ -140,32 +144,37 @@ extern "C" { #define GRIOMMU_CAP1_CADDR_SHIFT 20 #define GRIOMMU_CAP1_CADDR_MASK 0xfff00000U #define GRIOMMU_CAP1_CADDR_GET( _reg ) \ - ( ( ( _reg ) >> 20 ) & 0xfffU ) -#define GRIOMMU_CAP1_CADDR( _val ) ( ( _val ) << 20 ) + ( ( ( _reg ) & GRIOMMU_CAP1_CADDR_MASK ) >> GRIOMMU_CAP1_CADDR_SHIFT ) +#define GRIOMMU_CAP1_CADDR( _val ) \ + ( ( _val ) << GRIOMMU_CAP1_CADDR_SHIFT ) #define GRIOMMU_CAP1_CMASK_SHIFT 16 #define GRIOMMU_CAP1_CMASK_MASK 0xf0000U #define GRIOMMU_CAP1_CMASK_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xfU ) -#define GRIOMMU_CAP1_CMASK( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRIOMMU_CAP1_CMASK_MASK ) >> GRIOMMU_CAP1_CMASK_SHIFT ) +#define GRIOMMU_CAP1_CMASK( _val ) \ + ( ( _val ) << GRIOMMU_CAP1_CMASK_SHIFT ) #define GRIOMMU_CAP1_CTAGBITS_SHIFT 8 #define GRIOMMU_CAP1_CTAGBITS_MASK 0xff00U #define GRIOMMU_CAP1_CTAGBITS_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xffU ) -#define GRIOMMU_CAP1_CTAGBITS( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRIOMMU_CAP1_CTAGBITS_MASK ) >> GRIOMMU_CAP1_CTAGBITS_SHIFT ) +#define GRIOMMU_CAP1_CTAGBITS( _val ) \ + ( ( _val ) << GRIOMMU_CAP1_CTAGBITS_SHIFT ) #define GRIOMMU_CAP1_CISIZE_SHIFT 5 #define GRIOMMU_CAP1_CISIZE_MASK 0xe0U #define GRIOMMU_CAP1_CISIZE_GET( _reg ) \ - ( ( ( _reg ) >> 5 ) & 0x7U ) -#define GRIOMMU_CAP1_CISIZE( _val ) ( ( _val ) << 5 ) + ( ( ( _reg ) & GRIOMMU_CAP1_CISIZE_MASK ) >> GRIOMMU_CAP1_CISIZE_SHIFT ) +#define GRIOMMU_CAP1_CISIZE( _val ) \ + ( ( _val ) << GRIOMMU_CAP1_CISIZE_SHIFT ) #define GRIOMMU_CAP1_CLINES_SHIFT 0 #define GRIOMMU_CAP1_CLINES_MASK 0x1fU #define GRIOMMU_CAP1_CLINES_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fU ) -#define GRIOMMU_CAP1_CLINES( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRIOMMU_CAP1_CLINES_MASK ) >> GRIOMMU_CAP1_CLINES_SHIFT ) +#define GRIOMMU_CAP1_CLINES( _val ) \ + ( ( _val ) << GRIOMMU_CAP1_CLINES_SHIFT ) /** @} */ @@ -180,38 +189,44 @@ extern "C" { #define GRIOMMU_CAP2_TMASK_SHIFT 24 #define GRIOMMU_CAP2_TMASK_MASK 0xff000000U #define GRIOMMU_CAP2_TMASK_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define GRIOMMU_CAP2_TMASK( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & GRIOMMU_CAP2_TMASK_MASK ) >> GRIOMMU_CAP2_TMASK_SHIFT ) +#define GRIOMMU_CAP2_TMASK( _val ) \ + ( ( _val ) << GRIOMMU_CAP2_TMASK_SHIFT ) #define GRIOMMU_CAP2_MTYPE_SHIFT 18 #define GRIOMMU_CAP2_MTYPE_MASK 0xc0000U #define GRIOMMU_CAP2_MTYPE_GET( _reg ) \ - ( ( ( _reg ) >> 18 ) & 0x3U ) -#define GRIOMMU_CAP2_MTYPE( _val ) ( ( _val ) << 18 ) + ( ( ( _reg ) & GRIOMMU_CAP2_MTYPE_MASK ) >> GRIOMMU_CAP2_MTYPE_SHIFT ) +#define GRIOMMU_CAP2_MTYPE( _val ) \ + ( ( _val ) << GRIOMMU_CAP2_MTYPE_SHIFT ) #define GRIOMMU_CAP2_TTYPE_SHIFT 16 #define GRIOMMU_CAP2_TTYPE_MASK 0x30000U #define GRIOMMU_CAP2_TTYPE_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x3U ) -#define GRIOMMU_CAP2_TTYPE( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRIOMMU_CAP2_TTYPE_MASK ) >> GRIOMMU_CAP2_TTYPE_SHIFT ) +#define GRIOMMU_CAP2_TTYPE( _val ) \ + ( ( _val ) << GRIOMMU_CAP2_TTYPE_SHIFT ) #define GRIOMMU_CAP2_TTAGBITS_SHIFT 8 #define GRIOMMU_CAP2_TTAGBITS_MASK 0xff00U #define GRIOMMU_CAP2_TTAGBITS_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xffU ) -#define GRIOMMU_CAP2_TTAGBITS( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRIOMMU_CAP2_TTAGBITS_MASK ) >> GRIOMMU_CAP2_TTAGBITS_SHIFT ) +#define GRIOMMU_CAP2_TTAGBITS( _val ) \ + ( ( _val ) << GRIOMMU_CAP2_TTAGBITS_SHIFT ) #define GRIOMMU_CAP2_ISIZE_SHIFT 5 #define GRIOMMU_CAP2_ISIZE_MASK 0xe0U #define GRIOMMU_CAP2_ISIZE_GET( _reg ) \ - ( ( ( _reg ) >> 5 ) & 0x7U ) -#define GRIOMMU_CAP2_ISIZE( _val ) ( ( _val ) << 5 ) + ( ( ( _reg ) & GRIOMMU_CAP2_ISIZE_MASK ) >> GRIOMMU_CAP2_ISIZE_SHIFT ) +#define GRIOMMU_CAP2_ISIZE( _val ) \ + ( ( _val ) << GRIOMMU_CAP2_ISIZE_SHIFT ) #define GRIOMMU_CAP2_TLBENT_SHIFT 0 #define GRIOMMU_CAP2_TLBENT_MASK 0x1fU #define GRIOMMU_CAP2_TLBENT_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fU ) -#define GRIOMMU_CAP2_TLBENT( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRIOMMU_CAP2_TLBENT_MASK ) >> GRIOMMU_CAP2_TLBENT_SHIFT ) +#define GRIOMMU_CAP2_TLBENT( _val ) \ + ( ( _val ) << GRIOMMU_CAP2_TLBENT_SHIFT ) /** @} */ @@ -226,8 +241,9 @@ extern "C" { #define GRIOMMU_CTRL_PGSZ_SHIFT 18 #define GRIOMMU_CTRL_PGSZ_MASK 0x1c0000U #define GRIOMMU_CTRL_PGSZ_GET( _reg ) \ - ( ( ( _reg ) >> 18 ) & 0x7U ) -#define GRIOMMU_CTRL_PGSZ( _val ) ( ( _val ) << 18 ) + ( ( ( _reg ) & GRIOMMU_CTRL_PGSZ_MASK ) >> GRIOMMU_CTRL_PGSZ_SHIFT ) +#define GRIOMMU_CTRL_PGSZ( _val ) \ + ( ( _val ) << GRIOMMU_CTRL_PGSZ_SHIFT ) #define GRIOMMU_CTRL_LB 0x20000U @@ -236,8 +252,9 @@ extern "C" { #define GRIOMMU_CTRL_ITR_SHIFT 12 #define GRIOMMU_CTRL_ITR_MASK 0xf000U #define GRIOMMU_CTRL_ITR_GET( _reg ) \ - ( ( ( _reg ) >> 12 ) & 0xfU ) -#define GRIOMMU_CTRL_ITR( _val ) ( ( _val ) << 12 ) + ( ( ( _reg ) & GRIOMMU_CTRL_ITR_MASK ) >> GRIOMMU_CTRL_ITR_SHIFT ) +#define GRIOMMU_CTRL_ITR( _val ) \ + ( ( _val ) << GRIOMMU_CTRL_ITR_SHIFT ) #define GRIOMMU_CTRL_DP 0x800U @@ -246,8 +263,9 @@ extern "C" { #define GRIOMMU_CTRL_HPROT_SHIFT 8 #define GRIOMMU_CTRL_HPROT_MASK 0x300U #define GRIOMMU_CTRL_HPROT_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0x3U ) -#define GRIOMMU_CTRL_HPROT( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRIOMMU_CTRL_HPROT_MASK ) >> GRIOMMU_CTRL_HPROT_SHIFT ) +#define GRIOMMU_CTRL_HPROT( _val ) \ + ( ( _val ) << GRIOMMU_CTRL_HPROT_SHIFT ) #define GRIOMMU_CTRL_AU 0x80U @@ -262,8 +280,9 @@ extern "C" { #define GRIOMMU_CTRL_PM_SHIFT 1 #define GRIOMMU_CTRL_PM_MASK 0x6U #define GRIOMMU_CTRL_PM_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0x3U ) -#define GRIOMMU_CTRL_PM( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & GRIOMMU_CTRL_PM_MASK ) >> GRIOMMU_CTRL_PM_SHIFT ) +#define GRIOMMU_CTRL_PM( _val ) \ + ( ( _val ) << GRIOMMU_CTRL_PM_SHIFT ) #define GRIOMMU_CTRL_EN 0x1U @@ -280,8 +299,9 @@ extern "C" { #define GRIOMMU_FLUSH_FGRP_SHIFT 4 #define GRIOMMU_FLUSH_FGRP_MASK 0xf0U #define GRIOMMU_FLUSH_FGRP_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xfU ) -#define GRIOMMU_FLUSH_FGRP( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRIOMMU_FLUSH_FGRP_MASK ) >> GRIOMMU_FLUSH_FGRP_SHIFT ) +#define GRIOMMU_FLUSH_FGRP( _val ) \ + ( ( _val ) << GRIOMMU_FLUSH_FGRP_SHIFT ) #define GRIOMMU_FLUSH_GF 0x2U @@ -342,16 +362,18 @@ extern "C" { #define GRIOMMU_AHBFAS_FADDR_31_5_SHIFT 5 #define GRIOMMU_AHBFAS_FADDR_31_5_MASK 0xffffffe0U #define GRIOMMU_AHBFAS_FADDR_31_5_GET( _reg ) \ - ( ( ( _reg ) >> 5 ) & 0x7ffffffU ) -#define GRIOMMU_AHBFAS_FADDR_31_5( _val ) ( ( _val ) << 5 ) + ( ( ( _reg ) & GRIOMMU_AHBFAS_FADDR_31_5_MASK ) >> GRIOMMU_AHBFAS_FADDR_31_5_SHIFT ) +#define GRIOMMU_AHBFAS_FADDR_31_5( _val ) \ + ( ( _val ) << GRIOMMU_AHBFAS_FADDR_31_5_SHIFT ) #define GRIOMMU_AHBFAS_FW 0x10U #define GRIOMMU_AHBFAS_FMASTER_SHIFT 0 #define GRIOMMU_AHBFAS_FMASTER_MASK 0xfU #define GRIOMMU_AHBFAS_FMASTER_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfU ) -#define GRIOMMU_AHBFAS_FMASTER( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRIOMMU_AHBFAS_FMASTER_MASK ) >> GRIOMMU_AHBFAS_FMASTER_SHIFT ) +#define GRIOMMU_AHBFAS_FMASTER( _val ) \ + ( ( _val ) << GRIOMMU_AHBFAS_FMASTER_SHIFT ) /** @} */ @@ -367,22 +389,25 @@ extern "C" { #define GRIOMMU_MSTCFG_VENDOR_SHIFT 24 #define GRIOMMU_MSTCFG_VENDOR_MASK 0xff000000U #define GRIOMMU_MSTCFG_VENDOR_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define GRIOMMU_MSTCFG_VENDOR( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & GRIOMMU_MSTCFG_VENDOR_MASK ) >> GRIOMMU_MSTCFG_VENDOR_SHIFT ) +#define GRIOMMU_MSTCFG_VENDOR( _val ) \ + ( ( _val ) << GRIOMMU_MSTCFG_VENDOR_SHIFT ) #define GRIOMMU_MSTCFG_DEVICE_SHIFT 12 #define GRIOMMU_MSTCFG_DEVICE_MASK 0xfff000U #define GRIOMMU_MSTCFG_DEVICE_GET( _reg ) \ - ( ( ( _reg ) >> 12 ) & 0xfffU ) -#define GRIOMMU_MSTCFG_DEVICE( _val ) ( ( _val ) << 12 ) + ( ( ( _reg ) & GRIOMMU_MSTCFG_DEVICE_MASK ) >> GRIOMMU_MSTCFG_DEVICE_SHIFT ) +#define GRIOMMU_MSTCFG_DEVICE( _val ) \ + ( ( _val ) << GRIOMMU_MSTCFG_DEVICE_SHIFT ) #define GRIOMMU_MSTCFG_BS 0x10U #define GRIOMMU_MSTCFG_GROUP_SHIFT 0 #define GRIOMMU_MSTCFG_GROUP_MASK 0xfU #define GRIOMMU_MSTCFG_GROUP_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfU ) -#define GRIOMMU_MSTCFG_GROUP( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRIOMMU_MSTCFG_GROUP_MASK ) >> GRIOMMU_MSTCFG_GROUP_SHIFT ) +#define GRIOMMU_MSTCFG_GROUP( _val ) \ + ( ( _val ) << GRIOMMU_MSTCFG_GROUP_SHIFT ) /** @} */ @@ -397,8 +422,9 @@ extern "C" { #define GRIOMMU_GRPCTRL_BASE_31_4_SHIFT 4 #define GRIOMMU_GRPCTRL_BASE_31_4_MASK 0xfffffff0U #define GRIOMMU_GRPCTRL_BASE_31_4_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xfffffffU ) -#define GRIOMMU_GRPCTRL_BASE_31_4( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRIOMMU_GRPCTRL_BASE_31_4_MASK ) >> GRIOMMU_GRPCTRL_BASE_31_4_SHIFT ) +#define GRIOMMU_GRPCTRL_BASE_31_4( _val ) \ + ( ( _val ) << GRIOMMU_GRPCTRL_BASE_31_4_SHIFT ) #define GRIOMMU_GRPCTRL_P 0x2U @@ -426,8 +452,9 @@ extern "C" { #define GRIOMMU_DIAGCTRL_SETADDR_SHIFT 0 #define GRIOMMU_DIAGCTRL_SETADDR_MASK 0x7ffffU #define GRIOMMU_DIAGCTRL_SETADDR_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7ffffU ) -#define GRIOMMU_DIAGCTRL_SETADDR( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRIOMMU_DIAGCTRL_SETADDR_MASK ) >> GRIOMMU_DIAGCTRL_SETADDR_SHIFT ) +#define GRIOMMU_DIAGCTRL_SETADDR( _val ) \ + ( ( _val ) << GRIOMMU_DIAGCTRL_SETADDR_SHIFT ) /** @} */ @@ -443,8 +470,9 @@ extern "C" { #define GRIOMMU_DIAGD_CDATAN_SHIFT 0 #define GRIOMMU_DIAGD_CDATAN_MASK 0xffffffffU #define GRIOMMU_DIAGD_CDATAN_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRIOMMU_DIAGD_CDATAN( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRIOMMU_DIAGD_CDATAN_MASK ) >> GRIOMMU_DIAGD_CDATAN_SHIFT ) +#define GRIOMMU_DIAGD_CDATAN( _val ) \ + ( ( _val ) << GRIOMMU_DIAGD_CDATAN_SHIFT ) /** @} */ @@ -460,8 +488,9 @@ extern "C" { #define GRIOMMU_DIAGT_TAG_SHIFT 1 #define GRIOMMU_DIAGT_TAG_MASK 0xfffffffeU #define GRIOMMU_DIAGT_TAG_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0x7fffffffU ) -#define GRIOMMU_DIAGT_TAG( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & GRIOMMU_DIAGT_TAG_MASK ) >> GRIOMMU_DIAGT_TAG_SHIFT ) +#define GRIOMMU_DIAGT_TAG( _val ) \ + ( ( _val ) << GRIOMMU_DIAGT_TAG_SHIFT ) #define GRIOMMU_DIAGT_V 0x1U @@ -478,8 +507,9 @@ extern "C" { #define GRIOMMU_DERRI_DPERRINJ_SHIFT 0 #define GRIOMMU_DERRI_DPERRINJ_MASK 0xffffffffU #define GRIOMMU_DERRI_DPERRINJ_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRIOMMU_DERRI_DPERRINJ( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRIOMMU_DERRI_DPERRINJ_MASK ) >> GRIOMMU_DERRI_DPERRINJ_SHIFT ) +#define GRIOMMU_DERRI_DPERRINJ( _val ) \ + ( ( _val ) << GRIOMMU_DERRI_DPERRINJ_SHIFT ) /** @} */ @@ -494,8 +524,9 @@ extern "C" { #define GRIOMMU_TERRI_TPERRINJ_SHIFT 0 #define GRIOMMU_TERRI_TPERRINJ_MASK 0xffffffffU #define GRIOMMU_TERRI_TPERRINJ_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRIOMMU_TERRI_TPERRINJ( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRIOMMU_TERRI_TPERRINJ_MASK ) >> GRIOMMU_TERRI_TPERRINJ_SHIFT ) +#define GRIOMMU_TERRI_TPERRINJ( _val ) \ + ( ( _val ) << GRIOMMU_TERRI_TPERRINJ_SHIFT ) /** @} */ @@ -517,8 +548,9 @@ extern "C" { #define GRIOMMU_ASMPCTRL_GRPACCSZCTRL_SHIFT 0 #define GRIOMMU_ASMPCTRL_GRPACCSZCTRL_MASK 0xffffU #define GRIOMMU_ASMPCTRL_GRPACCSZCTRL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define GRIOMMU_ASMPCTRL_GRPACCSZCTRL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRIOMMU_ASMPCTRL_GRPACCSZCTRL_MASK ) >> GRIOMMU_ASMPCTRL_GRPACCSZCTRL_SHIFT ) +#define GRIOMMU_ASMPCTRL_GRPACCSZCTRL( _val ) \ + ( ( _val ) << GRIOMMU_ASMPCTRL_GRPACCSZCTRL_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/grpci2-regs.h b/bsps/include/grlib/grpci2-regs.h index daff28689e..ded194e2db 100644 --- a/bsps/include/grlib/grpci2-regs.h +++ b/bsps/include/grlib/grpci2-regs.h @@ -98,8 +98,9 @@ extern "C" { #define GRPCI2_CTRL_BUS_NUMBER_SHIFT 16 #define GRPCI2_CTRL_BUS_NUMBER_MASK 0xff0000U #define GRPCI2_CTRL_BUS_NUMBER_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffU ) -#define GRPCI2_CTRL_BUS_NUMBER( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRPCI2_CTRL_BUS_NUMBER_MASK ) >> GRPCI2_CTRL_BUS_NUMBER_SHIFT ) +#define GRPCI2_CTRL_BUS_NUMBER( _val ) \ + ( ( _val ) << GRPCI2_CTRL_BUS_NUMBER_SHIFT ) #define GRPCI2_CTRL_DFA 0x800U @@ -112,14 +113,16 @@ extern "C" { #define GRPCI2_CTRL_DEVICE_INT_MASK_SHIFT 4 #define GRPCI2_CTRL_DEVICE_INT_MASK_MASK 0xf0U #define GRPCI2_CTRL_DEVICE_INT_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xfU ) -#define GRPCI2_CTRL_DEVICE_INT_MASK( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRPCI2_CTRL_DEVICE_INT_MASK_MASK ) >> GRPCI2_CTRL_DEVICE_INT_MASK_SHIFT ) +#define GRPCI2_CTRL_DEVICE_INT_MASK( _val ) \ + ( ( _val ) << GRPCI2_CTRL_DEVICE_INT_MASK_SHIFT ) #define GRPCI2_CTRL_HOST_INT_MASK_SHIFT 0 #define GRPCI2_CTRL_HOST_INT_MASK_MASK 0xfU #define GRPCI2_CTRL_HOST_INT_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfU ) -#define GRPCI2_CTRL_HOST_INT_MASK( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRPCI2_CTRL_HOST_INT_MASK_MASK ) >> GRPCI2_CTRL_HOST_INT_MASK_SHIFT ) +#define GRPCI2_CTRL_HOST_INT_MASK( _val ) \ + ( ( _val ) << GRPCI2_CTRL_HOST_INT_MASK_SHIFT ) /** @} */ @@ -146,8 +149,9 @@ extern "C" { #define GRPCI2_STATCAP_IRQ_MODE_SHIFT 24 #define GRPCI2_STATCAP_IRQ_MODE_MASK 0x3000000U #define GRPCI2_STATCAP_IRQ_MODE_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0x3U ) -#define GRPCI2_STATCAP_IRQ_MODE( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & GRPCI2_STATCAP_IRQ_MODE_MASK ) >> GRPCI2_STATCAP_IRQ_MODE_SHIFT ) +#define GRPCI2_STATCAP_IRQ_MODE( _val ) \ + ( ( _val ) << GRPCI2_STATCAP_IRQ_MODE_SHIFT ) #define GRPCI2_STATCAP_TRACE 0x800000U @@ -158,26 +162,30 @@ extern "C" { #define GRPCI2_STATCAP_CORE_INT_STATUS_SHIFT 12 #define GRPCI2_STATCAP_CORE_INT_STATUS_MASK 0x7f000U #define GRPCI2_STATCAP_CORE_INT_STATUS_GET( _reg ) \ - ( ( ( _reg ) >> 12 ) & 0x7fU ) -#define GRPCI2_STATCAP_CORE_INT_STATUS( _val ) ( ( _val ) << 12 ) + ( ( ( _reg ) & GRPCI2_STATCAP_CORE_INT_STATUS_MASK ) >> GRPCI2_STATCAP_CORE_INT_STATUS_SHIFT ) +#define GRPCI2_STATCAP_CORE_INT_STATUS( _val ) \ + ( ( _val ) << GRPCI2_STATCAP_CORE_INT_STATUS_SHIFT ) #define GRPCI2_STATCAP_HOST_INT_STATUS_SHIFT 8 #define GRPCI2_STATCAP_HOST_INT_STATUS_MASK 0xf00U #define GRPCI2_STATCAP_HOST_INT_STATUS_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xfU ) -#define GRPCI2_STATCAP_HOST_INT_STATUS( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRPCI2_STATCAP_HOST_INT_STATUS_MASK ) >> GRPCI2_STATCAP_HOST_INT_STATUS_SHIFT ) +#define GRPCI2_STATCAP_HOST_INT_STATUS( _val ) \ + ( ( _val ) << GRPCI2_STATCAP_HOST_INT_STATUS_SHIFT ) #define GRPCI2_STATCAP_FDEPTH_SHIFT 2 #define GRPCI2_STATCAP_FDEPTH_MASK 0x1cU #define GRPCI2_STATCAP_FDEPTH_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x7U ) -#define GRPCI2_STATCAP_FDEPTH( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & GRPCI2_STATCAP_FDEPTH_MASK ) >> GRPCI2_STATCAP_FDEPTH_SHIFT ) +#define GRPCI2_STATCAP_FDEPTH( _val ) \ + ( ( _val ) << GRPCI2_STATCAP_FDEPTH_SHIFT ) #define GRPCI2_STATCAP_FNUM_SHIFT 0 #define GRPCI2_STATCAP_FNUM_MASK 0x3U #define GRPCI2_STATCAP_FNUM_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3U ) -#define GRPCI2_STATCAP_FNUM( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRPCI2_STATCAP_FNUM_MASK ) >> GRPCI2_STATCAP_FNUM_SHIFT ) +#define GRPCI2_STATCAP_FNUM( _val ) \ + ( ( _val ) << GRPCI2_STATCAP_FNUM_SHIFT ) /** @} */ @@ -192,14 +200,16 @@ extern "C" { #define GRPCI2_BCIM_AHB_MASTER_UNMASK_SHIFT 16 #define GRPCI2_BCIM_AHB_MASTER_UNMASK_MASK 0xffff0000U #define GRPCI2_BCIM_AHB_MASTER_UNMASK_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define GRPCI2_BCIM_AHB_MASTER_UNMASK( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRPCI2_BCIM_AHB_MASTER_UNMASK_MASK ) >> GRPCI2_BCIM_AHB_MASTER_UNMASK_SHIFT ) +#define GRPCI2_BCIM_AHB_MASTER_UNMASK( _val ) \ + ( ( _val ) << GRPCI2_BCIM_AHB_MASTER_UNMASK_SHIFT ) #define GRPCI2_BCIM_BURST_LENGTH_SHIFT 0 #define GRPCI2_BCIM_BURST_LENGTH_MASK 0xffU #define GRPCI2_BCIM_BURST_LENGTH_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define GRPCI2_BCIM_BURST_LENGTH( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRPCI2_BCIM_BURST_LENGTH_MASK ) >> GRPCI2_BCIM_BURST_LENGTH_SHIFT ) +#define GRPCI2_BCIM_BURST_LENGTH( _val ) \ + ( ( _val ) << GRPCI2_BCIM_BURST_LENGTH_SHIFT ) /** @} */ @@ -214,8 +224,9 @@ extern "C" { #define GRPCI2_AHB2PCI_AHB_TO_PCI_IO_SHIFT 16 #define GRPCI2_AHB2PCI_AHB_TO_PCI_IO_MASK 0xffff0000U #define GRPCI2_AHB2PCI_AHB_TO_PCI_IO_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define GRPCI2_AHB2PCI_AHB_TO_PCI_IO( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRPCI2_AHB2PCI_AHB_TO_PCI_IO_MASK ) >> GRPCI2_AHB2PCI_AHB_TO_PCI_IO_SHIFT ) +#define GRPCI2_AHB2PCI_AHB_TO_PCI_IO( _val ) \ + ( ( _val ) << GRPCI2_AHB2PCI_AHB_TO_PCI_IO_SHIFT ) /** @} */ @@ -232,8 +243,9 @@ extern "C" { #define GRPCI2_DMACTRL_CHIRQ_SHIFT 12 #define GRPCI2_DMACTRL_CHIRQ_MASK 0xff000U #define GRPCI2_DMACTRL_CHIRQ_GET( _reg ) \ - ( ( ( _reg ) >> 12 ) & 0xffU ) -#define GRPCI2_DMACTRL_CHIRQ( _val ) ( ( _val ) << 12 ) + ( ( ( _reg ) & GRPCI2_DMACTRL_CHIRQ_MASK ) >> GRPCI2_DMACTRL_CHIRQ_SHIFT ) +#define GRPCI2_DMACTRL_CHIRQ( _val ) \ + ( ( _val ) << GRPCI2_DMACTRL_CHIRQ_SHIFT ) #define GRPCI2_DMACTRL_MA 0x800U @@ -248,8 +260,9 @@ extern "C" { #define GRPCI2_DMACTRL_NUMCH_SHIFT 4 #define GRPCI2_DMACTRL_NUMCH_MASK 0x70U #define GRPCI2_DMACTRL_NUMCH_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0x7U ) -#define GRPCI2_DMACTRL_NUMCH( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRPCI2_DMACTRL_NUMCH_MASK ) >> GRPCI2_DMACTRL_NUMCH_SHIFT ) +#define GRPCI2_DMACTRL_NUMCH( _val ) \ + ( ( _val ) << GRPCI2_DMACTRL_NUMCH_SHIFT ) #define GRPCI2_DMACTRL_ACTIVE 0x8U @@ -273,8 +286,9 @@ extern "C" { #define GRPCI2_DMABASE_BASE_SHIFT 0 #define GRPCI2_DMABASE_BASE_MASK 0xffffffffU #define GRPCI2_DMABASE_BASE_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRPCI2_DMABASE_BASE( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRPCI2_DMABASE_BASE_MASK ) >> GRPCI2_DMABASE_BASE_SHIFT ) +#define GRPCI2_DMABASE_BASE( _val ) \ + ( ( _val ) << GRPCI2_DMABASE_BASE_SHIFT ) /** @} */ @@ -289,8 +303,9 @@ extern "C" { #define GRPCI2_DMACHAN_CHAN_SHIFT 0 #define GRPCI2_DMACHAN_CHAN_MASK 0xffffffffU #define GRPCI2_DMACHAN_CHAN_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRPCI2_DMACHAN_CHAN( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRPCI2_DMACHAN_CHAN_MASK ) >> GRPCI2_DMACHAN_CHAN_SHIFT ) +#define GRPCI2_DMACHAN_CHAN( _val ) \ + ( ( _val ) << GRPCI2_DMACHAN_CHAN_SHIFT ) /** @} */ @@ -306,8 +321,9 @@ extern "C" { #define GRPCI2_PCI2AHB_ADDR_SHIFT 0 #define GRPCI2_PCI2AHB_ADDR_MASK 0xffffffffU #define GRPCI2_PCI2AHB_ADDR_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRPCI2_PCI2AHB_ADDR( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRPCI2_PCI2AHB_ADDR_MASK ) >> GRPCI2_PCI2AHB_ADDR_SHIFT ) +#define GRPCI2_PCI2AHB_ADDR( _val ) \ + ( ( _val ) << GRPCI2_PCI2AHB_ADDR_SHIFT ) /** @} */ @@ -323,8 +339,9 @@ extern "C" { #define GRPCI2_AHBM2PCI_ADDR_SHIFT 0 #define GRPCI2_AHBM2PCI_ADDR_MASK 0xffffffffU #define GRPCI2_AHBM2PCI_ADDR_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRPCI2_AHBM2PCI_ADDR( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRPCI2_AHBM2PCI_ADDR_MASK ) >> GRPCI2_AHBM2PCI_ADDR_SHIFT ) +#define GRPCI2_AHBM2PCI_ADDR( _val ) \ + ( ( _val ) << GRPCI2_AHBM2PCI_ADDR_SHIFT ) /** @} */ @@ -340,8 +357,9 @@ extern "C" { #define GRPCI2_TCTRC_TRIG_INDEX_SHIFT 16 #define GRPCI2_TCTRC_TRIG_INDEX_MASK 0xffff0000U #define GRPCI2_TCTRC_TRIG_INDEX_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define GRPCI2_TCTRC_TRIG_INDEX( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRPCI2_TCTRC_TRIG_INDEX_MASK ) >> GRPCI2_TCTRC_TRIG_INDEX_SHIFT ) +#define GRPCI2_TCTRC_TRIG_INDEX( _val ) \ + ( ( _val ) << GRPCI2_TCTRC_TRIG_INDEX_SHIFT ) #define GRPCI2_TCTRC_AR 0x8000U @@ -350,8 +368,9 @@ extern "C" { #define GRPCI2_TCTRC_DEPTH_SHIFT 4 #define GRPCI2_TCTRC_DEPTH_MASK 0xff0U #define GRPCI2_TCTRC_DEPTH_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xffU ) -#define GRPCI2_TCTRC_DEPTH( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRPCI2_TCTRC_DEPTH_MASK ) >> GRPCI2_TCTRC_DEPTH_SHIFT ) +#define GRPCI2_TCTRC_DEPTH( _val ) \ + ( ( _val ) << GRPCI2_TCTRC_DEPTH_SHIFT ) #define GRPCI2_TCTRC_SO 0x2U @@ -370,20 +389,23 @@ extern "C" { #define GRPCI2_TMODE_TRACING_MODE_SHIFT 24 #define GRPCI2_TMODE_TRACING_MODE_MASK 0xf000000U #define GRPCI2_TMODE_TRACING_MODE_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xfU ) -#define GRPCI2_TMODE_TRACING_MODE( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & GRPCI2_TMODE_TRACING_MODE_MASK ) >> GRPCI2_TMODE_TRACING_MODE_SHIFT ) +#define GRPCI2_TMODE_TRACING_MODE( _val ) \ + ( ( _val ) << GRPCI2_TMODE_TRACING_MODE_SHIFT ) #define GRPCI2_TMODE_TRIG_COUNT_SHIFT 16 #define GRPCI2_TMODE_TRIG_COUNT_MASK 0xff0000U #define GRPCI2_TMODE_TRIG_COUNT_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffU ) -#define GRPCI2_TMODE_TRIG_COUNT( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRPCI2_TMODE_TRIG_COUNT_MASK ) >> GRPCI2_TMODE_TRIG_COUNT_SHIFT ) +#define GRPCI2_TMODE_TRIG_COUNT( _val ) \ + ( ( _val ) << GRPCI2_TMODE_TRIG_COUNT_SHIFT ) #define GRPCI2_TMODE_DELAYED_STOP_SHIFT 0 #define GRPCI2_TMODE_DELAYED_STOP_MASK 0xffffU #define GRPCI2_TMODE_DELAYED_STOP_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define GRPCI2_TMODE_DELAYED_STOP( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRPCI2_TMODE_DELAYED_STOP_MASK ) >> GRPCI2_TMODE_DELAYED_STOP_SHIFT ) +#define GRPCI2_TMODE_DELAYED_STOP( _val ) \ + ( ( _val ) << GRPCI2_TMODE_DELAYED_STOP_SHIFT ) /** @} */ @@ -398,8 +420,9 @@ extern "C" { #define GRPCI2_TADP_PATTERN_SHIFT 0 #define GRPCI2_TADP_PATTERN_MASK 0xffffffffU #define GRPCI2_TADP_PATTERN_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRPCI2_TADP_PATTERN( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRPCI2_TADP_PATTERN_MASK ) >> GRPCI2_TADP_PATTERN_SHIFT ) +#define GRPCI2_TADP_PATTERN( _val ) \ + ( ( _val ) << GRPCI2_TADP_PATTERN_SHIFT ) /** @} */ @@ -414,8 +437,9 @@ extern "C" { #define GRPCI2_TADM_MASK_SHIFT 0 #define GRPCI2_TADM_MASK_MASK 0xffffffffU #define GRPCI2_TADM_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRPCI2_TADM_MASK( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRPCI2_TADM_MASK_MASK ) >> GRPCI2_TADM_MASK_SHIFT ) +#define GRPCI2_TADM_MASK( _val ) \ + ( ( _val ) << GRPCI2_TADM_MASK_SHIFT ) /** @} */ @@ -430,8 +454,9 @@ extern "C" { #define GRPCI2_TCP_CBE_3_0_SHIFT 16 #define GRPCI2_TCP_CBE_3_0_MASK 0xf0000U #define GRPCI2_TCP_CBE_3_0_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xfU ) -#define GRPCI2_TCP_CBE_3_0( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRPCI2_TCP_CBE_3_0_MASK ) >> GRPCI2_TCP_CBE_3_0_SHIFT ) +#define GRPCI2_TCP_CBE_3_0( _val ) \ + ( ( _val ) << GRPCI2_TCP_CBE_3_0_SHIFT ) #define GRPCI2_TCP_FRAME 0x8000U @@ -472,8 +497,9 @@ extern "C" { #define GRPCI2_TCM_CBE_3_0_SHIFT 16 #define GRPCI2_TCM_CBE_3_0_MASK 0xf0000U #define GRPCI2_TCM_CBE_3_0_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xfU ) -#define GRPCI2_TCM_CBE_3_0( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRPCI2_TCM_CBE_3_0_MASK ) >> GRPCI2_TCM_CBE_3_0_SHIFT ) +#define GRPCI2_TCM_CBE_3_0( _val ) \ + ( ( _val ) << GRPCI2_TCM_CBE_3_0_SHIFT ) #define GRPCI2_TCM_FRAME 0x8000U @@ -514,8 +540,9 @@ extern "C" { #define GRPCI2_TADS_SIGNAL_SHIFT 0 #define GRPCI2_TADS_SIGNAL_MASK 0xffffffffU #define GRPCI2_TADS_SIGNAL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRPCI2_TADS_SIGNAL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRPCI2_TADS_SIGNAL_MASK ) >> GRPCI2_TADS_SIGNAL_SHIFT ) +#define GRPCI2_TADS_SIGNAL( _val ) \ + ( ( _val ) << GRPCI2_TADS_SIGNAL_SHIFT ) /** @} */ @@ -531,8 +558,9 @@ extern "C" { #define GRPCI2_TCS_CBE_3_0_SHIFT 16 #define GRPCI2_TCS_CBE_3_0_MASK 0xf0000U #define GRPCI2_TCS_CBE_3_0_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xfU ) -#define GRPCI2_TCS_CBE_3_0( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRPCI2_TCS_CBE_3_0_MASK ) >> GRPCI2_TCS_CBE_3_0_SHIFT ) +#define GRPCI2_TCS_CBE_3_0( _val ) \ + ( ( _val ) << GRPCI2_TCS_CBE_3_0_SHIFT ) #define GRPCI2_TCS_FRAME 0x8000U diff --git a/bsps/include/grlib/grspw2-regs.h b/bsps/include/grlib/grspw2-regs.h index 9c560b42f0..00ba1a6407 100644 --- a/bsps/include/grlib/grspw2-regs.h +++ b/bsps/include/grlib/grspw2-regs.h @@ -90,8 +90,9 @@ extern "C" { #define GRSPW2_CTRL_NCH_SHIFT 27 #define GRSPW2_CTRL_NCH_MASK 0x18000000U #define GRSPW2_CTRL_NCH_GET( _reg ) \ - ( ( ( _reg ) >> 27 ) & 0x3U ) -#define GRSPW2_CTRL_NCH( _val ) ( ( _val ) << 27 ) + ( ( ( _reg ) & GRSPW2_CTRL_NCH_MASK ) >> GRSPW2_CTRL_NCH_SHIFT ) +#define GRSPW2_CTRL_NCH( _val ) \ + ( ( _val ) << GRSPW2_CTRL_NCH_SHIFT ) #define GRSPW2_CTRL_PO 0x4000000U @@ -138,20 +139,23 @@ extern "C" { #define GRSPW2_STS_NRXD_SHIFT 26 #define GRSPW2_STS_NRXD_MASK 0xc000000U #define GRSPW2_STS_NRXD_GET( _reg ) \ - ( ( ( _reg ) >> 26 ) & 0x3U ) -#define GRSPW2_STS_NRXD( _val ) ( ( _val ) << 26 ) + ( ( ( _reg ) & GRSPW2_STS_NRXD_MASK ) >> GRSPW2_STS_NRXD_SHIFT ) +#define GRSPW2_STS_NRXD( _val ) \ + ( ( _val ) << GRSPW2_STS_NRXD_SHIFT ) #define GRSPW2_STS_NTXD_SHIFT 24 #define GRSPW2_STS_NTXD_MASK 0x3000000U #define GRSPW2_STS_NTXD_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0x3U ) -#define GRSPW2_STS_NTXD( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & GRSPW2_STS_NTXD_MASK ) >> GRSPW2_STS_NTXD_SHIFT ) +#define GRSPW2_STS_NTXD( _val ) \ + ( ( _val ) << GRSPW2_STS_NTXD_SHIFT ) #define GRSPW2_STS_LS_SHIFT 21 #define GRSPW2_STS_LS_MASK 0xe00000U #define GRSPW2_STS_LS_GET( _reg ) \ - ( ( ( _reg ) >> 21 ) & 0x7U ) -#define GRSPW2_STS_LS( _val ) ( ( _val ) << 21 ) + ( ( ( _reg ) & GRSPW2_STS_LS_MASK ) >> GRSPW2_STS_LS_SHIFT ) +#define GRSPW2_STS_LS( _val ) \ + ( ( _val ) << GRSPW2_STS_LS_SHIFT ) #define GRSPW2_STS_EE 0x100U @@ -180,14 +184,16 @@ extern "C" { #define GRSPW2_DEFADDR_DEFMASK_SHIFT 8 #define GRSPW2_DEFADDR_DEFMASK_MASK 0xff00U #define GRSPW2_DEFADDR_DEFMASK_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xffU ) -#define GRSPW2_DEFADDR_DEFMASK( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRSPW2_DEFADDR_DEFMASK_MASK ) >> GRSPW2_DEFADDR_DEFMASK_SHIFT ) +#define GRSPW2_DEFADDR_DEFMASK( _val ) \ + ( ( _val ) << GRSPW2_DEFADDR_DEFMASK_SHIFT ) #define GRSPW2_DEFADDR_DEFADDR_SHIFT 0 #define GRSPW2_DEFADDR_DEFADDR_MASK 0xffU #define GRSPW2_DEFADDR_DEFADDR_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define GRSPW2_DEFADDR_DEFADDR( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPW2_DEFADDR_DEFADDR_MASK ) >> GRSPW2_DEFADDR_DEFADDR_SHIFT ) +#define GRSPW2_DEFADDR_DEFADDR( _val ) \ + ( ( _val ) << GRSPW2_DEFADDR_DEFADDR_SHIFT ) /** @} */ @@ -202,14 +208,16 @@ extern "C" { #define GRSPW2_CLKDIV_CLKDIVSTART_SHIFT 8 #define GRSPW2_CLKDIV_CLKDIVSTART_MASK 0xff00U #define GRSPW2_CLKDIV_CLKDIVSTART_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xffU ) -#define GRSPW2_CLKDIV_CLKDIVSTART( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRSPW2_CLKDIV_CLKDIVSTART_MASK ) >> GRSPW2_CLKDIV_CLKDIVSTART_SHIFT ) +#define GRSPW2_CLKDIV_CLKDIVSTART( _val ) \ + ( ( _val ) << GRSPW2_CLKDIV_CLKDIVSTART_SHIFT ) #define GRSPW2_CLKDIV_CLKDIVRUN_SHIFT 0 #define GRSPW2_CLKDIV_CLKDIVRUN_MASK 0xffU #define GRSPW2_CLKDIV_CLKDIVRUN_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define GRSPW2_CLKDIV_CLKDIVRUN( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPW2_CLKDIV_CLKDIVRUN_MASK ) >> GRSPW2_CLKDIV_CLKDIVRUN_SHIFT ) +#define GRSPW2_CLKDIV_CLKDIVRUN( _val ) \ + ( ( _val ) << GRSPW2_CLKDIV_CLKDIVRUN_SHIFT ) /** @} */ @@ -224,8 +232,9 @@ extern "C" { #define GRSPW2_DKEY_DESTKEY_SHIFT 0 #define GRSPW2_DKEY_DESTKEY_MASK 0xffU #define GRSPW2_DKEY_DESTKEY_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define GRSPW2_DKEY_DESTKEY( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPW2_DKEY_DESTKEY_MASK ) >> GRSPW2_DKEY_DESTKEY_SHIFT ) +#define GRSPW2_DKEY_DESTKEY( _val ) \ + ( ( _val ) << GRSPW2_DKEY_DESTKEY_SHIFT ) /** @} */ @@ -240,14 +249,16 @@ extern "C" { #define GRSPW2_TC_TCTRL_SHIFT 6 #define GRSPW2_TC_TCTRL_MASK 0xc0U #define GRSPW2_TC_TCTRL_GET( _reg ) \ - ( ( ( _reg ) >> 6 ) & 0x3U ) -#define GRSPW2_TC_TCTRL( _val ) ( ( _val ) << 6 ) + ( ( ( _reg ) & GRSPW2_TC_TCTRL_MASK ) >> GRSPW2_TC_TCTRL_SHIFT ) +#define GRSPW2_TC_TCTRL( _val ) \ + ( ( _val ) << GRSPW2_TC_TCTRL_SHIFT ) #define GRSPW2_TC_TIMECNT_SHIFT 0 #define GRSPW2_TC_TIMECNT_MASK 0x3fU #define GRSPW2_TC_TIMECNT_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3fU ) -#define GRSPW2_TC_TIMECNT( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPW2_TC_TIMECNT_MASK ) >> GRSPW2_TC_TIMECNT_SHIFT ) +#define GRSPW2_TC_TIMECNT( _val ) \ + ( ( _val ) << GRSPW2_TC_TIMECNT_SHIFT ) /** @} */ @@ -317,8 +328,9 @@ extern "C" { #define GRSPW2_DMAMAXLEN_RXMAXLEN_SHIFT 2 #define GRSPW2_DMAMAXLEN_RXMAXLEN_MASK 0x1fffffcU #define GRSPW2_DMAMAXLEN_RXMAXLEN_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x7fffffU ) -#define GRSPW2_DMAMAXLEN_RXMAXLEN( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & GRSPW2_DMAMAXLEN_RXMAXLEN_MASK ) >> GRSPW2_DMAMAXLEN_RXMAXLEN_SHIFT ) +#define GRSPW2_DMAMAXLEN_RXMAXLEN( _val ) \ + ( ( _val ) << GRSPW2_DMAMAXLEN_RXMAXLEN_SHIFT ) /** @} */ @@ -334,14 +346,16 @@ extern "C" { #define GRSPW2_DMATXDESC_DESCBASEADDR_SHIFT 10 #define GRSPW2_DMATXDESC_DESCBASEADDR_MASK 0xfffffc00U #define GRSPW2_DMATXDESC_DESCBASEADDR_GET( _reg ) \ - ( ( ( _reg ) >> 10 ) & 0x3fffffU ) -#define GRSPW2_DMATXDESC_DESCBASEADDR( _val ) ( ( _val ) << 10 ) + ( ( ( _reg ) & GRSPW2_DMATXDESC_DESCBASEADDR_MASK ) >> GRSPW2_DMATXDESC_DESCBASEADDR_SHIFT ) +#define GRSPW2_DMATXDESC_DESCBASEADDR( _val ) \ + ( ( _val ) << GRSPW2_DMATXDESC_DESCBASEADDR_SHIFT ) #define GRSPW2_DMATXDESC_DESCSEL_SHIFT 4 #define GRSPW2_DMATXDESC_DESCSEL_MASK 0x3f0U #define GRSPW2_DMATXDESC_DESCSEL_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0x3fU ) -#define GRSPW2_DMATXDESC_DESCSEL( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRSPW2_DMATXDESC_DESCSEL_MASK ) >> GRSPW2_DMATXDESC_DESCSEL_SHIFT ) +#define GRSPW2_DMATXDESC_DESCSEL( _val ) \ + ( ( _val ) << GRSPW2_DMATXDESC_DESCSEL_SHIFT ) /** @} */ @@ -357,14 +371,16 @@ extern "C" { #define GRSPW2_DMARXDESC_DESCBASEADDR_SHIFT 10 #define GRSPW2_DMARXDESC_DESCBASEADDR_MASK 0xfffffc00U #define GRSPW2_DMARXDESC_DESCBASEADDR_GET( _reg ) \ - ( ( ( _reg ) >> 10 ) & 0x3fffffU ) -#define GRSPW2_DMARXDESC_DESCBASEADDR( _val ) ( ( _val ) << 10 ) + ( ( ( _reg ) & GRSPW2_DMARXDESC_DESCBASEADDR_MASK ) >> GRSPW2_DMARXDESC_DESCBASEADDR_SHIFT ) +#define GRSPW2_DMARXDESC_DESCBASEADDR( _val ) \ + ( ( _val ) << GRSPW2_DMARXDESC_DESCBASEADDR_SHIFT ) #define GRSPW2_DMARXDESC_DESCSEL_SHIFT 3 #define GRSPW2_DMARXDESC_DESCSEL_MASK 0x3f8U #define GRSPW2_DMARXDESC_DESCSEL_GET( _reg ) \ - ( ( ( _reg ) >> 3 ) & 0x7fU ) -#define GRSPW2_DMARXDESC_DESCSEL( _val ) ( ( _val ) << 3 ) + ( ( ( _reg ) & GRSPW2_DMARXDESC_DESCSEL_MASK ) >> GRSPW2_DMARXDESC_DESCSEL_SHIFT ) +#define GRSPW2_DMARXDESC_DESCSEL( _val ) \ + ( ( _val ) << GRSPW2_DMARXDESC_DESCSEL_SHIFT ) /** @} */ @@ -379,14 +395,16 @@ extern "C" { #define GRSPW2_DMAADDR_MASK_SHIFT 8 #define GRSPW2_DMAADDR_MASK_MASK 0xff00U #define GRSPW2_DMAADDR_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xffU ) -#define GRSPW2_DMAADDR_MASK( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRSPW2_DMAADDR_MASK_MASK ) >> GRSPW2_DMAADDR_MASK_SHIFT ) +#define GRSPW2_DMAADDR_MASK( _val ) \ + ( ( _val ) << GRSPW2_DMAADDR_MASK_SHIFT ) #define GRSPW2_DMAADDR_ADDR_SHIFT 0 #define GRSPW2_DMAADDR_ADDR_MASK 0xffU #define GRSPW2_DMAADDR_ADDR_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define GRSPW2_DMAADDR_ADDR( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPW2_DMAADDR_ADDR_MASK ) >> GRSPW2_DMAADDR_ADDR_SHIFT ) +#define GRSPW2_DMAADDR_ADDR( _val ) \ + ( ( _val ) << GRSPW2_DMAADDR_ADDR_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/grspwrouter-regs.h b/bsps/include/grlib/grspwrouter-regs.h index 68061e9f26..6540dd3d14 100644 --- a/bsps/include/grlib/grspwrouter-regs.h +++ b/bsps/include/grlib/grspwrouter-regs.h @@ -90,8 +90,9 @@ extern "C" { #define GRSPWROUTER_AMBACTRL_NCH_SHIFT 27 #define GRSPWROUTER_AMBACTRL_NCH_MASK 0x18000000U #define GRSPWROUTER_AMBACTRL_NCH_GET( _reg ) \ - ( ( ( _reg ) >> 27 ) & 0x3U ) -#define GRSPWROUTER_AMBACTRL_NCH( _val ) ( ( _val ) << 27 ) + ( ( ( _reg ) & GRSPWROUTER_AMBACTRL_NCH_MASK ) >> GRSPWROUTER_AMBACTRL_NCH_SHIFT ) +#define GRSPWROUTER_AMBACTRL_NCH( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBACTRL_NCH_SHIFT ) #define GRSPWROUTER_AMBACTRL_DI 0x1000000U @@ -124,20 +125,23 @@ extern "C" { #define GRSPWROUTER_AMBASTS_NIRQ_SHIFT 28 #define GRSPWROUTER_AMBASTS_NIRQ_MASK 0x70000000U #define GRSPWROUTER_AMBASTS_NIRQ_GET( _reg ) \ - ( ( ( _reg ) >> 28 ) & 0x7U ) -#define GRSPWROUTER_AMBASTS_NIRQ( _val ) ( ( _val ) << 28 ) + ( ( ( _reg ) & GRSPWROUTER_AMBASTS_NIRQ_MASK ) >> GRSPWROUTER_AMBASTS_NIRQ_SHIFT ) +#define GRSPWROUTER_AMBASTS_NIRQ( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBASTS_NIRQ_SHIFT ) #define GRSPWROUTER_AMBASTS_NRXD_SHIFT 26 #define GRSPWROUTER_AMBASTS_NRXD_MASK 0xc000000U #define GRSPWROUTER_AMBASTS_NRXD_GET( _reg ) \ - ( ( ( _reg ) >> 26 ) & 0x3U ) -#define GRSPWROUTER_AMBASTS_NRXD( _val ) ( ( _val ) << 26 ) + ( ( ( _reg ) & GRSPWROUTER_AMBASTS_NRXD_MASK ) >> GRSPWROUTER_AMBASTS_NRXD_SHIFT ) +#define GRSPWROUTER_AMBASTS_NRXD( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBASTS_NRXD_SHIFT ) #define GRSPWROUTER_AMBASTS_NTXD_SHIFT 24 #define GRSPWROUTER_AMBASTS_NTXD_MASK 0x3000000U #define GRSPWROUTER_AMBASTS_NTXD_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0x3U ) -#define GRSPWROUTER_AMBASTS_NTXD( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & GRSPWROUTER_AMBASTS_NTXD_MASK ) >> GRSPWROUTER_AMBASTS_NTXD_SHIFT ) +#define GRSPWROUTER_AMBASTS_NTXD( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBASTS_NTXD_SHIFT ) #define GRSPWROUTER_AMBASTS_ME 0x1000U @@ -161,14 +165,16 @@ extern "C" { #define GRSPWROUTER_AMBADEFADDR_DEFMASK_SHIFT 8 #define GRSPWROUTER_AMBADEFADDR_DEFMASK_MASK 0xff00U #define GRSPWROUTER_AMBADEFADDR_DEFMASK_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xffU ) -#define GRSPWROUTER_AMBADEFADDR_DEFMASK( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRSPWROUTER_AMBADEFADDR_DEFMASK_MASK ) >> GRSPWROUTER_AMBADEFADDR_DEFMASK_SHIFT ) +#define GRSPWROUTER_AMBADEFADDR_DEFMASK( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBADEFADDR_DEFMASK_SHIFT ) #define GRSPWROUTER_AMBADEFADDR_DEFADDR_SHIFT 0 #define GRSPWROUTER_AMBADEFADDR_DEFADDR_MASK 0xffU #define GRSPWROUTER_AMBADEFADDR_DEFADDR_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define GRSPWROUTER_AMBADEFADDR_DEFADDR( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPWROUTER_AMBADEFADDR_DEFADDR_MASK ) >> GRSPWROUTER_AMBADEFADDR_DEFADDR_SHIFT ) +#define GRSPWROUTER_AMBADEFADDR_DEFADDR( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBADEFADDR_DEFADDR_SHIFT ) /** @} */ @@ -184,8 +190,9 @@ extern "C" { #define GRSPWROUTER_AMBADKEY_DESTKEY_SHIFT 0 #define GRSPWROUTER_AMBADKEY_DESTKEY_MASK 0xffU #define GRSPWROUTER_AMBADKEY_DESTKEY_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define GRSPWROUTER_AMBADKEY_DESTKEY( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPWROUTER_AMBADKEY_DESTKEY_MASK ) >> GRSPWROUTER_AMBADKEY_DESTKEY_SHIFT ) +#define GRSPWROUTER_AMBADKEY_DESTKEY( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBADKEY_DESTKEY_SHIFT ) /** @} */ @@ -200,26 +207,30 @@ extern "C" { #define GRSPWROUTER_AMBATC_TCMSK_SHIFT 24 #define GRSPWROUTER_AMBATC_TCMSK_MASK 0xff000000U #define GRSPWROUTER_AMBATC_TCMSK_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define GRSPWROUTER_AMBATC_TCMSK( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & GRSPWROUTER_AMBATC_TCMSK_MASK ) >> GRSPWROUTER_AMBATC_TCMSK_SHIFT ) +#define GRSPWROUTER_AMBATC_TCMSK( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBATC_TCMSK_SHIFT ) #define GRSPWROUTER_AMBATC_TCVAL_SHIFT 16 #define GRSPWROUTER_AMBATC_TCVAL_MASK 0xff0000U #define GRSPWROUTER_AMBATC_TCVAL_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffU ) -#define GRSPWROUTER_AMBATC_TCVAL( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & GRSPWROUTER_AMBATC_TCVAL_MASK ) >> GRSPWROUTER_AMBATC_TCVAL_SHIFT ) +#define GRSPWROUTER_AMBATC_TCVAL( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBATC_TCVAL_SHIFT ) #define GRSPWROUTER_AMBATC_TCTRL_SHIFT 6 #define GRSPWROUTER_AMBATC_TCTRL_MASK 0xc0U #define GRSPWROUTER_AMBATC_TCTRL_GET( _reg ) \ - ( ( ( _reg ) >> 6 ) & 0x3U ) -#define GRSPWROUTER_AMBATC_TCTRL( _val ) ( ( _val ) << 6 ) + ( ( ( _reg ) & GRSPWROUTER_AMBATC_TCTRL_MASK ) >> GRSPWROUTER_AMBATC_TCTRL_SHIFT ) +#define GRSPWROUTER_AMBATC_TCTRL( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBATC_TCTRL_SHIFT ) #define GRSPWROUTER_AMBATC_TIMECNT_SHIFT 0 #define GRSPWROUTER_AMBATC_TIMECNT_MASK 0x3fU #define GRSPWROUTER_AMBATC_TIMECNT_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3fU ) -#define GRSPWROUTER_AMBATC_TIMECNT( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPWROUTER_AMBATC_TIMECNT_MASK ) >> GRSPWROUTER_AMBATC_TIMECNT_SHIFT ) +#define GRSPWROUTER_AMBATC_TIMECNT( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBATC_TIMECNT_SHIFT ) /** @} */ @@ -235,8 +246,9 @@ extern "C" { #define GRSPWROUTER_AMBADMACTRL_INTNUM_SHIFT 26 #define GRSPWROUTER_AMBADMACTRL_INTNUM_MASK 0xfc000000U #define GRSPWROUTER_AMBADMACTRL_INTNUM_GET( _reg ) \ - ( ( ( _reg ) >> 26 ) & 0x3fU ) -#define GRSPWROUTER_AMBADMACTRL_INTNUM( _val ) ( ( _val ) << 26 ) + ( ( ( _reg ) & GRSPWROUTER_AMBADMACTRL_INTNUM_MASK ) >> GRSPWROUTER_AMBADMACTRL_INTNUM_SHIFT ) +#define GRSPWROUTER_AMBADMACTRL_INTNUM( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBADMACTRL_INTNUM_SHIFT ) #define GRSPWROUTER_AMBADMACTRL_EP 0x800000U @@ -296,8 +308,9 @@ extern "C" { #define GRSPWROUTER_AMBADMAMAXLEN_RXMAXLEN_SHIFT 2 #define GRSPWROUTER_AMBADMAMAXLEN_RXMAXLEN_MASK 0x1fffffcU #define GRSPWROUTER_AMBADMAMAXLEN_RXMAXLEN_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x7fffffU ) -#define GRSPWROUTER_AMBADMAMAXLEN_RXMAXLEN( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & GRSPWROUTER_AMBADMAMAXLEN_RXMAXLEN_MASK ) >> GRSPWROUTER_AMBADMAMAXLEN_RXMAXLEN_SHIFT ) +#define GRSPWROUTER_AMBADMAMAXLEN_RXMAXLEN( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBADMAMAXLEN_RXMAXLEN_SHIFT ) /** @} */ @@ -313,14 +326,16 @@ extern "C" { #define GRSPWROUTER_AMBADMATXDESC_DESCBASEADDR_SHIFT 10 #define GRSPWROUTER_AMBADMATXDESC_DESCBASEADDR_MASK 0xfffffc00U #define GRSPWROUTER_AMBADMATXDESC_DESCBASEADDR_GET( _reg ) \ - ( ( ( _reg ) >> 10 ) & 0x3fffffU ) -#define GRSPWROUTER_AMBADMATXDESC_DESCBASEADDR( _val ) ( ( _val ) << 10 ) + ( ( ( _reg ) & GRSPWROUTER_AMBADMATXDESC_DESCBASEADDR_MASK ) >> GRSPWROUTER_AMBADMATXDESC_DESCBASEADDR_SHIFT ) +#define GRSPWROUTER_AMBADMATXDESC_DESCBASEADDR( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBADMATXDESC_DESCBASEADDR_SHIFT ) #define GRSPWROUTER_AMBADMATXDESC_DESCSEL_SHIFT 4 #define GRSPWROUTER_AMBADMATXDESC_DESCSEL_MASK 0x3f0U #define GRSPWROUTER_AMBADMATXDESC_DESCSEL_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0x3fU ) -#define GRSPWROUTER_AMBADMATXDESC_DESCSEL( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & GRSPWROUTER_AMBADMATXDESC_DESCSEL_MASK ) >> GRSPWROUTER_AMBADMATXDESC_DESCSEL_SHIFT ) +#define GRSPWROUTER_AMBADMATXDESC_DESCSEL( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBADMATXDESC_DESCSEL_SHIFT ) /** @} */ @@ -336,14 +351,16 @@ extern "C" { #define GRSPWROUTER_AMBADMARXDESC_DESCBASEADDR_SHIFT 10 #define GRSPWROUTER_AMBADMARXDESC_DESCBASEADDR_MASK 0xfffffc00U #define GRSPWROUTER_AMBADMARXDESC_DESCBASEADDR_GET( _reg ) \ - ( ( ( _reg ) >> 10 ) & 0x3fffffU ) -#define GRSPWROUTER_AMBADMARXDESC_DESCBASEADDR( _val ) ( ( _val ) << 10 ) + ( ( ( _reg ) & GRSPWROUTER_AMBADMARXDESC_DESCBASEADDR_MASK ) >> GRSPWROUTER_AMBADMARXDESC_DESCBASEADDR_SHIFT ) +#define GRSPWROUTER_AMBADMARXDESC_DESCBASEADDR( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBADMARXDESC_DESCBASEADDR_SHIFT ) #define GRSPWROUTER_AMBADMARXDESC_DESCSEL_SHIFT 3 #define GRSPWROUTER_AMBADMARXDESC_DESCSEL_MASK 0x3f8U #define GRSPWROUTER_AMBADMARXDESC_DESCSEL_GET( _reg ) \ - ( ( ( _reg ) >> 3 ) & 0x7fU ) -#define GRSPWROUTER_AMBADMARXDESC_DESCSEL( _val ) ( ( _val ) << 3 ) + ( ( ( _reg ) & GRSPWROUTER_AMBADMARXDESC_DESCSEL_MASK ) >> GRSPWROUTER_AMBADMARXDESC_DESCSEL_SHIFT ) +#define GRSPWROUTER_AMBADMARXDESC_DESCSEL( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBADMARXDESC_DESCSEL_SHIFT ) /** @} */ @@ -359,14 +376,16 @@ extern "C" { #define GRSPWROUTER_AMBADMAADDR_MASK_SHIFT 8 #define GRSPWROUTER_AMBADMAADDR_MASK_MASK 0xff00U #define GRSPWROUTER_AMBADMAADDR_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xffU ) -#define GRSPWROUTER_AMBADMAADDR_MASK( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & GRSPWROUTER_AMBADMAADDR_MASK_MASK ) >> GRSPWROUTER_AMBADMAADDR_MASK_SHIFT ) +#define GRSPWROUTER_AMBADMAADDR_MASK( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBADMAADDR_MASK_SHIFT ) #define GRSPWROUTER_AMBADMAADDR_ADDR_SHIFT 0 #define GRSPWROUTER_AMBADMAADDR_ADDR_MASK 0xffU #define GRSPWROUTER_AMBADMAADDR_ADDR_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define GRSPWROUTER_AMBADMAADDR_ADDR( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPWROUTER_AMBADMAADDR_ADDR_MASK ) >> GRSPWROUTER_AMBADMAADDR_ADDR_SHIFT ) +#define GRSPWROUTER_AMBADMAADDR_ADDR( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBADMAADDR_ADDR_SHIFT ) /** @} */ @@ -382,8 +401,9 @@ extern "C" { #define GRSPWROUTER_AMBAINTCTRL_INTNUM_SHIFT 26 #define GRSPWROUTER_AMBAINTCTRL_INTNUM_MASK 0xfc000000U #define GRSPWROUTER_AMBAINTCTRL_INTNUM_GET( _reg ) \ - ( ( ( _reg ) >> 26 ) & 0x3fU ) -#define GRSPWROUTER_AMBAINTCTRL_INTNUM( _val ) ( ( _val ) << 26 ) + ( ( ( _reg ) & GRSPWROUTER_AMBAINTCTRL_INTNUM_MASK ) >> GRSPWROUTER_AMBAINTCTRL_INTNUM_SHIFT ) +#define GRSPWROUTER_AMBAINTCTRL_INTNUM( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBAINTCTRL_INTNUM_SHIFT ) #define GRSPWROUTER_AMBAINTCTRL_EE 0x1000000U @@ -408,8 +428,9 @@ extern "C" { #define GRSPWROUTER_AMBAINTCTRL_TXINT_SHIFT 0 #define GRSPWROUTER_AMBAINTCTRL_TXINT_MASK 0x3fU #define GRSPWROUTER_AMBAINTCTRL_TXINT_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3fU ) -#define GRSPWROUTER_AMBAINTCTRL_TXINT( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPWROUTER_AMBAINTCTRL_TXINT_MASK ) >> GRSPWROUTER_AMBAINTCTRL_TXINT_SHIFT ) +#define GRSPWROUTER_AMBAINTCTRL_TXINT( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBAINTCTRL_TXINT_SHIFT ) /** @} */ @@ -425,8 +446,9 @@ extern "C" { #define GRSPWROUTER_AMBAINTRX_RXIRQ_SHIFT 0 #define GRSPWROUTER_AMBAINTRX_RXIRQ_MASK 0xffffffffU #define GRSPWROUTER_AMBAINTRX_RXIRQ_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRSPWROUTER_AMBAINTRX_RXIRQ( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPWROUTER_AMBAINTRX_RXIRQ_MASK ) >> GRSPWROUTER_AMBAINTRX_RXIRQ_SHIFT ) +#define GRSPWROUTER_AMBAINTRX_RXIRQ( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBAINTRX_RXIRQ_SHIFT ) /** @} */ @@ -442,8 +464,9 @@ extern "C" { #define GRSPWROUTER_AMBAACKRX_RXACK_SHIFT 0 #define GRSPWROUTER_AMBAACKRX_RXACK_MASK 0xffffffffU #define GRSPWROUTER_AMBAACKRX_RXACK_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRSPWROUTER_AMBAACKRX_RXACK( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPWROUTER_AMBAACKRX_RXACK_MASK ) >> GRSPWROUTER_AMBAACKRX_RXACK_SHIFT ) +#define GRSPWROUTER_AMBAACKRX_RXACK( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBAACKRX_RXACK_SHIFT ) /** @} */ @@ -459,8 +482,9 @@ extern "C" { #define GRSPWROUTER_AMBAINTTO0_INTTO_SHIFT 0 #define GRSPWROUTER_AMBAINTTO0_INTTO_MASK 0xffffffffU #define GRSPWROUTER_AMBAINTTO0_INTTO_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRSPWROUTER_AMBAINTTO0_INTTO( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPWROUTER_AMBAINTTO0_INTTO_MASK ) >> GRSPWROUTER_AMBAINTTO0_INTTO_SHIFT ) +#define GRSPWROUTER_AMBAINTTO0_INTTO( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBAINTTO0_INTTO_SHIFT ) /** @} */ @@ -476,8 +500,9 @@ extern "C" { #define GRSPWROUTER_AMBAINTTO1_INTTO_SHIFT 0 #define GRSPWROUTER_AMBAINTTO1_INTTO_MASK 0xffffffffU #define GRSPWROUTER_AMBAINTTO1_INTTO_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRSPWROUTER_AMBAINTTO1_INTTO( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPWROUTER_AMBAINTTO1_INTTO_MASK ) >> GRSPWROUTER_AMBAINTTO1_INTTO_SHIFT ) +#define GRSPWROUTER_AMBAINTTO1_INTTO( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBAINTTO1_INTTO_SHIFT ) /** @} */ @@ -493,8 +518,9 @@ extern "C" { #define GRSPWROUTER_AMBAINTMSK0_MASK_SHIFT 0 #define GRSPWROUTER_AMBAINTMSK0_MASK_MASK 0xffffffffU #define GRSPWROUTER_AMBAINTMSK0_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRSPWROUTER_AMBAINTMSK0_MASK( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPWROUTER_AMBAINTMSK0_MASK_MASK ) >> GRSPWROUTER_AMBAINTMSK0_MASK_SHIFT ) +#define GRSPWROUTER_AMBAINTMSK0_MASK( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBAINTMSK0_MASK_SHIFT ) /** @} */ @@ -510,8 +536,9 @@ extern "C" { #define GRSPWROUTER_AMBAINTMSK1_MASK_SHIFT 0 #define GRSPWROUTER_AMBAINTMSK1_MASK_MASK 0xffffffffU #define GRSPWROUTER_AMBAINTMSK1_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define GRSPWROUTER_AMBAINTMSK1_MASK( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & GRSPWROUTER_AMBAINTMSK1_MASK_MASK ) >> GRSPWROUTER_AMBAINTMSK1_MASK_SHIFT ) +#define GRSPWROUTER_AMBAINTMSK1_MASK( _val ) \ + ( ( _val ) << GRSPWROUTER_AMBAINTMSK1_MASK_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/irqamp-regs.h b/bsps/include/grlib/irqamp-regs.h index 082d08a870..3a0ad48d5e 100644 --- a/bsps/include/grlib/irqamp-regs.h +++ b/bsps/include/grlib/irqamp-regs.h @@ -85,8 +85,9 @@ extern "C" { #define IRQAMP_ITCNT_TCNT_SHIFT 0 #define IRQAMP_ITCNT_TCNT_MASK 0xffffffffU #define IRQAMP_ITCNT_TCNT_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define IRQAMP_ITCNT_TCNT( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & IRQAMP_ITCNT_TCNT_MASK ) >> IRQAMP_ITCNT_TCNT_SHIFT ) +#define IRQAMP_ITCNT_TCNT( _val ) \ + ( ( _val ) << IRQAMP_ITCNT_TCNT_SHIFT ) /** @} */ @@ -102,8 +103,9 @@ extern "C" { #define IRQAMP_ITSTMPC_TSTAMP_SHIFT 27 #define IRQAMP_ITSTMPC_TSTAMP_MASK 0xf8000000U #define IRQAMP_ITSTMPC_TSTAMP_GET( _reg ) \ - ( ( ( _reg ) >> 27 ) & 0x1fU ) -#define IRQAMP_ITSTMPC_TSTAMP( _val ) ( ( _val ) << 27 ) + ( ( ( _reg ) & IRQAMP_ITSTMPC_TSTAMP_MASK ) >> IRQAMP_ITSTMPC_TSTAMP_SHIFT ) +#define IRQAMP_ITSTMPC_TSTAMP( _val ) \ + ( ( _val ) << IRQAMP_ITSTMPC_TSTAMP_SHIFT ) #define IRQAMP_ITSTMPC_S1 0x4000000U @@ -114,8 +116,9 @@ extern "C" { #define IRQAMP_ITSTMPC_TSISEL_SHIFT 0 #define IRQAMP_ITSTMPC_TSISEL_MASK 0x1fU #define IRQAMP_ITSTMPC_TSISEL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fU ) -#define IRQAMP_ITSTMPC_TSISEL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & IRQAMP_ITSTMPC_TSISEL_MASK ) >> IRQAMP_ITSTMPC_TSISEL_SHIFT ) +#define IRQAMP_ITSTMPC_TSISEL( _val ) \ + ( ( _val ) << IRQAMP_ITSTMPC_TSISEL_SHIFT ) /** @} */ @@ -131,8 +134,9 @@ extern "C" { #define IRQAMP_ITSTMPAS_TASSERTION_SHIFT 0 #define IRQAMP_ITSTMPAS_TASSERTION_MASK 0xffffffffU #define IRQAMP_ITSTMPAS_TASSERTION_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define IRQAMP_ITSTMPAS_TASSERTION( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & IRQAMP_ITSTMPAS_TASSERTION_MASK ) >> IRQAMP_ITSTMPAS_TASSERTION_SHIFT ) +#define IRQAMP_ITSTMPAS_TASSERTION( _val ) \ + ( ( _val ) << IRQAMP_ITSTMPAS_TASSERTION_SHIFT ) /** @} */ @@ -148,8 +152,9 @@ extern "C" { #define IRQAMP_ITSTMPAC_TACKNOWLEDGE_SHIFT 0 #define IRQAMP_ITSTMPAC_TACKNOWLEDGE_MASK 0xffffffffU #define IRQAMP_ITSTMPAC_TACKNOWLEDGE_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define IRQAMP_ITSTMPAC_TACKNOWLEDGE( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & IRQAMP_ITSTMPAC_TACKNOWLEDGE_MASK ) >> IRQAMP_ITSTMPAC_TACKNOWLEDGE_SHIFT ) +#define IRQAMP_ITSTMPAC_TACKNOWLEDGE( _val ) \ + ( ( _val ) << IRQAMP_ITSTMPAC_TACKNOWLEDGE_SHIFT ) /** @} */ @@ -204,8 +209,9 @@ typedef struct irqamp_timestamp { #define IRQAMP_ILEVEL_IL_15_1_SHIFT 1 #define IRQAMP_ILEVEL_IL_15_1_MASK 0xfffeU #define IRQAMP_ILEVEL_IL_15_1_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0x7fffU ) -#define IRQAMP_ILEVEL_IL_15_1( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & IRQAMP_ILEVEL_IL_15_1_MASK ) >> IRQAMP_ILEVEL_IL_15_1_SHIFT ) +#define IRQAMP_ILEVEL_IL_15_1( _val ) \ + ( ( _val ) << IRQAMP_ILEVEL_IL_15_1_SHIFT ) /** @} */ @@ -220,14 +226,16 @@ typedef struct irqamp_timestamp { #define IRQAMP_IPEND_EIP_31_16_SHIFT 16 #define IRQAMP_IPEND_EIP_31_16_MASK 0xffff0000U #define IRQAMP_IPEND_EIP_31_16_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define IRQAMP_IPEND_EIP_31_16( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & IRQAMP_IPEND_EIP_31_16_MASK ) >> IRQAMP_IPEND_EIP_31_16_SHIFT ) +#define IRQAMP_IPEND_EIP_31_16( _val ) \ + ( ( _val ) << IRQAMP_IPEND_EIP_31_16_SHIFT ) #define IRQAMP_IPEND_IP_15_1_SHIFT 1 #define IRQAMP_IPEND_IP_15_1_MASK 0xfffeU #define IRQAMP_IPEND_IP_15_1_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0x7fffU ) -#define IRQAMP_IPEND_IP_15_1( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & IRQAMP_IPEND_IP_15_1_MASK ) >> IRQAMP_IPEND_IP_15_1_SHIFT ) +#define IRQAMP_IPEND_IP_15_1( _val ) \ + ( ( _val ) << IRQAMP_IPEND_IP_15_1_SHIFT ) /** @} */ @@ -243,8 +251,9 @@ typedef struct irqamp_timestamp { #define IRQAMP_IFORCE0_IF_15_1_SHIFT 1 #define IRQAMP_IFORCE0_IF_15_1_MASK 0xfffeU #define IRQAMP_IFORCE0_IF_15_1_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0x7fffU ) -#define IRQAMP_IFORCE0_IF_15_1( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & IRQAMP_IFORCE0_IF_15_1_MASK ) >> IRQAMP_IFORCE0_IF_15_1_SHIFT ) +#define IRQAMP_IFORCE0_IF_15_1( _val ) \ + ( ( _val ) << IRQAMP_IFORCE0_IF_15_1_SHIFT ) /** @} */ @@ -259,14 +268,16 @@ typedef struct irqamp_timestamp { #define IRQAMP_ICLEAR_EIC_31_16_SHIFT 16 #define IRQAMP_ICLEAR_EIC_31_16_MASK 0xffff0000U #define IRQAMP_ICLEAR_EIC_31_16_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define IRQAMP_ICLEAR_EIC_31_16( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & IRQAMP_ICLEAR_EIC_31_16_MASK ) >> IRQAMP_ICLEAR_EIC_31_16_SHIFT ) +#define IRQAMP_ICLEAR_EIC_31_16( _val ) \ + ( ( _val ) << IRQAMP_ICLEAR_EIC_31_16_SHIFT ) #define IRQAMP_ICLEAR_IC_15_1_SHIFT 1 #define IRQAMP_ICLEAR_IC_15_1_MASK 0xfffeU #define IRQAMP_ICLEAR_IC_15_1_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0x7fffU ) -#define IRQAMP_ICLEAR_IC_15_1( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & IRQAMP_ICLEAR_IC_15_1_MASK ) >> IRQAMP_ICLEAR_IC_15_1_SHIFT ) +#define IRQAMP_ICLEAR_IC_15_1( _val ) \ + ( ( _val ) << IRQAMP_ICLEAR_IC_15_1_SHIFT ) /** @} */ @@ -282,8 +293,9 @@ typedef struct irqamp_timestamp { #define IRQAMP_MPSTAT_NCPU_SHIFT 28 #define IRQAMP_MPSTAT_NCPU_MASK 0xf0000000U #define IRQAMP_MPSTAT_NCPU_GET( _reg ) \ - ( ( ( _reg ) >> 28 ) & 0xfU ) -#define IRQAMP_MPSTAT_NCPU( _val ) ( ( _val ) << 28 ) + ( ( ( _reg ) & IRQAMP_MPSTAT_NCPU_MASK ) >> IRQAMP_MPSTAT_NCPU_SHIFT ) +#define IRQAMP_MPSTAT_NCPU( _val ) \ + ( ( _val ) << IRQAMP_MPSTAT_NCPU_SHIFT ) #define IRQAMP_MPSTAT_BA 0x8000000U @@ -292,14 +304,16 @@ typedef struct irqamp_timestamp { #define IRQAMP_MPSTAT_EIRQ_SHIFT 16 #define IRQAMP_MPSTAT_EIRQ_MASK 0xf0000U #define IRQAMP_MPSTAT_EIRQ_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xfU ) -#define IRQAMP_MPSTAT_EIRQ( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & IRQAMP_MPSTAT_EIRQ_MASK ) >> IRQAMP_MPSTAT_EIRQ_SHIFT ) +#define IRQAMP_MPSTAT_EIRQ( _val ) \ + ( ( _val ) << IRQAMP_MPSTAT_EIRQ_SHIFT ) #define IRQAMP_MPSTAT_STATUS_SHIFT 0 #define IRQAMP_MPSTAT_STATUS_MASK 0xfU #define IRQAMP_MPSTAT_STATUS_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfU ) -#define IRQAMP_MPSTAT_STATUS( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & IRQAMP_MPSTAT_STATUS_MASK ) >> IRQAMP_MPSTAT_STATUS_SHIFT ) +#define IRQAMP_MPSTAT_STATUS( _val ) \ + ( ( _val ) << IRQAMP_MPSTAT_STATUS_SHIFT ) /** @} */ @@ -314,8 +328,9 @@ typedef struct irqamp_timestamp { #define IRQAMP_BRDCST_BM15_1_SHIFT 1 #define IRQAMP_BRDCST_BM15_1_MASK 0xfffeU #define IRQAMP_BRDCST_BM15_1_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0x7fffU ) -#define IRQAMP_BRDCST_BM15_1( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & IRQAMP_BRDCST_BM15_1_MASK ) >> IRQAMP_BRDCST_BM15_1_SHIFT ) +#define IRQAMP_BRDCST_BM15_1( _val ) \ + ( ( _val ) << IRQAMP_BRDCST_BM15_1_SHIFT ) /** @} */ @@ -330,8 +345,9 @@ typedef struct irqamp_timestamp { #define IRQAMP_ERRSTAT_ERRMODE_3_0_SHIFT 0 #define IRQAMP_ERRSTAT_ERRMODE_3_0_MASK 0xfU #define IRQAMP_ERRSTAT_ERRMODE_3_0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfU ) -#define IRQAMP_ERRSTAT_ERRMODE_3_0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & IRQAMP_ERRSTAT_ERRMODE_3_0_MASK ) >> IRQAMP_ERRSTAT_ERRMODE_3_0_SHIFT ) +#define IRQAMP_ERRSTAT_ERRMODE_3_0( _val ) \ + ( ( _val ) << IRQAMP_ERRSTAT_ERRMODE_3_0_SHIFT ) /** @} */ @@ -347,20 +363,23 @@ typedef struct irqamp_timestamp { #define IRQAMP_WDOGCTRL_NWDOG_SHIFT 27 #define IRQAMP_WDOGCTRL_NWDOG_MASK 0xf8000000U #define IRQAMP_WDOGCTRL_NWDOG_GET( _reg ) \ - ( ( ( _reg ) >> 27 ) & 0x1fU ) -#define IRQAMP_WDOGCTRL_NWDOG( _val ) ( ( _val ) << 27 ) + ( ( ( _reg ) & IRQAMP_WDOGCTRL_NWDOG_MASK ) >> IRQAMP_WDOGCTRL_NWDOG_SHIFT ) +#define IRQAMP_WDOGCTRL_NWDOG( _val ) \ + ( ( _val ) << IRQAMP_WDOGCTRL_NWDOG_SHIFT ) #define IRQAMP_WDOGCTRL_WDOGIRQ_SHIFT 16 #define IRQAMP_WDOGCTRL_WDOGIRQ_MASK 0xf0000U #define IRQAMP_WDOGCTRL_WDOGIRQ_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xfU ) -#define IRQAMP_WDOGCTRL_WDOGIRQ( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & IRQAMP_WDOGCTRL_WDOGIRQ_MASK ) >> IRQAMP_WDOGCTRL_WDOGIRQ_SHIFT ) +#define IRQAMP_WDOGCTRL_WDOGIRQ( _val ) \ + ( ( _val ) << IRQAMP_WDOGCTRL_WDOGIRQ_SHIFT ) #define IRQAMP_WDOGCTRL_WDOGMSK_SHIFT 0 #define IRQAMP_WDOGCTRL_WDOGMSK_MASK 0xfU #define IRQAMP_WDOGCTRL_WDOGMSK_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfU ) -#define IRQAMP_WDOGCTRL_WDOGMSK( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & IRQAMP_WDOGCTRL_WDOGMSK_MASK ) >> IRQAMP_WDOGCTRL_WDOGMSK_SHIFT ) +#define IRQAMP_WDOGCTRL_WDOGMSK( _val ) \ + ( ( _val ) << IRQAMP_WDOGCTRL_WDOGMSK_SHIFT ) /** @} */ @@ -376,8 +395,9 @@ typedef struct irqamp_timestamp { #define IRQAMP_ASMPCTRL_NCTRL_SHIFT 28 #define IRQAMP_ASMPCTRL_NCTRL_MASK 0xf0000000U #define IRQAMP_ASMPCTRL_NCTRL_GET( _reg ) \ - ( ( ( _reg ) >> 28 ) & 0xfU ) -#define IRQAMP_ASMPCTRL_NCTRL( _val ) ( ( _val ) << 28 ) + ( ( ( _reg ) & IRQAMP_ASMPCTRL_NCTRL_MASK ) >> IRQAMP_ASMPCTRL_NCTRL_SHIFT ) +#define IRQAMP_ASMPCTRL_NCTRL( _val ) \ + ( ( _val ) << IRQAMP_ASMPCTRL_NCTRL_SHIFT ) #define IRQAMP_ASMPCTRL_ICF 0x2U @@ -397,26 +417,30 @@ typedef struct irqamp_timestamp { #define IRQAMP_ICSELR_ICSEL0_SHIFT 28 #define IRQAMP_ICSELR_ICSEL0_MASK 0xf0000000U #define IRQAMP_ICSELR_ICSEL0_GET( _reg ) \ - ( ( ( _reg ) >> 28 ) & 0xfU ) -#define IRQAMP_ICSELR_ICSEL0( _val ) ( ( _val ) << 28 ) + ( ( ( _reg ) & IRQAMP_ICSELR_ICSEL0_MASK ) >> IRQAMP_ICSELR_ICSEL0_SHIFT ) +#define IRQAMP_ICSELR_ICSEL0( _val ) \ + ( ( _val ) << IRQAMP_ICSELR_ICSEL0_SHIFT ) #define IRQAMP_ICSELR_ICSEL1_SHIFT 24 #define IRQAMP_ICSELR_ICSEL1_MASK 0xf000000U #define IRQAMP_ICSELR_ICSEL1_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xfU ) -#define IRQAMP_ICSELR_ICSEL1( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & IRQAMP_ICSELR_ICSEL1_MASK ) >> IRQAMP_ICSELR_ICSEL1_SHIFT ) +#define IRQAMP_ICSELR_ICSEL1( _val ) \ + ( ( _val ) << IRQAMP_ICSELR_ICSEL1_SHIFT ) #define IRQAMP_ICSELR_ICSEL2_SHIFT 20 #define IRQAMP_ICSELR_ICSEL2_MASK 0xf00000U #define IRQAMP_ICSELR_ICSEL2_GET( _reg ) \ - ( ( ( _reg ) >> 20 ) & 0xfU ) -#define IRQAMP_ICSELR_ICSEL2( _val ) ( ( _val ) << 20 ) + ( ( ( _reg ) & IRQAMP_ICSELR_ICSEL2_MASK ) >> IRQAMP_ICSELR_ICSEL2_SHIFT ) +#define IRQAMP_ICSELR_ICSEL2( _val ) \ + ( ( _val ) << IRQAMP_ICSELR_ICSEL2_SHIFT ) #define IRQAMP_ICSELR_ICSEL3_SHIFT 16 #define IRQAMP_ICSELR_ICSEL3_MASK 0xf0000U #define IRQAMP_ICSELR_ICSEL3_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xfU ) -#define IRQAMP_ICSELR_ICSEL3( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & IRQAMP_ICSELR_ICSEL3_MASK ) >> IRQAMP_ICSELR_ICSEL3_SHIFT ) +#define IRQAMP_ICSELR_ICSEL3( _val ) \ + ( ( _val ) << IRQAMP_ICSELR_ICSEL3_SHIFT ) /** @} */ @@ -432,14 +456,16 @@ typedef struct irqamp_timestamp { #define IRQAMP_PIMASK_EIM_31_16_SHIFT 16 #define IRQAMP_PIMASK_EIM_31_16_MASK 0xffff0000U #define IRQAMP_PIMASK_EIM_31_16_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define IRQAMP_PIMASK_EIM_31_16( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & IRQAMP_PIMASK_EIM_31_16_MASK ) >> IRQAMP_PIMASK_EIM_31_16_SHIFT ) +#define IRQAMP_PIMASK_EIM_31_16( _val ) \ + ( ( _val ) << IRQAMP_PIMASK_EIM_31_16_SHIFT ) #define IRQAMP_PIMASK_IM15_1_SHIFT 1 #define IRQAMP_PIMASK_IM15_1_MASK 0xfffeU #define IRQAMP_PIMASK_IM15_1_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0x7fffU ) -#define IRQAMP_PIMASK_IM15_1( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & IRQAMP_PIMASK_IM15_1_MASK ) >> IRQAMP_PIMASK_IM15_1_SHIFT ) +#define IRQAMP_PIMASK_IM15_1( _val ) \ + ( ( _val ) << IRQAMP_PIMASK_IM15_1_SHIFT ) /** @} */ @@ -455,14 +481,16 @@ typedef struct irqamp_timestamp { #define IRQAMP_PIFORCE_FC_15_1_SHIFT 17 #define IRQAMP_PIFORCE_FC_15_1_MASK 0xfffe0000U #define IRQAMP_PIFORCE_FC_15_1_GET( _reg ) \ - ( ( ( _reg ) >> 17 ) & 0x7fffU ) -#define IRQAMP_PIFORCE_FC_15_1( _val ) ( ( _val ) << 17 ) + ( ( ( _reg ) & IRQAMP_PIFORCE_FC_15_1_MASK ) >> IRQAMP_PIFORCE_FC_15_1_SHIFT ) +#define IRQAMP_PIFORCE_FC_15_1( _val ) \ + ( ( _val ) << IRQAMP_PIFORCE_FC_15_1_SHIFT ) #define IRQAMP_PIFORCE_IF15_1_SHIFT 1 #define IRQAMP_PIFORCE_IF15_1_MASK 0xfffeU #define IRQAMP_PIFORCE_IF15_1_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0x7fffU ) -#define IRQAMP_PIFORCE_IF15_1( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & IRQAMP_PIFORCE_IF15_1_MASK ) >> IRQAMP_PIFORCE_IF15_1_SHIFT ) +#define IRQAMP_PIFORCE_IF15_1( _val ) \ + ( ( _val ) << IRQAMP_PIFORCE_IF15_1_SHIFT ) /** @} */ @@ -478,8 +506,9 @@ typedef struct irqamp_timestamp { #define IRQAMP_PEXTACK_EID_4_0_SHIFT 0 #define IRQAMP_PEXTACK_EID_4_0_MASK 0x1fU #define IRQAMP_PEXTACK_EID_4_0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fU ) -#define IRQAMP_PEXTACK_EID_4_0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & IRQAMP_PEXTACK_EID_4_0_MASK ) >> IRQAMP_PEXTACK_EID_4_0_SHIFT ) +#define IRQAMP_PEXTACK_EID_4_0( _val ) \ + ( ( _val ) << IRQAMP_PEXTACK_EID_4_0_SHIFT ) /** @} */ @@ -495,8 +524,9 @@ typedef struct irqamp_timestamp { #define IRQAMP_BADDR_BOOTADDR_31_3_SHIFT 3 #define IRQAMP_BADDR_BOOTADDR_31_3_MASK 0xfffffff8U #define IRQAMP_BADDR_BOOTADDR_31_3_GET( _reg ) \ - ( ( ( _reg ) >> 3 ) & 0x1fffffffU ) -#define IRQAMP_BADDR_BOOTADDR_31_3( _val ) ( ( _val ) << 3 ) + ( ( ( _reg ) & IRQAMP_BADDR_BOOTADDR_31_3_MASK ) >> IRQAMP_BADDR_BOOTADDR_31_3_SHIFT ) +#define IRQAMP_BADDR_BOOTADDR_31_3( _val ) \ + ( ( _val ) << IRQAMP_BADDR_BOOTADDR_31_3_SHIFT ) #define IRQAMP_BADDR_AS 0x1U @@ -513,26 +543,30 @@ typedef struct irqamp_timestamp { #define IRQAMP_IRQMAP_IRQMAP_4_N_0_SHIFT 24 #define IRQAMP_IRQMAP_IRQMAP_4_N_0_MASK 0xff000000U #define IRQAMP_IRQMAP_IRQMAP_4_N_0_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define IRQAMP_IRQMAP_IRQMAP_4_N_0( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & IRQAMP_IRQMAP_IRQMAP_4_N_0_MASK ) >> IRQAMP_IRQMAP_IRQMAP_4_N_0_SHIFT ) +#define IRQAMP_IRQMAP_IRQMAP_4_N_0( _val ) \ + ( ( _val ) << IRQAMP_IRQMAP_IRQMAP_4_N_0_SHIFT ) #define IRQAMP_IRQMAP_IRQMAP_4_N_1_SHIFT 16 #define IRQAMP_IRQMAP_IRQMAP_4_N_1_MASK 0xff0000U #define IRQAMP_IRQMAP_IRQMAP_4_N_1_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffU ) -#define IRQAMP_IRQMAP_IRQMAP_4_N_1( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & IRQAMP_IRQMAP_IRQMAP_4_N_1_MASK ) >> IRQAMP_IRQMAP_IRQMAP_4_N_1_SHIFT ) +#define IRQAMP_IRQMAP_IRQMAP_4_N_1( _val ) \ + ( ( _val ) << IRQAMP_IRQMAP_IRQMAP_4_N_1_SHIFT ) #define IRQAMP_IRQMAP_IRQMAP_4_N_2_SHIFT 8 #define IRQAMP_IRQMAP_IRQMAP_4_N_2_MASK 0xff00U #define IRQAMP_IRQMAP_IRQMAP_4_N_2_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xffU ) -#define IRQAMP_IRQMAP_IRQMAP_4_N_2( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & IRQAMP_IRQMAP_IRQMAP_4_N_2_MASK ) >> IRQAMP_IRQMAP_IRQMAP_4_N_2_SHIFT ) +#define IRQAMP_IRQMAP_IRQMAP_4_N_2( _val ) \ + ( ( _val ) << IRQAMP_IRQMAP_IRQMAP_4_N_2_SHIFT ) #define IRQAMP_IRQMAP_IRQMAP_4_N_3_SHIFT 0 #define IRQAMP_IRQMAP_IRQMAP_4_N_3_MASK 0xffU #define IRQAMP_IRQMAP_IRQMAP_4_N_3_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define IRQAMP_IRQMAP_IRQMAP_4_N_3( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & IRQAMP_IRQMAP_IRQMAP_4_N_3_MASK ) >> IRQAMP_IRQMAP_IRQMAP_4_N_3_SHIFT ) +#define IRQAMP_IRQMAP_IRQMAP_4_N_3( _val ) \ + ( ( _val ) << IRQAMP_IRQMAP_IRQMAP_4_N_3_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/l2cache-regs.h b/bsps/include/grlib/l2cache-regs.h index 604bde2a3e..0da2b67ab9 100644 --- a/bsps/include/grlib/l2cache-regs.h +++ b/bsps/include/grlib/l2cache-regs.h @@ -88,26 +88,30 @@ extern "C" { #define L2CACHE_L2CC_REPL_SHIFT 28 #define L2CACHE_L2CC_REPL_MASK 0x30000000U #define L2CACHE_L2CC_REPL_GET( _reg ) \ - ( ( ( _reg ) >> 28 ) & 0x3U ) -#define L2CACHE_L2CC_REPL( _val ) ( ( _val ) << 28 ) + ( ( ( _reg ) & L2CACHE_L2CC_REPL_MASK ) >> L2CACHE_L2CC_REPL_SHIFT ) +#define L2CACHE_L2CC_REPL( _val ) \ + ( ( _val ) << L2CACHE_L2CC_REPL_SHIFT ) #define L2CACHE_L2CC_BBS_SHIFT 16 #define L2CACHE_L2CC_BBS_MASK 0x70000U #define L2CACHE_L2CC_BBS_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x7U ) -#define L2CACHE_L2CC_BBS( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & L2CACHE_L2CC_BBS_MASK ) >> L2CACHE_L2CC_BBS_SHIFT ) +#define L2CACHE_L2CC_BBS( _val ) \ + ( ( _val ) << L2CACHE_L2CC_BBS_SHIFT ) #define L2CACHE_L2CC_INDEX_WAY_SHIFT 12 #define L2CACHE_L2CC_INDEX_WAY_MASK 0xf000U #define L2CACHE_L2CC_INDEX_WAY_GET( _reg ) \ - ( ( ( _reg ) >> 12 ) & 0xfU ) -#define L2CACHE_L2CC_INDEX_WAY( _val ) ( ( _val ) << 12 ) + ( ( ( _reg ) & L2CACHE_L2CC_INDEX_WAY_MASK ) >> L2CACHE_L2CC_INDEX_WAY_SHIFT ) +#define L2CACHE_L2CC_INDEX_WAY( _val ) \ + ( ( _val ) << L2CACHE_L2CC_INDEX_WAY_SHIFT ) #define L2CACHE_L2CC_LOCK_SHIFT 8 #define L2CACHE_L2CC_LOCK_MASK 0xf00U #define L2CACHE_L2CC_LOCK_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xfU ) -#define L2CACHE_L2CC_LOCK( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & L2CACHE_L2CC_LOCK_MASK ) >> L2CACHE_L2CC_LOCK_SHIFT ) +#define L2CACHE_L2CC_LOCK( _val ) \ + ( ( _val ) << L2CACHE_L2CC_LOCK_SHIFT ) #define L2CACHE_L2CC_HPRHB 0x20U @@ -140,26 +144,30 @@ extern "C" { #define L2CACHE_L2CS_MTRR_SHIFT 16 #define L2CACHE_L2CS_MTRR_MASK 0x3f0000U #define L2CACHE_L2CS_MTRR_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x3fU ) -#define L2CACHE_L2CS_MTRR( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & L2CACHE_L2CS_MTRR_MASK ) >> L2CACHE_L2CS_MTRR_SHIFT ) +#define L2CACHE_L2CS_MTRR( _val ) \ + ( ( _val ) << L2CACHE_L2CS_MTRR_SHIFT ) #define L2CACHE_L2CS_BBUS_W_SHIFT 13 #define L2CACHE_L2CS_BBUS_W_MASK 0xe000U #define L2CACHE_L2CS_BBUS_W_GET( _reg ) \ - ( ( ( _reg ) >> 13 ) & 0x7U ) -#define L2CACHE_L2CS_BBUS_W( _val ) ( ( _val ) << 13 ) + ( ( ( _reg ) & L2CACHE_L2CS_BBUS_W_MASK ) >> L2CACHE_L2CS_BBUS_W_SHIFT ) +#define L2CACHE_L2CS_BBUS_W( _val ) \ + ( ( _val ) << L2CACHE_L2CS_BBUS_W_SHIFT ) #define L2CACHE_L2CS_WAY_SIZE_SHIFT 2 #define L2CACHE_L2CS_WAY_SIZE_MASK 0x1ffcU #define L2CACHE_L2CS_WAY_SIZE_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x7ffU ) -#define L2CACHE_L2CS_WAY_SIZE( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & L2CACHE_L2CS_WAY_SIZE_MASK ) >> L2CACHE_L2CS_WAY_SIZE_SHIFT ) +#define L2CACHE_L2CS_WAY_SIZE( _val ) \ + ( ( _val ) << L2CACHE_L2CS_WAY_SIZE_SHIFT ) #define L2CACHE_L2CS_WAY_SHIFT 0 #define L2CACHE_L2CS_WAY_MASK 0x3U #define L2CACHE_L2CS_WAY_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3U ) -#define L2CACHE_L2CS_WAY( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & L2CACHE_L2CS_WAY_MASK ) >> L2CACHE_L2CS_WAY_SHIFT ) +#define L2CACHE_L2CS_WAY( _val ) \ + ( ( _val ) << L2CACHE_L2CS_WAY_SHIFT ) /** @} */ @@ -175,16 +183,18 @@ extern "C" { #define L2CACHE_L2CFMA_ADDR_SHIFT 5 #define L2CACHE_L2CFMA_ADDR_MASK 0xffffffe0U #define L2CACHE_L2CFMA_ADDR_GET( _reg ) \ - ( ( ( _reg ) >> 5 ) & 0x7ffffffU ) -#define L2CACHE_L2CFMA_ADDR( _val ) ( ( _val ) << 5 ) + ( ( ( _reg ) & L2CACHE_L2CFMA_ADDR_MASK ) >> L2CACHE_L2CFMA_ADDR_SHIFT ) +#define L2CACHE_L2CFMA_ADDR( _val ) \ + ( ( _val ) << L2CACHE_L2CFMA_ADDR_SHIFT ) #define L2CACHE_L2CFMA_DI 0x8U #define L2CACHE_L2CFMA_FMODE_SHIFT 0 #define L2CACHE_L2CFMA_FMODE_MASK 0x7U #define L2CACHE_L2CFMA_FMODE_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7U ) -#define L2CACHE_L2CFMA_FMODE( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & L2CACHE_L2CFMA_FMODE_MASK ) >> L2CACHE_L2CFMA_FMODE_SHIFT ) +#define L2CACHE_L2CFMA_FMODE( _val ) \ + ( ( _val ) << L2CACHE_L2CFMA_FMODE_SHIFT ) /** @} */ @@ -200,14 +210,16 @@ extern "C" { #define L2CACHE_L2CFSI_INDEX_SHIFT 16 #define L2CACHE_L2CFSI_INDEX_MASK 0xffff0000U #define L2CACHE_L2CFSI_INDEX_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define L2CACHE_L2CFSI_INDEX( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & L2CACHE_L2CFSI_INDEX_MASK ) >> L2CACHE_L2CFSI_INDEX_SHIFT ) +#define L2CACHE_L2CFSI_INDEX( _val ) \ + ( ( _val ) << L2CACHE_L2CFSI_INDEX_SHIFT ) #define L2CACHE_L2CFSI_TAG_SHIFT 10 #define L2CACHE_L2CFSI_TAG_MASK 0xfffffc00U #define L2CACHE_L2CFSI_TAG_GET( _reg ) \ - ( ( ( _reg ) >> 10 ) & 0x3fffffU ) -#define L2CACHE_L2CFSI_TAG( _val ) ( ( _val ) << 10 ) + ( ( ( _reg ) & L2CACHE_L2CFSI_TAG_MASK ) >> L2CACHE_L2CFSI_TAG_SHIFT ) +#define L2CACHE_L2CFSI_TAG( _val ) \ + ( ( _val ) << L2CACHE_L2CFSI_TAG_SHIFT ) #define L2CACHE_L2CFSI_FL 0x200U @@ -218,8 +230,9 @@ extern "C" { #define L2CACHE_L2CFSI_WAY_SHIFT 4 #define L2CACHE_L2CFSI_WAY_MASK 0x30U #define L2CACHE_L2CFSI_WAY_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0x3U ) -#define L2CACHE_L2CFSI_WAY( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & L2CACHE_L2CFSI_WAY_MASK ) >> L2CACHE_L2CFSI_WAY_SHIFT ) +#define L2CACHE_L2CFSI_WAY( _val ) \ + ( ( _val ) << L2CACHE_L2CFSI_WAY_SHIFT ) #define L2CACHE_L2CFSI_DI 0x8U @@ -228,8 +241,9 @@ extern "C" { #define L2CACHE_L2CFSI_FMODE_SHIFT 0 #define L2CACHE_L2CFSI_FMODE_MASK 0x3U #define L2CACHE_L2CFSI_FMODE_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3U ) -#define L2CACHE_L2CFSI_FMODE( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & L2CACHE_L2CFSI_FMODE_MASK ) >> L2CACHE_L2CFSI_FMODE_SHIFT ) +#define L2CACHE_L2CFSI_FMODE( _val ) \ + ( ( _val ) << L2CACHE_L2CFSI_FMODE_SHIFT ) /** @} */ @@ -245,16 +259,18 @@ extern "C" { #define L2CACHE_L2CERR_AHB_MASTER_INDEX_SHIFT 28 #define L2CACHE_L2CERR_AHB_MASTER_INDEX_MASK 0xf0000000U #define L2CACHE_L2CERR_AHB_MASTER_INDEX_GET( _reg ) \ - ( ( ( _reg ) >> 28 ) & 0xfU ) -#define L2CACHE_L2CERR_AHB_MASTER_INDEX( _val ) ( ( _val ) << 28 ) + ( ( ( _reg ) & L2CACHE_L2CERR_AHB_MASTER_INDEX_MASK ) >> L2CACHE_L2CERR_AHB_MASTER_INDEX_SHIFT ) +#define L2CACHE_L2CERR_AHB_MASTER_INDEX( _val ) \ + ( ( _val ) << L2CACHE_L2CERR_AHB_MASTER_INDEX_SHIFT ) #define L2CACHE_L2CERR_SCRUB 0x8000000U #define L2CACHE_L2CERR_TYPE_SHIFT 24 #define L2CACHE_L2CERR_TYPE_MASK 0x7000000U #define L2CACHE_L2CERR_TYPE_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0x7U ) -#define L2CACHE_L2CERR_TYPE( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & L2CACHE_L2CERR_TYPE_MASK ) >> L2CACHE_L2CERR_TYPE_SHIFT ) +#define L2CACHE_L2CERR_TYPE( _val ) \ + ( ( _val ) << L2CACHE_L2CERR_TYPE_SHIFT ) #define L2CACHE_L2CERR_TAG_DATA 0x800000U @@ -269,32 +285,37 @@ extern "C" { #define L2CACHE_L2CERR_CORRECTABLE_ERROR_COUNTER_SHIFT 16 #define L2CACHE_L2CERR_CORRECTABLE_ERROR_COUNTER_MASK 0x70000U #define L2CACHE_L2CERR_CORRECTABLE_ERROR_COUNTER_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x7U ) -#define L2CACHE_L2CERR_CORRECTABLE_ERROR_COUNTER( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & L2CACHE_L2CERR_CORRECTABLE_ERROR_COUNTER_MASK ) >> L2CACHE_L2CERR_CORRECTABLE_ERROR_COUNTER_SHIFT ) +#define L2CACHE_L2CERR_CORRECTABLE_ERROR_COUNTER( _val ) \ + ( ( _val ) << L2CACHE_L2CERR_CORRECTABLE_ERROR_COUNTER_SHIFT ) #define L2CACHE_L2CERR_IRQ_PENDING_SHIFT 12 #define L2CACHE_L2CERR_IRQ_PENDING_MASK 0xf000U #define L2CACHE_L2CERR_IRQ_PENDING_GET( _reg ) \ - ( ( ( _reg ) >> 12 ) & 0xfU ) -#define L2CACHE_L2CERR_IRQ_PENDING( _val ) ( ( _val ) << 12 ) + ( ( ( _reg ) & L2CACHE_L2CERR_IRQ_PENDING_MASK ) >> L2CACHE_L2CERR_IRQ_PENDING_SHIFT ) +#define L2CACHE_L2CERR_IRQ_PENDING( _val ) \ + ( ( _val ) << L2CACHE_L2CERR_IRQ_PENDING_SHIFT ) #define L2CACHE_L2CERR_IRQ_MASK_SHIFT 8 #define L2CACHE_L2CERR_IRQ_MASK_MASK 0xf00U #define L2CACHE_L2CERR_IRQ_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xfU ) -#define L2CACHE_L2CERR_IRQ_MASK( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & L2CACHE_L2CERR_IRQ_MASK_MASK ) >> L2CACHE_L2CERR_IRQ_MASK_SHIFT ) +#define L2CACHE_L2CERR_IRQ_MASK( _val ) \ + ( ( _val ) << L2CACHE_L2CERR_IRQ_MASK_SHIFT ) #define L2CACHE_L2CERR_SELECT_CB_SHIFT 6 #define L2CACHE_L2CERR_SELECT_CB_MASK 0xc0U #define L2CACHE_L2CERR_SELECT_CB_GET( _reg ) \ - ( ( ( _reg ) >> 6 ) & 0x3U ) -#define L2CACHE_L2CERR_SELECT_CB( _val ) ( ( _val ) << 6 ) + ( ( ( _reg ) & L2CACHE_L2CERR_SELECT_CB_MASK ) >> L2CACHE_L2CERR_SELECT_CB_SHIFT ) +#define L2CACHE_L2CERR_SELECT_CB( _val ) \ + ( ( _val ) << L2CACHE_L2CERR_SELECT_CB_SHIFT ) #define L2CACHE_L2CERR_SELECT_TCB_SHIFT 4 #define L2CACHE_L2CERR_SELECT_TCB_MASK 0x30U #define L2CACHE_L2CERR_SELECT_TCB_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0x3U ) -#define L2CACHE_L2CERR_SELECT_TCB( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & L2CACHE_L2CERR_SELECT_TCB_MASK ) >> L2CACHE_L2CERR_SELECT_TCB_SHIFT ) +#define L2CACHE_L2CERR_SELECT_TCB( _val ) \ + ( ( _val ) << L2CACHE_L2CERR_SELECT_TCB_SHIFT ) #define L2CACHE_L2CERR_XCB 0x8U @@ -318,8 +339,9 @@ extern "C" { #define L2CACHE_L2CERRA_EADDR_SHIFT 0 #define L2CACHE_L2CERRA_EADDR_MASK 0xffffffffU #define L2CACHE_L2CERRA_EADDR_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define L2CACHE_L2CERRA_EADDR( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & L2CACHE_L2CERRA_EADDR_MASK ) >> L2CACHE_L2CERRA_EADDR_SHIFT ) +#define L2CACHE_L2CERRA_EADDR( _val ) \ + ( ( _val ) << L2CACHE_L2CERRA_EADDR_SHIFT ) /** @} */ @@ -334,8 +356,9 @@ extern "C" { #define L2CACHE_L2CTCB_TCB_SHIFT 0 #define L2CACHE_L2CTCB_TCB_MASK 0x7fU #define L2CACHE_L2CTCB_TCB_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7fU ) -#define L2CACHE_L2CTCB_TCB( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & L2CACHE_L2CTCB_TCB_MASK ) >> L2CACHE_L2CTCB_TCB_SHIFT ) +#define L2CACHE_L2CTCB_TCB( _val ) \ + ( ( _val ) << L2CACHE_L2CTCB_TCB_SHIFT ) /** @} */ @@ -350,8 +373,9 @@ extern "C" { #define L2CACHE_L2CCB_CB_SHIFT 0 #define L2CACHE_L2CCB_CB_MASK 0xfffffffU #define L2CACHE_L2CCB_CB_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfffffffU ) -#define L2CACHE_L2CCB_CB( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & L2CACHE_L2CCB_CB_MASK ) >> L2CACHE_L2CCB_CB_SHIFT ) +#define L2CACHE_L2CCB_CB( _val ) \ + ( ( _val ) << L2CACHE_L2CCB_CB_SHIFT ) /** @} */ @@ -367,14 +391,16 @@ extern "C" { #define L2CACHE_L2CSCRUB_INDEX_SHIFT 16 #define L2CACHE_L2CSCRUB_INDEX_MASK 0xffff0000U #define L2CACHE_L2CSCRUB_INDEX_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define L2CACHE_L2CSCRUB_INDEX( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & L2CACHE_L2CSCRUB_INDEX_MASK ) >> L2CACHE_L2CSCRUB_INDEX_SHIFT ) +#define L2CACHE_L2CSCRUB_INDEX( _val ) \ + ( ( _val ) << L2CACHE_L2CSCRUB_INDEX_SHIFT ) #define L2CACHE_L2CSCRUB_WAY_SHIFT 2 #define L2CACHE_L2CSCRUB_WAY_MASK 0xcU #define L2CACHE_L2CSCRUB_WAY_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x3U ) -#define L2CACHE_L2CSCRUB_WAY( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & L2CACHE_L2CSCRUB_WAY_MASK ) >> L2CACHE_L2CSCRUB_WAY_SHIFT ) +#define L2CACHE_L2CSCRUB_WAY( _val ) \ + ( ( _val ) << L2CACHE_L2CSCRUB_WAY_SHIFT ) #define L2CACHE_L2CSCRUB_PEN 0x2U @@ -393,8 +419,9 @@ extern "C" { #define L2CACHE_L2CSDEL_DEL_SHIFT 0 #define L2CACHE_L2CSDEL_DEL_MASK 0xffffU #define L2CACHE_L2CSDEL_DEL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define L2CACHE_L2CSDEL_DEL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & L2CACHE_L2CSDEL_DEL_MASK ) >> L2CACHE_L2CSDEL_DEL_SHIFT ) +#define L2CACHE_L2CSDEL_DEL( _val ) \ + ( ( _val ) << L2CACHE_L2CSDEL_DEL_SHIFT ) /** @} */ @@ -410,8 +437,9 @@ extern "C" { #define L2CACHE_L2CEINJ_ADDR_SHIFT 2 #define L2CACHE_L2CEINJ_ADDR_MASK 0xfffffffcU #define L2CACHE_L2CEINJ_ADDR_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x3fffffffU ) -#define L2CACHE_L2CEINJ_ADDR( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & L2CACHE_L2CEINJ_ADDR_MASK ) >> L2CACHE_L2CEINJ_ADDR_SHIFT ) +#define L2CACHE_L2CEINJ_ADDR( _val ) \ + ( ( _val ) << L2CACHE_L2CEINJ_ADDR_SHIFT ) #define L2CACHE_L2CEINJ_INJ 0x1U @@ -479,20 +507,23 @@ extern "C" { #define L2CACHE_L2CMTRR_ADDR_SHIFT 18 #define L2CACHE_L2CMTRR_ADDR_MASK 0xfffc0000U #define L2CACHE_L2CMTRR_ADDR_GET( _reg ) \ - ( ( ( _reg ) >> 18 ) & 0x3fffU ) -#define L2CACHE_L2CMTRR_ADDR( _val ) ( ( _val ) << 18 ) + ( ( ( _reg ) & L2CACHE_L2CMTRR_ADDR_MASK ) >> L2CACHE_L2CMTRR_ADDR_SHIFT ) +#define L2CACHE_L2CMTRR_ADDR( _val ) \ + ( ( _val ) << L2CACHE_L2CMTRR_ADDR_SHIFT ) #define L2CACHE_L2CMTRR_ACC_SHIFT 16 #define L2CACHE_L2CMTRR_ACC_MASK 0x30000U #define L2CACHE_L2CMTRR_ACC_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x3U ) -#define L2CACHE_L2CMTRR_ACC( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & L2CACHE_L2CMTRR_ACC_MASK ) >> L2CACHE_L2CMTRR_ACC_SHIFT ) +#define L2CACHE_L2CMTRR_ACC( _val ) \ + ( ( _val ) << L2CACHE_L2CMTRR_ACC_SHIFT ) #define L2CACHE_L2CMTRR_MASK_SHIFT 2 #define L2CACHE_L2CMTRR_MASK_MASK 0xfffcU #define L2CACHE_L2CMTRR_MASK_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x3fffU ) -#define L2CACHE_L2CMTRR_MASK( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & L2CACHE_L2CMTRR_MASK_MASK ) >> L2CACHE_L2CMTRR_MASK_SHIFT ) +#define L2CACHE_L2CMTRR_MASK( _val ) \ + ( ( _val ) << L2CACHE_L2CMTRR_MASK_SHIFT ) #define L2CACHE_L2CMTRR_WP 0x2U diff --git a/bsps/include/grlib/l4stat-regs.h b/bsps/include/grlib/l4stat-regs.h index b2a47e7dec..966129bc9e 100644 --- a/bsps/include/grlib/l4stat-regs.h +++ b/bsps/include/grlib/l4stat-regs.h @@ -84,8 +84,9 @@ extern "C" { #define L4STAT_CVAL_CVAL_SHIFT 0 #define L4STAT_CVAL_CVAL_MASK 0xffffffffU #define L4STAT_CVAL_CVAL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define L4STAT_CVAL_CVAL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & L4STAT_CVAL_CVAL_MASK ) >> L4STAT_CVAL_CVAL_SHIFT ) +#define L4STAT_CVAL_CVAL( _val ) \ + ( ( _val ) << L4STAT_CVAL_CVAL_SHIFT ) /** @} */ @@ -100,14 +101,16 @@ extern "C" { #define L4STAT_CCTRL_NCPU_SHIFT 28 #define L4STAT_CCTRL_NCPU_MASK 0xf0000000U #define L4STAT_CCTRL_NCPU_GET( _reg ) \ - ( ( ( _reg ) >> 28 ) & 0xfU ) -#define L4STAT_CCTRL_NCPU( _val ) ( ( _val ) << 28 ) + ( ( ( _reg ) & L4STAT_CCTRL_NCPU_MASK ) >> L4STAT_CCTRL_NCPU_SHIFT ) +#define L4STAT_CCTRL_NCPU( _val ) \ + ( ( _val ) << L4STAT_CCTRL_NCPU_SHIFT ) #define L4STAT_CCTRL_NCNT_SHIFT 23 #define L4STAT_CCTRL_NCNT_MASK 0xf800000U #define L4STAT_CCTRL_NCNT_GET( _reg ) \ - ( ( ( _reg ) >> 23 ) & 0x1fU ) -#define L4STAT_CCTRL_NCNT( _val ) ( ( _val ) << 23 ) + ( ( ( _reg ) & L4STAT_CCTRL_NCNT_MASK ) >> L4STAT_CCTRL_NCNT_SHIFT ) +#define L4STAT_CCTRL_NCNT( _val ) \ + ( ( _val ) << L4STAT_CCTRL_NCNT_SHIFT ) #define L4STAT_CCTRL_MC 0x400000U @@ -126,8 +129,9 @@ extern "C" { #define L4STAT_CCTRL_SU_SHIFT 14 #define L4STAT_CCTRL_SU_MASK 0xc000U #define L4STAT_CCTRL_SU_GET( _reg ) \ - ( ( ( _reg ) >> 14 ) & 0x3U ) -#define L4STAT_CCTRL_SU( _val ) ( ( _val ) << 14 ) + ( ( ( _reg ) & L4STAT_CCTRL_SU_MASK ) >> L4STAT_CCTRL_SU_SHIFT ) +#define L4STAT_CCTRL_SU( _val ) \ + ( ( _val ) << L4STAT_CCTRL_SU_SHIFT ) #define L4STAT_CCTRL_CL 0x2000U @@ -136,14 +140,16 @@ extern "C" { #define L4STAT_CCTRL_EVENT_ID_SHIFT 4 #define L4STAT_CCTRL_EVENT_ID_MASK 0xff0U #define L4STAT_CCTRL_EVENT_ID_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0xffU ) -#define L4STAT_CCTRL_EVENT_ID( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & L4STAT_CCTRL_EVENT_ID_MASK ) >> L4STAT_CCTRL_EVENT_ID_SHIFT ) +#define L4STAT_CCTRL_EVENT_ID( _val ) \ + ( ( _val ) << L4STAT_CCTRL_EVENT_ID_SHIFT ) #define L4STAT_CCTRL_CPU_AHBM_SHIFT 0 #define L4STAT_CCTRL_CPU_AHBM_MASK 0xfU #define L4STAT_CCTRL_CPU_AHBM_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfU ) -#define L4STAT_CCTRL_CPU_AHBM( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & L4STAT_CCTRL_CPU_AHBM_MASK ) >> L4STAT_CCTRL_CPU_AHBM_SHIFT ) +#define L4STAT_CCTRL_CPU_AHBM( _val ) \ + ( ( _val ) << L4STAT_CCTRL_CPU_AHBM_SHIFT ) /** @} */ @@ -159,8 +165,9 @@ extern "C" { #define L4STAT_CSVAL_CSVAL_SHIFT 0 #define L4STAT_CSVAL_CSVAL_MASK 0xffffffffU #define L4STAT_CSVAL_CSVAL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define L4STAT_CSVAL_CSVAL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & L4STAT_CSVAL_CSVAL_MASK ) >> L4STAT_CSVAL_CSVAL_SHIFT ) +#define L4STAT_CSVAL_CSVAL( _val ) \ + ( ( _val ) << L4STAT_CSVAL_CSVAL_SHIFT ) /** @} */ @@ -175,8 +182,9 @@ extern "C" { #define L4STAT_TSTAMP_TSTAMP_SHIFT 0 #define L4STAT_TSTAMP_TSTAMP_MASK 0xffffffffU #define L4STAT_TSTAMP_TSTAMP_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define L4STAT_TSTAMP_TSTAMP( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & L4STAT_TSTAMP_TSTAMP_MASK ) >> L4STAT_TSTAMP_TSTAMP_SHIFT ) +#define L4STAT_TSTAMP_TSTAMP( _val ) \ + ( ( _val ) << L4STAT_TSTAMP_TSTAMP_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/memscrub-regs.h b/bsps/include/grlib/memscrub-regs.h index 8c326795a5..d6ee7a6b48 100644 --- a/bsps/include/grlib/memscrub-regs.h +++ b/bsps/include/grlib/memscrub-regs.h @@ -84,14 +84,16 @@ extern "C" { #define MEMSCRUB_AHBS_CECNT_SHIFT 22 #define MEMSCRUB_AHBS_CECNT_MASK 0xffc00000U #define MEMSCRUB_AHBS_CECNT_GET( _reg ) \ - ( ( ( _reg ) >> 22 ) & 0x3ffU ) -#define MEMSCRUB_AHBS_CECNT( _val ) ( ( _val ) << 22 ) + ( ( ( _reg ) & MEMSCRUB_AHBS_CECNT_MASK ) >> MEMSCRUB_AHBS_CECNT_SHIFT ) +#define MEMSCRUB_AHBS_CECNT( _val ) \ + ( ( _val ) << MEMSCRUB_AHBS_CECNT_SHIFT ) #define MEMSCRUB_AHBS_UECNT_SHIFT 14 #define MEMSCRUB_AHBS_UECNT_MASK 0x3fc000U #define MEMSCRUB_AHBS_UECNT_GET( _reg ) \ - ( ( ( _reg ) >> 14 ) & 0xffU ) -#define MEMSCRUB_AHBS_UECNT( _val ) ( ( _val ) << 14 ) + ( ( ( _reg ) & MEMSCRUB_AHBS_UECNT_MASK ) >> MEMSCRUB_AHBS_UECNT_SHIFT ) +#define MEMSCRUB_AHBS_UECNT( _val ) \ + ( ( _val ) << MEMSCRUB_AHBS_UECNT_SHIFT ) #define MEMSCRUB_AHBS_DONE 0x2000U @@ -108,14 +110,16 @@ extern "C" { #define MEMSCRUB_AHBS_HMASTER_SHIFT 3 #define MEMSCRUB_AHBS_HMASTER_MASK 0x78U #define MEMSCRUB_AHBS_HMASTER_GET( _reg ) \ - ( ( ( _reg ) >> 3 ) & 0xfU ) -#define MEMSCRUB_AHBS_HMASTER( _val ) ( ( _val ) << 3 ) + ( ( ( _reg ) & MEMSCRUB_AHBS_HMASTER_MASK ) >> MEMSCRUB_AHBS_HMASTER_SHIFT ) +#define MEMSCRUB_AHBS_HMASTER( _val ) \ + ( ( _val ) << MEMSCRUB_AHBS_HMASTER_SHIFT ) #define MEMSCRUB_AHBS_HSIZE_SHIFT 0 #define MEMSCRUB_AHBS_HSIZE_MASK 0x7U #define MEMSCRUB_AHBS_HSIZE_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7U ) -#define MEMSCRUB_AHBS_HSIZE( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & MEMSCRUB_AHBS_HSIZE_MASK ) >> MEMSCRUB_AHBS_HSIZE_SHIFT ) +#define MEMSCRUB_AHBS_HSIZE( _val ) \ + ( ( _val ) << MEMSCRUB_AHBS_HSIZE_SHIFT ) /** @} */ @@ -131,8 +135,9 @@ extern "C" { #define MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_SHIFT 0 #define MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_MASK 0xffffffffU #define MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_MASK ) >> MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_SHIFT ) +#define MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS( _val ) \ + ( ( _val ) << MEMSCRUB_AHBFAR_AHB_FAILING_ADDRESS_SHIFT ) /** @} */ @@ -148,14 +153,16 @@ extern "C" { #define MEMSCRUB_AHBERC_CECNTT_SHIFT 22 #define MEMSCRUB_AHBERC_CECNTT_MASK 0xffc00000U #define MEMSCRUB_AHBERC_CECNTT_GET( _reg ) \ - ( ( ( _reg ) >> 22 ) & 0x3ffU ) -#define MEMSCRUB_AHBERC_CECNTT( _val ) ( ( _val ) << 22 ) + ( ( ( _reg ) & MEMSCRUB_AHBERC_CECNTT_MASK ) >> MEMSCRUB_AHBERC_CECNTT_SHIFT ) +#define MEMSCRUB_AHBERC_CECNTT( _val ) \ + ( ( _val ) << MEMSCRUB_AHBERC_CECNTT_SHIFT ) #define MEMSCRUB_AHBERC_UECNTT_SHIFT 14 #define MEMSCRUB_AHBERC_UECNTT_MASK 0x3fc000U #define MEMSCRUB_AHBERC_UECNTT_GET( _reg ) \ - ( ( ( _reg ) >> 14 ) & 0xffU ) -#define MEMSCRUB_AHBERC_UECNTT( _val ) ( ( _val ) << 14 ) + ( ( ( _reg ) & MEMSCRUB_AHBERC_UECNTT_MASK ) >> MEMSCRUB_AHBERC_UECNTT_SHIFT ) +#define MEMSCRUB_AHBERC_UECNTT( _val ) \ + ( ( _val ) << MEMSCRUB_AHBERC_UECNTT_SHIFT ) #define MEMSCRUB_AHBERC_CECTE 0x2U @@ -174,22 +181,25 @@ extern "C" { #define MEMSCRUB_STAT_RUNCOUNT_SHIFT 22 #define MEMSCRUB_STAT_RUNCOUNT_MASK 0xffc00000U #define MEMSCRUB_STAT_RUNCOUNT_GET( _reg ) \ - ( ( ( _reg ) >> 22 ) & 0x3ffU ) -#define MEMSCRUB_STAT_RUNCOUNT( _val ) ( ( _val ) << 22 ) + ( ( ( _reg ) & MEMSCRUB_STAT_RUNCOUNT_MASK ) >> MEMSCRUB_STAT_RUNCOUNT_SHIFT ) +#define MEMSCRUB_STAT_RUNCOUNT( _val ) \ + ( ( _val ) << MEMSCRUB_STAT_RUNCOUNT_SHIFT ) #define MEMSCRUB_STAT_BLKCOUNT_SHIFT 14 #define MEMSCRUB_STAT_BLKCOUNT_MASK 0x3fc000U #define MEMSCRUB_STAT_BLKCOUNT_GET( _reg ) \ - ( ( ( _reg ) >> 14 ) & 0xffU ) -#define MEMSCRUB_STAT_BLKCOUNT( _val ) ( ( _val ) << 14 ) + ( ( ( _reg ) & MEMSCRUB_STAT_BLKCOUNT_MASK ) >> MEMSCRUB_STAT_BLKCOUNT_SHIFT ) +#define MEMSCRUB_STAT_BLKCOUNT( _val ) \ + ( ( _val ) << MEMSCRUB_STAT_BLKCOUNT_SHIFT ) #define MEMSCRUB_STAT_DONE 0x2000U #define MEMSCRUB_STAT_BURSTLEN_SHIFT 1 #define MEMSCRUB_STAT_BURSTLEN_MASK 0x1eU #define MEMSCRUB_STAT_BURSTLEN_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0xfU ) -#define MEMSCRUB_STAT_BURSTLEN( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & MEMSCRUB_STAT_BURSTLEN_MASK ) >> MEMSCRUB_STAT_BURSTLEN_SHIFT ) +#define MEMSCRUB_STAT_BURSTLEN( _val ) \ + ( ( _val ) << MEMSCRUB_STAT_BURSTLEN_SHIFT ) #define MEMSCRUB_STAT_ACTIVE 0x1U @@ -206,8 +216,9 @@ extern "C" { #define MEMSCRUB_CONFIG_DELAY_SHIFT 8 #define MEMSCRUB_CONFIG_DELAY_MASK 0xff00U #define MEMSCRUB_CONFIG_DELAY_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xffU ) -#define MEMSCRUB_CONFIG_DELAY( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & MEMSCRUB_CONFIG_DELAY_MASK ) >> MEMSCRUB_CONFIG_DELAY_SHIFT ) +#define MEMSCRUB_CONFIG_DELAY( _val ) \ + ( ( _val ) << MEMSCRUB_CONFIG_DELAY_SHIFT ) #define MEMSCRUB_CONFIG_IRQD 0x80U @@ -218,8 +229,9 @@ extern "C" { #define MEMSCRUB_CONFIG_MODE_SHIFT 2 #define MEMSCRUB_CONFIG_MODE_MASK 0xcU #define MEMSCRUB_CONFIG_MODE_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x3U ) -#define MEMSCRUB_CONFIG_MODE( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & MEMSCRUB_CONFIG_MODE_MASK ) >> MEMSCRUB_CONFIG_MODE_SHIFT ) +#define MEMSCRUB_CONFIG_MODE( _val ) \ + ( ( _val ) << MEMSCRUB_CONFIG_MODE_SHIFT ) #define MEMSCRUB_CONFIG_ES 0x2U @@ -238,8 +250,9 @@ extern "C" { #define MEMSCRUB_RANGEL_RLADDR_SHIFT 0 #define MEMSCRUB_RANGEL_RLADDR_MASK 0xffffffffU #define MEMSCRUB_RANGEL_RLADDR_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define MEMSCRUB_RANGEL_RLADDR( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & MEMSCRUB_RANGEL_RLADDR_MASK ) >> MEMSCRUB_RANGEL_RLADDR_SHIFT ) +#define MEMSCRUB_RANGEL_RLADDR( _val ) \ + ( ( _val ) << MEMSCRUB_RANGEL_RLADDR_SHIFT ) /** @} */ @@ -255,8 +268,9 @@ extern "C" { #define MEMSCRUB_RANGEH_RHADDR_SHIFT 0 #define MEMSCRUB_RANGEH_RHADDR_MASK 0xffffffffU #define MEMSCRUB_RANGEH_RHADDR_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define MEMSCRUB_RANGEH_RHADDR( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & MEMSCRUB_RANGEH_RHADDR_MASK ) >> MEMSCRUB_RANGEH_RHADDR_SHIFT ) +#define MEMSCRUB_RANGEH_RHADDR( _val ) \ + ( ( _val ) << MEMSCRUB_RANGEH_RHADDR_SHIFT ) /** @} */ @@ -271,8 +285,9 @@ extern "C" { #define MEMSCRUB_POS_POSITION_SHIFT 0 #define MEMSCRUB_POS_POSITION_MASK 0xffffffffU #define MEMSCRUB_POS_POSITION_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define MEMSCRUB_POS_POSITION( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & MEMSCRUB_POS_POSITION_MASK ) >> MEMSCRUB_POS_POSITION_SHIFT ) +#define MEMSCRUB_POS_POSITION( _val ) \ + ( ( _val ) << MEMSCRUB_POS_POSITION_SHIFT ) /** @} */ @@ -287,14 +302,16 @@ extern "C" { #define MEMSCRUB_ETHRES_RECT_SHIFT 22 #define MEMSCRUB_ETHRES_RECT_MASK 0xffc00000U #define MEMSCRUB_ETHRES_RECT_GET( _reg ) \ - ( ( ( _reg ) >> 22 ) & 0x3ffU ) -#define MEMSCRUB_ETHRES_RECT( _val ) ( ( _val ) << 22 ) + ( ( ( _reg ) & MEMSCRUB_ETHRES_RECT_MASK ) >> MEMSCRUB_ETHRES_RECT_SHIFT ) +#define MEMSCRUB_ETHRES_RECT( _val ) \ + ( ( _val ) << MEMSCRUB_ETHRES_RECT_SHIFT ) #define MEMSCRUB_ETHRES_BECT_SHIFT 14 #define MEMSCRUB_ETHRES_BECT_MASK 0x3fc000U #define MEMSCRUB_ETHRES_BECT_GET( _reg ) \ - ( ( ( _reg ) >> 14 ) & 0xffU ) -#define MEMSCRUB_ETHRES_BECT( _val ) ( ( _val ) << 14 ) + ( ( ( _reg ) & MEMSCRUB_ETHRES_BECT_MASK ) >> MEMSCRUB_ETHRES_BECT_SHIFT ) +#define MEMSCRUB_ETHRES_BECT( _val ) \ + ( ( _val ) << MEMSCRUB_ETHRES_BECT_SHIFT ) #define MEMSCRUB_ETHRES_RECTE 0x2U @@ -313,8 +330,9 @@ extern "C" { #define MEMSCRUB_INIT_DATA_SHIFT 0 #define MEMSCRUB_INIT_DATA_MASK 0xffffffffU #define MEMSCRUB_INIT_DATA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define MEMSCRUB_INIT_DATA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & MEMSCRUB_INIT_DATA_MASK ) >> MEMSCRUB_INIT_DATA_SHIFT ) +#define MEMSCRUB_INIT_DATA( _val ) \ + ( ( _val ) << MEMSCRUB_INIT_DATA_SHIFT ) /** @} */ @@ -330,8 +348,9 @@ extern "C" { #define MEMSCRUB_RANGEL2_RLADDR_SHIFT 0 #define MEMSCRUB_RANGEL2_RLADDR_MASK 0xffffffffU #define MEMSCRUB_RANGEL2_RLADDR_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define MEMSCRUB_RANGEL2_RLADDR( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & MEMSCRUB_RANGEL2_RLADDR_MASK ) >> MEMSCRUB_RANGEL2_RLADDR_SHIFT ) +#define MEMSCRUB_RANGEL2_RLADDR( _val ) \ + ( ( _val ) << MEMSCRUB_RANGEL2_RLADDR_SHIFT ) /** @} */ @@ -347,8 +366,9 @@ extern "C" { #define MEMSCRUB_RANGEH2_RHADDR_SHIFT 0 #define MEMSCRUB_RANGEH2_RHADDR_MASK 0xffffffffU #define MEMSCRUB_RANGEH2_RHADDR_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define MEMSCRUB_RANGEH2_RHADDR( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & MEMSCRUB_RANGEH2_RHADDR_MASK ) >> MEMSCRUB_RANGEH2_RHADDR_SHIFT ) +#define MEMSCRUB_RANGEH2_RHADDR( _val ) \ + ( ( _val ) << MEMSCRUB_RANGEH2_RHADDR_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/mmctrl-regs.h b/bsps/include/grlib/mmctrl-regs.h index a08f559bb9..918ea1b9f1 100644 --- a/bsps/include/grlib/mmctrl-regs.h +++ b/bsps/include/grlib/mmctrl-regs.h @@ -89,28 +89,32 @@ extern "C" { #define MMCTRL_SDCFG1_TRFC_SHIFT 27 #define MMCTRL_SDCFG1_TRFC_MASK 0x38000000U #define MMCTRL_SDCFG1_TRFC_GET( _reg ) \ - ( ( ( _reg ) >> 27 ) & 0x7U ) -#define MMCTRL_SDCFG1_TRFC( _val ) ( ( _val ) << 27 ) + ( ( ( _reg ) & MMCTRL_SDCFG1_TRFC_MASK ) >> MMCTRL_SDCFG1_TRFC_SHIFT ) +#define MMCTRL_SDCFG1_TRFC( _val ) \ + ( ( _val ) << MMCTRL_SDCFG1_TRFC_SHIFT ) #define MMCTRL_SDCFG1_TC 0x4000000U #define MMCTRL_SDCFG1_BANKSZ_SHIFT 23 #define MMCTRL_SDCFG1_BANKSZ_MASK 0x3800000U #define MMCTRL_SDCFG1_BANKSZ_GET( _reg ) \ - ( ( ( _reg ) >> 23 ) & 0x7U ) -#define MMCTRL_SDCFG1_BANKSZ( _val ) ( ( _val ) << 23 ) + ( ( ( _reg ) & MMCTRL_SDCFG1_BANKSZ_MASK ) >> MMCTRL_SDCFG1_BANKSZ_SHIFT ) +#define MMCTRL_SDCFG1_BANKSZ( _val ) \ + ( ( _val ) << MMCTRL_SDCFG1_BANKSZ_SHIFT ) #define MMCTRL_SDCFG1_COLSZ_SHIFT 21 #define MMCTRL_SDCFG1_COLSZ_MASK 0x600000U #define MMCTRL_SDCFG1_COLSZ_GET( _reg ) \ - ( ( ( _reg ) >> 21 ) & 0x3U ) -#define MMCTRL_SDCFG1_COLSZ( _val ) ( ( _val ) << 21 ) + ( ( ( _reg ) & MMCTRL_SDCFG1_COLSZ_MASK ) >> MMCTRL_SDCFG1_COLSZ_SHIFT ) +#define MMCTRL_SDCFG1_COLSZ( _val ) \ + ( ( _val ) << MMCTRL_SDCFG1_COLSZ_SHIFT ) #define MMCTRL_SDCFG1_COMMAND_SHIFT 18 #define MMCTRL_SDCFG1_COMMAND_MASK 0x1c0000U #define MMCTRL_SDCFG1_COMMAND_GET( _reg ) \ - ( ( ( _reg ) >> 18 ) & 0x7U ) -#define MMCTRL_SDCFG1_COMMAND( _val ) ( ( _val ) << 18 ) + ( ( ( _reg ) & MMCTRL_SDCFG1_COMMAND_MASK ) >> MMCTRL_SDCFG1_COMMAND_SHIFT ) +#define MMCTRL_SDCFG1_COMMAND( _val ) \ + ( ( _val ) << MMCTRL_SDCFG1_COMMAND_SHIFT ) #define MMCTRL_SDCFG1_MS 0x10000U @@ -119,8 +123,9 @@ extern "C" { #define MMCTRL_SDCFG1_RFLOAD_SHIFT 0 #define MMCTRL_SDCFG1_RFLOAD_MASK 0x7fffU #define MMCTRL_SDCFG1_RFLOAD_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7fffU ) -#define MMCTRL_SDCFG1_RFLOAD( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & MMCTRL_SDCFG1_RFLOAD_MASK ) >> MMCTRL_SDCFG1_RFLOAD_SHIFT ) +#define MMCTRL_SDCFG1_RFLOAD( _val ) \ + ( ( _val ) << MMCTRL_SDCFG1_RFLOAD_SHIFT ) /** @} */ @@ -154,28 +159,32 @@ extern "C" { #define MMCTRL_MUXCFG_ERRLOC_SHIFT 20 #define MMCTRL_MUXCFG_ERRLOC_MASK 0xfff00000U #define MMCTRL_MUXCFG_ERRLOC_GET( _reg ) \ - ( ( ( _reg ) >> 20 ) & 0xfffU ) -#define MMCTRL_MUXCFG_ERRLOC( _val ) ( ( _val ) << 20 ) + ( ( ( _reg ) & MMCTRL_MUXCFG_ERRLOC_MASK ) >> MMCTRL_MUXCFG_ERRLOC_SHIFT ) +#define MMCTRL_MUXCFG_ERRLOC( _val ) \ + ( ( _val ) << MMCTRL_MUXCFG_ERRLOC_SHIFT ) #define MMCTRL_MUXCFG_DDERR 0x80000U #define MMCTRL_MUXCFG_DWIDTH_SHIFT 16 #define MMCTRL_MUXCFG_DWIDTH_MASK 0x70000U #define MMCTRL_MUXCFG_DWIDTH_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x7U ) -#define MMCTRL_MUXCFG_DWIDTH( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & MMCTRL_MUXCFG_DWIDTH_MASK ) >> MMCTRL_MUXCFG_DWIDTH_SHIFT ) +#define MMCTRL_MUXCFG_DWIDTH( _val ) \ + ( ( _val ) << MMCTRL_MUXCFG_DWIDTH_SHIFT ) #define MMCTRL_MUXCFG_BEID_SHIFT 12 #define MMCTRL_MUXCFG_BEID_MASK 0xf000U #define MMCTRL_MUXCFG_BEID_GET( _reg ) \ - ( ( ( _reg ) >> 12 ) & 0xfU ) -#define MMCTRL_MUXCFG_BEID( _val ) ( ( _val ) << 12 ) + ( ( ( _reg ) & MMCTRL_MUXCFG_BEID_MASK ) >> MMCTRL_MUXCFG_BEID_SHIFT ) +#define MMCTRL_MUXCFG_BEID( _val ) \ + ( ( _val ) << MMCTRL_MUXCFG_BEID_SHIFT ) #define MMCTRL_MUXCFG_DATAMUX_SHIFT 5 #define MMCTRL_MUXCFG_DATAMUX_MASK 0xe0U #define MMCTRL_MUXCFG_DATAMUX_GET( _reg ) \ - ( ( ( _reg ) >> 5 ) & 0x7U ) -#define MMCTRL_MUXCFG_DATAMUX( _val ) ( ( _val ) << 5 ) + ( ( ( _reg ) & MMCTRL_MUXCFG_DATAMUX_MASK ) >> MMCTRL_MUXCFG_DATAMUX_SHIFT ) +#define MMCTRL_MUXCFG_DATAMUX( _val ) \ + ( ( _val ) << MMCTRL_MUXCFG_DATAMUX_SHIFT ) #define MMCTRL_MUXCFG_CEN 0x10U @@ -200,8 +209,9 @@ extern "C" { #define MMCTRL_FTDA_FTDA_SHIFT 2 #define MMCTRL_FTDA_FTDA_MASK 0xfffffffcU #define MMCTRL_FTDA_FTDA_GET( _reg ) \ - ( ( ( _reg ) >> 2 ) & 0x3fffffffU ) -#define MMCTRL_FTDA_FTDA( _val ) ( ( _val ) << 2 ) + ( ( ( _reg ) & MMCTRL_FTDA_FTDA_MASK ) >> MMCTRL_FTDA_FTDA_SHIFT ) +#define MMCTRL_FTDA_FTDA( _val ) \ + ( ( _val ) << MMCTRL_FTDA_FTDA_SHIFT ) /** @} */ @@ -216,26 +226,30 @@ extern "C" { #define MMCTRL_FTDC_CBD_SHIFT 24 #define MMCTRL_FTDC_CBD_MASK 0xff000000U #define MMCTRL_FTDC_CBD_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define MMCTRL_FTDC_CBD( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & MMCTRL_FTDC_CBD_MASK ) >> MMCTRL_FTDC_CBD_SHIFT ) +#define MMCTRL_FTDC_CBD( _val ) \ + ( ( _val ) << MMCTRL_FTDC_CBD_SHIFT ) #define MMCTRL_FTDC_CBC_SHIFT 16 #define MMCTRL_FTDC_CBC_MASK 0xff0000U #define MMCTRL_FTDC_CBC_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffU ) -#define MMCTRL_FTDC_CBC( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & MMCTRL_FTDC_CBC_MASK ) >> MMCTRL_FTDC_CBC_SHIFT ) +#define MMCTRL_FTDC_CBC( _val ) \ + ( ( _val ) << MMCTRL_FTDC_CBC_SHIFT ) #define MMCTRL_FTDC_CBB_SHIFT 8 #define MMCTRL_FTDC_CBB_MASK 0xff00U #define MMCTRL_FTDC_CBB_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xffU ) -#define MMCTRL_FTDC_CBB( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & MMCTRL_FTDC_CBB_MASK ) >> MMCTRL_FTDC_CBB_SHIFT ) +#define MMCTRL_FTDC_CBB( _val ) \ + ( ( _val ) << MMCTRL_FTDC_CBB_SHIFT ) #define MMCTRL_FTDC_CBA_SHIFT 0 #define MMCTRL_FTDC_CBA_MASK 0xffU #define MMCTRL_FTDC_CBA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define MMCTRL_FTDC_CBA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & MMCTRL_FTDC_CBA_MASK ) >> MMCTRL_FTDC_CBA_SHIFT ) +#define MMCTRL_FTDC_CBA( _val ) \ + ( ( _val ) << MMCTRL_FTDC_CBA_SHIFT ) /** @} */ @@ -250,8 +264,9 @@ extern "C" { #define MMCTRL_FTDD_DATA_SHIFT 0 #define MMCTRL_FTDD_DATA_MASK 0xffffffffU #define MMCTRL_FTDD_DATA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define MMCTRL_FTDD_DATA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & MMCTRL_FTDD_DATA_MASK ) >> MMCTRL_FTDD_DATA_SHIFT ) +#define MMCTRL_FTDD_DATA( _val ) \ + ( ( _val ) << MMCTRL_FTDD_DATA_SHIFT ) /** @} */ @@ -266,8 +281,9 @@ extern "C" { #define MMCTRL_FTBND_FTBND_31_3_SHIFT 3 #define MMCTRL_FTBND_FTBND_31_3_MASK 0xfffffff8U #define MMCTRL_FTBND_FTBND_31_3_GET( _reg ) \ - ( ( ( _reg ) >> 3 ) & 0x1fffffffU ) -#define MMCTRL_FTBND_FTBND_31_3( _val ) ( ( _val ) << 3 ) + ( ( ( _reg ) & MMCTRL_FTBND_FTBND_31_3_MASK ) >> MMCTRL_FTBND_FTBND_31_3_SHIFT ) +#define MMCTRL_FTBND_FTBND_31_3( _val ) \ + ( ( _val ) << MMCTRL_FTBND_FTBND_31_3_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/spictrl-regs.h b/bsps/include/grlib/spictrl-regs.h index 0bd2db1528..1a2efe268a 100644 --- a/bsps/include/grlib/spictrl-regs.h +++ b/bsps/include/grlib/spictrl-regs.h @@ -84,14 +84,16 @@ extern "C" { #define SPICTRL_CAP_SSSZ_SHIFT 24 #define SPICTRL_CAP_SSSZ_MASK 0xff000000U #define SPICTRL_CAP_SSSZ_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define SPICTRL_CAP_SSSZ( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & SPICTRL_CAP_SSSZ_MASK ) >> SPICTRL_CAP_SSSZ_SHIFT ) +#define SPICTRL_CAP_SSSZ( _val ) \ + ( ( _val ) << SPICTRL_CAP_SSSZ_SHIFT ) #define SPICTRL_CAP_MAXWLEN_SHIFT 20 #define SPICTRL_CAP_MAXWLEN_MASK 0xf00000U #define SPICTRL_CAP_MAXWLEN_GET( _reg ) \ - ( ( ( _reg ) >> 20 ) & 0xfU ) -#define SPICTRL_CAP_MAXWLEN( _val ) ( ( _val ) << 20 ) + ( ( ( _reg ) & SPICTRL_CAP_MAXWLEN_MASK ) >> SPICTRL_CAP_MAXWLEN_SHIFT ) +#define SPICTRL_CAP_MAXWLEN( _val ) \ + ( ( _val ) << SPICTRL_CAP_MAXWLEN_SHIFT ) #define SPICTRL_CAP_TWEN 0x80000U @@ -104,22 +106,25 @@ extern "C" { #define SPICTRL_CAP_FDEPTH_SHIFT 8 #define SPICTRL_CAP_FDEPTH_MASK 0xff00U #define SPICTRL_CAP_FDEPTH_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xffU ) -#define SPICTRL_CAP_FDEPTH( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & SPICTRL_CAP_FDEPTH_MASK ) >> SPICTRL_CAP_FDEPTH_SHIFT ) +#define SPICTRL_CAP_FDEPTH( _val ) \ + ( ( _val ) << SPICTRL_CAP_FDEPTH_SHIFT ) #define SPICTRL_CAP_SR 0x80U #define SPICTRL_CAP_FT_SHIFT 5 #define SPICTRL_CAP_FT_MASK 0x60U #define SPICTRL_CAP_FT_GET( _reg ) \ - ( ( ( _reg ) >> 5 ) & 0x3U ) -#define SPICTRL_CAP_FT( _val ) ( ( _val ) << 5 ) + ( ( ( _reg ) & SPICTRL_CAP_FT_MASK ) >> SPICTRL_CAP_FT_SHIFT ) +#define SPICTRL_CAP_FT( _val ) \ + ( ( _val ) << SPICTRL_CAP_FT_SHIFT ) #define SPICTRL_CAP_REV_SHIFT 0 #define SPICTRL_CAP_REV_MASK 0x1fU #define SPICTRL_CAP_REV_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fU ) -#define SPICTRL_CAP_REV( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPICTRL_CAP_REV_MASK ) >> SPICTRL_CAP_REV_SHIFT ) +#define SPICTRL_CAP_REV( _val ) \ + ( ( _val ) << SPICTRL_CAP_REV_SHIFT ) /** @} */ @@ -148,14 +153,16 @@ extern "C" { #define SPICTRL_MODE_LEN_SHIFT 20 #define SPICTRL_MODE_LEN_MASK 0xf00000U #define SPICTRL_MODE_LEN_GET( _reg ) \ - ( ( ( _reg ) >> 20 ) & 0xfU ) -#define SPICTRL_MODE_LEN( _val ) ( ( _val ) << 20 ) + ( ( ( _reg ) & SPICTRL_MODE_LEN_MASK ) >> SPICTRL_MODE_LEN_SHIFT ) +#define SPICTRL_MODE_LEN( _val ) \ + ( ( _val ) << SPICTRL_MODE_LEN_SHIFT ) #define SPICTRL_MODE_PM_SHIFT 16 #define SPICTRL_MODE_PM_MASK 0xf0000U #define SPICTRL_MODE_PM_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xfU ) -#define SPICTRL_MODE_PM( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & SPICTRL_MODE_PM_MASK ) >> SPICTRL_MODE_PM_SHIFT ) +#define SPICTRL_MODE_PM( _val ) \ + ( ( _val ) << SPICTRL_MODE_PM_SHIFT ) #define SPICTRL_MODE_TWEN 0x8000U @@ -168,14 +175,16 @@ extern "C" { #define SPICTRL_MODE_CG_SHIFT 7 #define SPICTRL_MODE_CG_MASK 0xf80U #define SPICTRL_MODE_CG_GET( _reg ) \ - ( ( ( _reg ) >> 7 ) & 0x1fU ) -#define SPICTRL_MODE_CG( _val ) ( ( _val ) << 7 ) + ( ( ( _reg ) & SPICTRL_MODE_CG_MASK ) >> SPICTRL_MODE_CG_SHIFT ) +#define SPICTRL_MODE_CG( _val ) \ + ( ( _val ) << SPICTRL_MODE_CG_SHIFT ) #define SPICTRL_MODE_ASELDEL_SHIFT 5 #define SPICTRL_MODE_ASELDEL_MASK 0x60U #define SPICTRL_MODE_ASELDEL_GET( _reg ) \ - ( ( ( _reg ) >> 5 ) & 0x3U ) -#define SPICTRL_MODE_ASELDEL( _val ) ( ( _val ) << 5 ) + ( ( ( _reg ) & SPICTRL_MODE_ASELDEL_MASK ) >> SPICTRL_MODE_ASELDEL_SHIFT ) +#define SPICTRL_MODE_ASELDEL( _val ) \ + ( ( _val ) << SPICTRL_MODE_ASELDEL_SHIFT ) #define SPICTRL_MODE_TAC 0x10U @@ -258,8 +267,9 @@ extern "C" { #define SPICTRL_TX_TDATA_SHIFT 0 #define SPICTRL_TX_TDATA_MASK 0xffffffffU #define SPICTRL_TX_TDATA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPICTRL_TX_TDATA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPICTRL_TX_TDATA_MASK ) >> SPICTRL_TX_TDATA_SHIFT ) +#define SPICTRL_TX_TDATA( _val ) \ + ( ( _val ) << SPICTRL_TX_TDATA_SHIFT ) /** @} */ @@ -274,8 +284,9 @@ extern "C" { #define SPICTRL_RX_RDATA_SHIFT 0 #define SPICTRL_RX_RDATA_MASK 0xffffffffU #define SPICTRL_RX_RDATA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPICTRL_RX_RDATA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPICTRL_RX_RDATA_MASK ) >> SPICTRL_RX_RDATA_SHIFT ) +#define SPICTRL_RX_RDATA( _val ) \ + ( ( _val ) << SPICTRL_RX_RDATA_SHIFT ) /** @} */ @@ -290,8 +301,9 @@ extern "C" { #define SPICTRL_SLVSEL_SLVSEL_SHIFT 0 #define SPICTRL_SLVSEL_SLVSEL_MASK 0x3U #define SPICTRL_SLVSEL_SLVSEL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3U ) -#define SPICTRL_SLVSEL_SLVSEL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPICTRL_SLVSEL_SLVSEL_MASK ) >> SPICTRL_SLVSEL_SLVSEL_SHIFT ) +#define SPICTRL_SLVSEL_SLVSEL( _val ) \ + ( ( _val ) << SPICTRL_SLVSEL_SLVSEL_SHIFT ) /** @} */ @@ -307,8 +319,9 @@ extern "C" { #define SPICTRL_ASLVSEL_ASLVSEL_SHIFT 0 #define SPICTRL_ASLVSEL_ASLVSEL_MASK 0x3U #define SPICTRL_ASLVSEL_ASLVSEL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3U ) -#define SPICTRL_ASLVSEL_ASLVSEL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPICTRL_ASLVSEL_ASLVSEL_MASK ) >> SPICTRL_ASLVSEL_ASLVSEL_SHIFT ) +#define SPICTRL_ASLVSEL_ASLVSEL( _val ) \ + ( ( _val ) << SPICTRL_ASLVSEL_ASLVSEL_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/spwpnp-regs.h b/bsps/include/grlib/spwpnp-regs.h index a697a1b333..4660bf98c1 100644 --- a/bsps/include/grlib/spwpnp-regs.h +++ b/bsps/include/grlib/spwpnp-regs.h @@ -85,14 +85,16 @@ extern "C" { #define SPWPNP_PNPVEND_VEND_SHIFT 16 #define SPWPNP_PNPVEND_VEND_MASK 0xffff0000U #define SPWPNP_PNPVEND_VEND_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define SPWPNP_PNPVEND_VEND( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & SPWPNP_PNPVEND_VEND_MASK ) >> SPWPNP_PNPVEND_VEND_SHIFT ) +#define SPWPNP_PNPVEND_VEND( _val ) \ + ( ( _val ) << SPWPNP_PNPVEND_VEND_SHIFT ) #define SPWPNP_PNPVEND_PROD_SHIFT 0 #define SPWPNP_PNPVEND_PROD_MASK 0xffffU #define SPWPNP_PNPVEND_PROD_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define SPWPNP_PNPVEND_PROD( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWPNP_PNPVEND_PROD_MASK ) >> SPWPNP_PNPVEND_PROD_SHIFT ) +#define SPWPNP_PNPVEND_PROD( _val ) \ + ( ( _val ) << SPWPNP_PNPVEND_PROD_SHIFT ) /** @} */ @@ -108,20 +110,23 @@ extern "C" { #define SPWPNP_PNPVER_MAJOR_SHIFT 24 #define SPWPNP_PNPVER_MAJOR_MASK 0xff000000U #define SPWPNP_PNPVER_MAJOR_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define SPWPNP_PNPVER_MAJOR( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & SPWPNP_PNPVER_MAJOR_MASK ) >> SPWPNP_PNPVER_MAJOR_SHIFT ) +#define SPWPNP_PNPVER_MAJOR( _val ) \ + ( ( _val ) << SPWPNP_PNPVER_MAJOR_SHIFT ) #define SPWPNP_PNPVER_MINOR_SHIFT 16 #define SPWPNP_PNPVER_MINOR_MASK 0xff0000U #define SPWPNP_PNPVER_MINOR_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffU ) -#define SPWPNP_PNPVER_MINOR( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & SPWPNP_PNPVER_MINOR_MASK ) >> SPWPNP_PNPVER_MINOR_SHIFT ) +#define SPWPNP_PNPVER_MINOR( _val ) \ + ( ( _val ) << SPWPNP_PNPVER_MINOR_SHIFT ) #define SPWPNP_PNPVER_PATCH_SHIFT 8 #define SPWPNP_PNPVER_PATCH_MASK 0xff00U #define SPWPNP_PNPVER_PATCH_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xffU ) -#define SPWPNP_PNPVER_PATCH( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & SPWPNP_PNPVER_PATCH_MASK ) >> SPWPNP_PNPVER_PATCH_SHIFT ) +#define SPWPNP_PNPVER_PATCH( _val ) \ + ( ( _val ) << SPWPNP_PNPVER_PATCH_SHIFT ) /** @} */ @@ -137,8 +142,9 @@ extern "C" { #define SPWPNP_PNPDEVSTS_STATUS_SHIFT 0 #define SPWPNP_PNPDEVSTS_STATUS_MASK 0xffU #define SPWPNP_PNPDEVSTS_STATUS_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define SPWPNP_PNPDEVSTS_STATUS( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWPNP_PNPDEVSTS_STATUS_MASK ) >> SPWPNP_PNPDEVSTS_STATUS_SHIFT ) +#define SPWPNP_PNPDEVSTS_STATUS( _val ) \ + ( ( _val ) << SPWPNP_PNPDEVSTS_STATUS_SHIFT ) /** @} */ @@ -154,8 +160,9 @@ extern "C" { #define SPWPNP_PNPACTLNK_ACTIVE_SHIFT 1 #define SPWPNP_PNPACTLNK_ACTIVE_MASK 0xfffffffeU #define SPWPNP_PNPACTLNK_ACTIVE_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0x7fffffffU ) -#define SPWPNP_PNPACTLNK_ACTIVE( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & SPWPNP_PNPACTLNK_ACTIVE_MASK ) >> SPWPNP_PNPACTLNK_ACTIVE_SHIFT ) +#define SPWPNP_PNPACTLNK_ACTIVE( _val ) \ + ( ( _val ) << SPWPNP_PNPACTLNK_ACTIVE_SHIFT ) /** @} */ @@ -171,8 +178,9 @@ extern "C" { #define SPWPNP_PNPOA0_RA_SHIFT 0 #define SPWPNP_PNPOA0_RA_MASK 0xffffffffU #define SPWPNP_PNPOA0_RA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWPNP_PNPOA0_RA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWPNP_PNPOA0_RA_MASK ) >> SPWPNP_PNPOA0_RA_SHIFT ) +#define SPWPNP_PNPOA0_RA( _val ) \ + ( ( _val ) << SPWPNP_PNPOA0_RA_SHIFT ) /** @} */ @@ -188,8 +196,9 @@ extern "C" { #define SPWPNP_PNPOA1_RA_SHIFT 0 #define SPWPNP_PNPOA1_RA_MASK 0xffffffffU #define SPWPNP_PNPOA1_RA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWPNP_PNPOA1_RA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWPNP_PNPOA1_RA_MASK ) >> SPWPNP_PNPOA1_RA_SHIFT ) +#define SPWPNP_PNPOA1_RA( _val ) \ + ( ( _val ) << SPWPNP_PNPOA1_RA_SHIFT ) /** @} */ @@ -205,8 +214,9 @@ extern "C" { #define SPWPNP_PNPOA2_RA_SHIFT 0 #define SPWPNP_PNPOA2_RA_MASK 0xffffffffU #define SPWPNP_PNPOA2_RA_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWPNP_PNPOA2_RA( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWPNP_PNPOA2_RA_MASK ) >> SPWPNP_PNPOA2_RA_SHIFT ) +#define SPWPNP_PNPOA2_RA( _val ) \ + ( ( _val ) << SPWPNP_PNPOA2_RA_SHIFT ) /** @} */ @@ -222,8 +232,9 @@ extern "C" { #define SPWPNP_PNPDEVID_DID_SHIFT 0 #define SPWPNP_PNPDEVID_DID_MASK 0xffffffffU #define SPWPNP_PNPDEVID_DID_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWPNP_PNPDEVID_DID( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWPNP_PNPDEVID_DID_MASK ) >> SPWPNP_PNPDEVID_DID_SHIFT ) +#define SPWPNP_PNPDEVID_DID( _val ) \ + ( ( _val ) << SPWPNP_PNPDEVID_DID_SHIFT ) /** @} */ @@ -239,14 +250,16 @@ extern "C" { #define SPWPNP_PNPUVEND_VEND_SHIFT 16 #define SPWPNP_PNPUVEND_VEND_MASK 0xffff0000U #define SPWPNP_PNPUVEND_VEND_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define SPWPNP_PNPUVEND_VEND( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & SPWPNP_PNPUVEND_VEND_MASK ) >> SPWPNP_PNPUVEND_VEND_SHIFT ) +#define SPWPNP_PNPUVEND_VEND( _val ) \ + ( ( _val ) << SPWPNP_PNPUVEND_VEND_SHIFT ) #define SPWPNP_PNPUVEND_PROD_SHIFT 0 #define SPWPNP_PNPUVEND_PROD_MASK 0xffffU #define SPWPNP_PNPUVEND_PROD_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define SPWPNP_PNPUVEND_PROD( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWPNP_PNPUVEND_PROD_MASK ) >> SPWPNP_PNPUVEND_PROD_SHIFT ) +#define SPWPNP_PNPUVEND_PROD( _val ) \ + ( ( _val ) << SPWPNP_PNPUVEND_PROD_SHIFT ) /** @} */ @@ -262,8 +275,9 @@ extern "C" { #define SPWPNP_PNPUSN_USN_SHIFT 0 #define SPWPNP_PNPUSN_USN_MASK 0xffffffffU #define SPWPNP_PNPUSN_USN_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWPNP_PNPUSN_USN( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWPNP_PNPUSN_USN_MASK ) >> SPWPNP_PNPUSN_USN_SHIFT ) +#define SPWPNP_PNPUSN_USN( _val ) \ + ( ( _val ) << SPWPNP_PNPUSN_USN_SHIFT ) /** @} */ @@ -279,8 +293,9 @@ extern "C" { #define SPWPNP_PNPVSTRL_LEN_SHIFT 0 #define SPWPNP_PNPVSTRL_LEN_MASK 0x7fffU #define SPWPNP_PNPVSTRL_LEN_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7fffU ) -#define SPWPNP_PNPVSTRL_LEN( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWPNP_PNPVSTRL_LEN_MASK ) >> SPWPNP_PNPVSTRL_LEN_SHIFT ) +#define SPWPNP_PNPVSTRL_LEN( _val ) \ + ( ( _val ) << SPWPNP_PNPVSTRL_LEN_SHIFT ) /** @} */ @@ -296,8 +311,9 @@ extern "C" { #define SPWPNP_PNPPSTRL_LEN_SHIFT 0 #define SPWPNP_PNPPSTRL_LEN_MASK 0x7fffU #define SPWPNP_PNPPSTRL_LEN_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7fffU ) -#define SPWPNP_PNPPSTRL_LEN( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWPNP_PNPPSTRL_LEN_MASK ) >> SPWPNP_PNPPSTRL_LEN_SHIFT ) +#define SPWPNP_PNPPSTRL_LEN( _val ) \ + ( ( _val ) << SPWPNP_PNPPSTRL_LEN_SHIFT ) /** @} */ @@ -313,8 +329,9 @@ extern "C" { #define SPWPNP_PNPPCNT_PC_SHIFT 0 #define SPWPNP_PNPPCNT_PC_MASK 0x1fU #define SPWPNP_PNPPCNT_PC_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fU ) -#define SPWPNP_PNPPCNT_PC( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWPNP_PNPPCNT_PC_MASK ) >> SPWPNP_PNPPCNT_PC_SHIFT ) +#define SPWPNP_PNPPCNT_PC( _val ) \ + ( ( _val ) << SPWPNP_PNPPCNT_PC_SHIFT ) /** @} */ @@ -330,8 +347,9 @@ extern "C" { #define SPWPNP_PNPACNT_AC_SHIFT 0 #define SPWPNP_PNPACNT_AC_MASK 0xffU #define SPWPNP_PNPACNT_AC_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define SPWPNP_PNPACNT_AC( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWPNP_PNPACNT_AC_MASK ) >> SPWPNP_PNPACNT_AC_SHIFT ) +#define SPWPNP_PNPACNT_AC( _val ) \ + ( ( _val ) << SPWPNP_PNPACNT_AC_SHIFT ) /** @} */ diff --git a/bsps/include/grlib/spwrmap-regs.h b/bsps/include/grlib/spwrmap-regs.h index e0cd8de786..bc08dbcd37 100644 --- a/bsps/include/grlib/spwrmap-regs.h +++ b/bsps/include/grlib/spwrmap-regs.h @@ -87,8 +87,9 @@ extern "C" { #define SPWRMAP_RTPMAP_PE_SHIFT 1 #define SPWRMAP_RTPMAP_PE_MASK 0x1ffeU #define SPWRMAP_RTPMAP_PE_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0xfffU ) -#define SPWRMAP_RTPMAP_PE( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & SPWRMAP_RTPMAP_PE_MASK ) >> SPWRMAP_RTPMAP_PE_SHIFT ) +#define SPWRMAP_RTPMAP_PE( _val ) \ + ( ( _val ) << SPWRMAP_RTPMAP_PE_SHIFT ) #define SPWRMAP_RTPMAP_PD 0x1U @@ -142,8 +143,9 @@ extern "C" { #define SPWRMAP_PCTRL_RD_SHIFT 24 #define SPWRMAP_PCTRL_RD_MASK 0xff000000U #define SPWRMAP_PCTRL_RD_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define SPWRMAP_PCTRL_RD( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & SPWRMAP_PCTRL_RD_MASK ) >> SPWRMAP_PCTRL_RD_SHIFT ) +#define SPWRMAP_PCTRL_RD( _val ) \ + ( ( _val ) << SPWRMAP_PCTRL_RD_SHIFT ) #define SPWRMAP_PCTRL_ST 0x200000U @@ -211,8 +213,9 @@ extern "C" { #define SPWRMAP_PSTSCFG_EC_SHIFT 20 #define SPWRMAP_PSTSCFG_EC_MASK 0xf00000U #define SPWRMAP_PSTSCFG_EC_GET( _reg ) \ - ( ( ( _reg ) >> 20 ) & 0xfU ) -#define SPWRMAP_PSTSCFG_EC( _val ) ( ( _val ) << 20 ) + ( ( ( _reg ) & SPWRMAP_PSTSCFG_EC_MASK ) >> SPWRMAP_PSTSCFG_EC_SHIFT ) +#define SPWRMAP_PSTSCFG_EC( _val ) \ + ( ( _val ) << SPWRMAP_PSTSCFG_EC_SHIFT ) #define SPWRMAP_PSTSCFG_TS 0x40000U @@ -221,16 +224,18 @@ extern "C" { #define SPWRMAP_PSTSCFG_IP_SHIFT 7 #define SPWRMAP_PSTSCFG_IP_MASK 0xf80U #define SPWRMAP_PSTSCFG_IP_GET( _reg ) \ - ( ( ( _reg ) >> 7 ) & 0x1fU ) -#define SPWRMAP_PSTSCFG_IP( _val ) ( ( _val ) << 7 ) + ( ( ( _reg ) & SPWRMAP_PSTSCFG_IP_MASK ) >> SPWRMAP_PSTSCFG_IP_SHIFT ) +#define SPWRMAP_PSTSCFG_IP( _val ) \ + ( ( _val ) << SPWRMAP_PSTSCFG_IP_SHIFT ) #define SPWRMAP_PSTSCFG_CP 0x10U #define SPWRMAP_PSTSCFG_PC_SHIFT 0 #define SPWRMAP_PSTSCFG_PC_MASK 0xfU #define SPWRMAP_PSTSCFG_PC_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xfU ) -#define SPWRMAP_PSTSCFG_PC( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_PSTSCFG_PC_MASK ) >> SPWRMAP_PSTSCFG_PC_SHIFT ) +#define SPWRMAP_PSTSCFG_PC( _val ) \ + ( ( _val ) << SPWRMAP_PSTSCFG_PC_SHIFT ) /** @} */ @@ -246,8 +251,9 @@ extern "C" { #define SPWRMAP_PSTS_PT_SHIFT 30 #define SPWRMAP_PSTS_PT_MASK 0xc0000000U #define SPWRMAP_PSTS_PT_GET( _reg ) \ - ( ( ( _reg ) >> 30 ) & 0x3U ) -#define SPWRMAP_PSTS_PT( _val ) ( ( _val ) << 30 ) + ( ( ( _reg ) & SPWRMAP_PSTS_PT_MASK ) >> SPWRMAP_PSTS_PT_SHIFT ) +#define SPWRMAP_PSTS_PT( _val ) \ + ( ( _val ) << SPWRMAP_PSTS_PT_SHIFT ) #define SPWRMAP_PSTS_PL 0x20000000U @@ -274,14 +280,16 @@ extern "C" { #define SPWRMAP_PSTS_LS_SHIFT 12 #define SPWRMAP_PSTS_LS_MASK 0x7000U #define SPWRMAP_PSTS_LS_GET( _reg ) \ - ( ( ( _reg ) >> 12 ) & 0x7U ) -#define SPWRMAP_PSTS_LS( _val ) ( ( _val ) << 12 ) + ( ( ( _reg ) & SPWRMAP_PSTS_LS_MASK ) >> SPWRMAP_PSTS_LS_SHIFT ) +#define SPWRMAP_PSTS_LS( _val ) \ + ( ( _val ) << SPWRMAP_PSTS_LS_SHIFT ) #define SPWRMAP_PSTS_IP_SHIFT 7 #define SPWRMAP_PSTS_IP_MASK 0xf80U #define SPWRMAP_PSTS_IP_GET( _reg ) \ - ( ( ( _reg ) >> 7 ) & 0x1fU ) -#define SPWRMAP_PSTS_IP( _val ) ( ( _val ) << 7 ) + ( ( ( _reg ) & SPWRMAP_PSTS_IP_MASK ) >> SPWRMAP_PSTS_IP_SHIFT ) +#define SPWRMAP_PSTS_IP( _val ) \ + ( ( _val ) << SPWRMAP_PSTS_IP_SHIFT ) #define SPWRMAP_PSTS_PR 0x40U @@ -311,8 +319,9 @@ extern "C" { #define SPWRMAP_PTIMER_RL_SHIFT 0 #define SPWRMAP_PTIMER_RL_MASK 0xffffU #define SPWRMAP_PTIMER_RL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define SPWRMAP_PTIMER_RL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_PTIMER_RL_MASK ) >> SPWRMAP_PTIMER_RL_SHIFT ) +#define SPWRMAP_PTIMER_RL( _val ) \ + ( ( _val ) << SPWRMAP_PTIMER_RL_SHIFT ) /** @} */ @@ -328,14 +337,16 @@ extern "C" { #define SPWRMAP_PCTRL2CFG_SM_SHIFT 24 #define SPWRMAP_PCTRL2CFG_SM_MASK 0xff000000U #define SPWRMAP_PCTRL2CFG_SM_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define SPWRMAP_PCTRL2CFG_SM( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & SPWRMAP_PCTRL2CFG_SM_MASK ) >> SPWRMAP_PCTRL2CFG_SM_SHIFT ) +#define SPWRMAP_PCTRL2CFG_SM( _val ) \ + ( ( _val ) << SPWRMAP_PCTRL2CFG_SM_SHIFT ) #define SPWRMAP_PCTRL2CFG_SV_SHIFT 16 #define SPWRMAP_PCTRL2CFG_SV_MASK 0xff0000U #define SPWRMAP_PCTRL2CFG_SV_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffU ) -#define SPWRMAP_PCTRL2CFG_SV( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & SPWRMAP_PCTRL2CFG_SV_MASK ) >> SPWRMAP_PCTRL2CFG_SV_SHIFT ) +#define SPWRMAP_PCTRL2CFG_SV( _val ) \ + ( ( _val ) << SPWRMAP_PCTRL2CFG_SV_SHIFT ) #define SPWRMAP_PCTRL2CFG_OR 0x8000U @@ -353,14 +364,16 @@ extern "C" { #define SPWRMAP_PCTRL2_SM_SHIFT 24 #define SPWRMAP_PCTRL2_SM_MASK 0xff000000U #define SPWRMAP_PCTRL2_SM_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define SPWRMAP_PCTRL2_SM( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & SPWRMAP_PCTRL2_SM_MASK ) >> SPWRMAP_PCTRL2_SM_SHIFT ) +#define SPWRMAP_PCTRL2_SM( _val ) \ + ( ( _val ) << SPWRMAP_PCTRL2_SM_SHIFT ) #define SPWRMAP_PCTRL2_SV_SHIFT 16 #define SPWRMAP_PCTRL2_SV_MASK 0xff0000U #define SPWRMAP_PCTRL2_SV_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffU ) -#define SPWRMAP_PCTRL2_SV( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & SPWRMAP_PCTRL2_SV_MASK ) >> SPWRMAP_PCTRL2_SV_SHIFT ) +#define SPWRMAP_PCTRL2_SV( _val ) \ + ( ( _val ) << SPWRMAP_PCTRL2_SV_SHIFT ) #define SPWRMAP_PCTRL2_OR 0x8000U @@ -377,8 +390,9 @@ extern "C" { #define SPWRMAP_PCTRL2_SD_SHIFT 1 #define SPWRMAP_PCTRL2_SD_MASK 0x3eU #define SPWRMAP_PCTRL2_SD_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0x1fU ) -#define SPWRMAP_PCTRL2_SD( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & SPWRMAP_PCTRL2_SD_MASK ) >> SPWRMAP_PCTRL2_SD_SHIFT ) +#define SPWRMAP_PCTRL2_SD( _val ) \ + ( ( _val ) << SPWRMAP_PCTRL2_SD_SHIFT ) #define SPWRMAP_PCTRL2_SC 0x1U @@ -396,14 +410,16 @@ extern "C" { #define SPWRMAP_RTRCFG_SP_SHIFT 27 #define SPWRMAP_RTRCFG_SP_MASK 0xf8000000U #define SPWRMAP_RTRCFG_SP_GET( _reg ) \ - ( ( ( _reg ) >> 27 ) & 0x1fU ) -#define SPWRMAP_RTRCFG_SP( _val ) ( ( _val ) << 27 ) + ( ( ( _reg ) & SPWRMAP_RTRCFG_SP_MASK ) >> SPWRMAP_RTRCFG_SP_SHIFT ) +#define SPWRMAP_RTRCFG_SP( _val ) \ + ( ( _val ) << SPWRMAP_RTRCFG_SP_SHIFT ) #define SPWRMAP_RTRCFG_AP_SHIFT 22 #define SPWRMAP_RTRCFG_AP_MASK 0x7c00000U #define SPWRMAP_RTRCFG_AP_GET( _reg ) \ - ( ( ( _reg ) >> 22 ) & 0x1fU ) -#define SPWRMAP_RTRCFG_AP( _val ) ( ( _val ) << 22 ) + ( ( ( _reg ) & SPWRMAP_RTRCFG_AP_MASK ) >> SPWRMAP_RTRCFG_AP_SHIFT ) +#define SPWRMAP_RTRCFG_AP( _val ) \ + ( ( _val ) << SPWRMAP_RTRCFG_AP_SHIFT ) #define SPWRMAP_RTRCFG_SR 0x8000U @@ -452,14 +468,16 @@ extern "C" { #define SPWRMAP_TC_CF_SHIFT 6 #define SPWRMAP_TC_CF_MASK 0xc0U #define SPWRMAP_TC_CF_GET( _reg ) \ - ( ( ( _reg ) >> 6 ) & 0x3U ) -#define SPWRMAP_TC_CF( _val ) ( ( _val ) << 6 ) + ( ( ( _reg ) & SPWRMAP_TC_CF_MASK ) >> SPWRMAP_TC_CF_SHIFT ) +#define SPWRMAP_TC_CF( _val ) \ + ( ( _val ) << SPWRMAP_TC_CF_SHIFT ) #define SPWRMAP_TC_TC_SHIFT 0 #define SPWRMAP_TC_TC_MASK 0x3fU #define SPWRMAP_TC_TC_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3fU ) -#define SPWRMAP_TC_TC( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_TC_TC_MASK ) >> SPWRMAP_TC_TC_SHIFT ) +#define SPWRMAP_TC_TC( _val ) \ + ( ( _val ) << SPWRMAP_TC_TC_SHIFT ) /** @} */ @@ -474,26 +492,30 @@ extern "C" { #define SPWRMAP_VER_MA_SHIFT 24 #define SPWRMAP_VER_MA_MASK 0xff000000U #define SPWRMAP_VER_MA_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define SPWRMAP_VER_MA( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & SPWRMAP_VER_MA_MASK ) >> SPWRMAP_VER_MA_SHIFT ) +#define SPWRMAP_VER_MA( _val ) \ + ( ( _val ) << SPWRMAP_VER_MA_SHIFT ) #define SPWRMAP_VER_MI_SHIFT 16 #define SPWRMAP_VER_MI_MASK 0xff0000U #define SPWRMAP_VER_MI_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffU ) -#define SPWRMAP_VER_MI( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & SPWRMAP_VER_MI_MASK ) >> SPWRMAP_VER_MI_SHIFT ) +#define SPWRMAP_VER_MI( _val ) \ + ( ( _val ) << SPWRMAP_VER_MI_SHIFT ) #define SPWRMAP_VER_PA_SHIFT 8 #define SPWRMAP_VER_PA_MASK 0xff00U #define SPWRMAP_VER_PA_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0xffU ) -#define SPWRMAP_VER_PA( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & SPWRMAP_VER_PA_MASK ) >> SPWRMAP_VER_PA_SHIFT ) +#define SPWRMAP_VER_PA( _val ) \ + ( ( _val ) << SPWRMAP_VER_PA_SHIFT ) #define SPWRMAP_VER_ID_SHIFT 0 #define SPWRMAP_VER_ID_MASK 0xffU #define SPWRMAP_VER_ID_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define SPWRMAP_VER_ID( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_VER_ID_MASK ) >> SPWRMAP_VER_ID_SHIFT ) +#define SPWRMAP_VER_ID( _val ) \ + ( ( _val ) << SPWRMAP_VER_ID_SHIFT ) /** @} */ @@ -508,8 +530,9 @@ extern "C" { #define SPWRMAP_IDIV_ID_SHIFT 0 #define SPWRMAP_IDIV_ID_MASK 0xffU #define SPWRMAP_IDIV_ID_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffU ) -#define SPWRMAP_IDIV_ID( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_IDIV_ID_MASK ) >> SPWRMAP_IDIV_ID_SHIFT ) +#define SPWRMAP_IDIV_ID( _val ) \ + ( ( _val ) << SPWRMAP_IDIV_ID_SHIFT ) /** @} */ @@ -537,8 +560,9 @@ extern "C" { #define SPWRMAP_PRESCALER_RL_SHIFT 0 #define SPWRMAP_PRESCALER_RL_MASK 0xffffU #define SPWRMAP_PRESCALER_RL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define SPWRMAP_PRESCALER_RL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_PRESCALER_RL_MASK ) >> SPWRMAP_PRESCALER_RL_SHIFT ) +#define SPWRMAP_PRESCALER_RL( _val ) \ + ( ( _val ) << SPWRMAP_PRESCALER_RL_SHIFT ) /** @} */ @@ -585,8 +609,9 @@ extern "C" { #define SPWRMAP_IPMASK_IE_SHIFT 0 #define SPWRMAP_IPMASK_IE_MASK 0xffffffffU #define SPWRMAP_IPMASK_IE_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWRMAP_IPMASK_IE( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_IPMASK_IE_MASK ) >> SPWRMAP_IPMASK_IE_SHIFT ) +#define SPWRMAP_IPMASK_IE( _val ) \ + ( ( _val ) << SPWRMAP_IPMASK_IE_SHIFT ) /** @} */ @@ -601,8 +626,9 @@ extern "C" { #define SPWRMAP_PIP_IP_SHIFT 0 #define SPWRMAP_PIP_IP_MASK 0xffffffffU #define SPWRMAP_PIP_IP_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWRMAP_PIP_IP( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_PIP_IP_MASK ) >> SPWRMAP_PIP_IP_SHIFT ) +#define SPWRMAP_PIP_IP( _val ) \ + ( ( _val ) << SPWRMAP_PIP_IP_SHIFT ) /** @} */ @@ -630,8 +656,9 @@ extern "C" { #define SPWRMAP_ICODEGEN_IN_SHIFT 0 #define SPWRMAP_ICODEGEN_IN_MASK 0x3fU #define SPWRMAP_ICODEGEN_IN_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3fU ) -#define SPWRMAP_ICODEGEN_IN( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_ICODEGEN_IN_MASK ) >> SPWRMAP_ICODEGEN_IN_SHIFT ) +#define SPWRMAP_ICODEGEN_IN( _val ) \ + ( ( _val ) << SPWRMAP_ICODEGEN_IN_SHIFT ) /** @} */ @@ -647,8 +674,9 @@ extern "C" { #define SPWRMAP_ISR0_IB_SHIFT 0 #define SPWRMAP_ISR0_IB_MASK 0xffffffffU #define SPWRMAP_ISR0_IB_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWRMAP_ISR0_IB( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_ISR0_IB_MASK ) >> SPWRMAP_ISR0_IB_SHIFT ) +#define SPWRMAP_ISR0_IB( _val ) \ + ( ( _val ) << SPWRMAP_ISR0_IB_SHIFT ) /** @} */ @@ -664,8 +692,9 @@ extern "C" { #define SPWRMAP_ISR1_IB_SHIFT 0 #define SPWRMAP_ISR1_IB_MASK 0xffffffffU #define SPWRMAP_ISR1_IB_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWRMAP_ISR1_IB( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_ISR1_IB_MASK ) >> SPWRMAP_ISR1_IB_SHIFT ) +#define SPWRMAP_ISR1_IB( _val ) \ + ( ( _val ) << SPWRMAP_ISR1_IB_SHIFT ) /** @} */ @@ -681,8 +710,9 @@ extern "C" { #define SPWRMAP_ISRTIMER_RL_SHIFT 0 #define SPWRMAP_ISRTIMER_RL_MASK 0xffffU #define SPWRMAP_ISRTIMER_RL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define SPWRMAP_ISRTIMER_RL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_ISRTIMER_RL_MASK ) >> SPWRMAP_ISRTIMER_RL_SHIFT ) +#define SPWRMAP_ISRTIMER_RL( _val ) \ + ( ( _val ) << SPWRMAP_ISRTIMER_RL_SHIFT ) /** @} */ @@ -698,8 +728,9 @@ extern "C" { #define SPWRMAP_AITIMER_RL_SHIFT 0 #define SPWRMAP_AITIMER_RL_MASK 0xffffU #define SPWRMAP_AITIMER_RL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define SPWRMAP_AITIMER_RL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_AITIMER_RL_MASK ) >> SPWRMAP_AITIMER_RL_SHIFT ) +#define SPWRMAP_AITIMER_RL( _val ) \ + ( ( _val ) << SPWRMAP_AITIMER_RL_SHIFT ) /** @} */ @@ -715,8 +746,9 @@ extern "C" { #define SPWRMAP_ISRCTIMER_RL_SHIFT 0 #define SPWRMAP_ISRCTIMER_RL_MASK 0x1fU #define SPWRMAP_ISRCTIMER_RL_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fU ) -#define SPWRMAP_ISRCTIMER_RL( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_ISRCTIMER_RL_MASK ) >> SPWRMAP_ISRCTIMER_RL_SHIFT ) +#define SPWRMAP_ISRCTIMER_RL( _val ) \ + ( ( _val ) << SPWRMAP_ISRCTIMER_RL_SHIFT ) /** @} */ @@ -731,8 +763,9 @@ extern "C" { #define SPWRMAP_LRUNSTAT_LR_SHIFT 1 #define SPWRMAP_LRUNSTAT_LR_MASK 0xfffffffeU #define SPWRMAP_LRUNSTAT_LR_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0x7fffffffU ) -#define SPWRMAP_LRUNSTAT_LR( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & SPWRMAP_LRUNSTAT_LR_MASK ) >> SPWRMAP_LRUNSTAT_LR_SHIFT ) +#define SPWRMAP_LRUNSTAT_LR( _val ) \ + ( ( _val ) << SPWRMAP_LRUNSTAT_LR_SHIFT ) /** @} */ @@ -747,20 +780,23 @@ extern "C" { #define SPWRMAP_CAP_AF_SHIFT 24 #define SPWRMAP_CAP_AF_MASK 0x3000000U #define SPWRMAP_CAP_AF_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0x3U ) -#define SPWRMAP_CAP_AF( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & SPWRMAP_CAP_AF_MASK ) >> SPWRMAP_CAP_AF_SHIFT ) +#define SPWRMAP_CAP_AF( _val ) \ + ( ( _val ) << SPWRMAP_CAP_AF_SHIFT ) #define SPWRMAP_CAP_PF_SHIFT 20 #define SPWRMAP_CAP_PF_MASK 0x700000U #define SPWRMAP_CAP_PF_GET( _reg ) \ - ( ( ( _reg ) >> 20 ) & 0x7U ) -#define SPWRMAP_CAP_PF( _val ) ( ( _val ) << 20 ) + ( ( ( _reg ) & SPWRMAP_CAP_PF_MASK ) >> SPWRMAP_CAP_PF_SHIFT ) +#define SPWRMAP_CAP_PF( _val ) \ + ( ( _val ) << SPWRMAP_CAP_PF_SHIFT ) #define SPWRMAP_CAP_RM_SHIFT 16 #define SPWRMAP_CAP_RM_MASK 0x70000U #define SPWRMAP_CAP_RM_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x7U ) -#define SPWRMAP_CAP_RM( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & SPWRMAP_CAP_RM_MASK ) >> SPWRMAP_CAP_RM_SHIFT ) +#define SPWRMAP_CAP_RM( _val ) \ + ( ( _val ) << SPWRMAP_CAP_RM_SHIFT ) #define SPWRMAP_CAP_AS 0x4000U @@ -775,14 +811,16 @@ extern "C" { #define SPWRMAP_CAP_PC_SHIFT 5 #define SPWRMAP_CAP_PC_MASK 0x3e0U #define SPWRMAP_CAP_PC_GET( _reg ) \ - ( ( ( _reg ) >> 5 ) & 0x1fU ) -#define SPWRMAP_CAP_PC( _val ) ( ( _val ) << 5 ) + ( ( ( _reg ) & SPWRMAP_CAP_PC_MASK ) >> SPWRMAP_CAP_PC_SHIFT ) +#define SPWRMAP_CAP_PC( _val ) \ + ( ( _val ) << SPWRMAP_CAP_PC_SHIFT ) #define SPWRMAP_CAP_CC_SHIFT 0 #define SPWRMAP_CAP_CC_MASK 0x1fU #define SPWRMAP_CAP_CC_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fU ) -#define SPWRMAP_CAP_CC( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_CAP_CC_MASK ) >> SPWRMAP_CAP_CC_SHIFT ) +#define SPWRMAP_CAP_CC( _val ) \ + ( ( _val ) << SPWRMAP_CAP_CC_SHIFT ) /** @} */ @@ -798,14 +836,16 @@ extern "C" { #define SPWRMAP_PNPVEND_VI_SHIFT 16 #define SPWRMAP_PNPVEND_VI_MASK 0xffff0000U #define SPWRMAP_PNPVEND_VI_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define SPWRMAP_PNPVEND_VI( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & SPWRMAP_PNPVEND_VI_MASK ) >> SPWRMAP_PNPVEND_VI_SHIFT ) +#define SPWRMAP_PNPVEND_VI( _val ) \ + ( ( _val ) << SPWRMAP_PNPVEND_VI_SHIFT ) #define SPWRMAP_PNPVEND_PI_SHIFT 0 #define SPWRMAP_PNPVEND_PI_MASK 0xffffU #define SPWRMAP_PNPVEND_PI_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define SPWRMAP_PNPVEND_PI( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_PNPVEND_PI_MASK ) >> SPWRMAP_PNPVEND_PI_SHIFT ) +#define SPWRMAP_PNPVEND_PI( _val ) \ + ( ( _val ) << SPWRMAP_PNPVEND_PI_SHIFT ) /** @} */ @@ -821,14 +861,16 @@ extern "C" { #define SPWRMAP_PNPUVEND_VI_SHIFT 16 #define SPWRMAP_PNPUVEND_VI_MASK 0xffff0000U #define SPWRMAP_PNPUVEND_VI_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffffU ) -#define SPWRMAP_PNPUVEND_VI( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & SPWRMAP_PNPUVEND_VI_MASK ) >> SPWRMAP_PNPUVEND_VI_SHIFT ) +#define SPWRMAP_PNPUVEND_VI( _val ) \ + ( ( _val ) << SPWRMAP_PNPUVEND_VI_SHIFT ) #define SPWRMAP_PNPUVEND_PI_SHIFT 0 #define SPWRMAP_PNPUVEND_PI_MASK 0xffffU #define SPWRMAP_PNPUVEND_PI_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define SPWRMAP_PNPUVEND_PI( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_PNPUVEND_PI_MASK ) >> SPWRMAP_PNPUVEND_PI_SHIFT ) +#define SPWRMAP_PNPUVEND_PI( _val ) \ + ( ( _val ) << SPWRMAP_PNPUVEND_PI_SHIFT ) /** @} */ @@ -844,8 +886,9 @@ extern "C" { #define SPWRMAP_PNPUSN_SN_SHIFT 0 #define SPWRMAP_PNPUSN_SN_MASK 0xffffffffU #define SPWRMAP_PNPUSN_SN_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWRMAP_PNPUSN_SN( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_PNPUSN_SN_MASK ) >> SPWRMAP_PNPUSN_SN_SHIFT ) +#define SPWRMAP_PNPUSN_SN( _val ) \ + ( ( _val ) << SPWRMAP_PNPUSN_SN_SHIFT ) /** @} */ @@ -861,8 +904,9 @@ extern "C" { #define SPWRMAP_MAXPLEN_ML_SHIFT 0 #define SPWRMAP_MAXPLEN_ML_MASK 0x1ffffffU #define SPWRMAP_MAXPLEN_ML_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1ffffffU ) -#define SPWRMAP_MAXPLEN_ML( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_MAXPLEN_ML_MASK ) >> SPWRMAP_MAXPLEN_ML_SHIFT ) +#define SPWRMAP_MAXPLEN_ML( _val ) \ + ( ( _val ) << SPWRMAP_MAXPLEN_ML_SHIFT ) /** @} */ @@ -877,14 +921,16 @@ extern "C" { #define SPWRMAP_CREDCNT_OC_SHIFT 6 #define SPWRMAP_CREDCNT_OC_MASK 0xfc0U #define SPWRMAP_CREDCNT_OC_GET( _reg ) \ - ( ( ( _reg ) >> 6 ) & 0x3fU ) -#define SPWRMAP_CREDCNT_OC( _val ) ( ( _val ) << 6 ) + ( ( ( _reg ) & SPWRMAP_CREDCNT_OC_MASK ) >> SPWRMAP_CREDCNT_OC_SHIFT ) +#define SPWRMAP_CREDCNT_OC( _val ) \ + ( ( _val ) << SPWRMAP_CREDCNT_OC_SHIFT ) #define SPWRMAP_CREDCNT_IC_SHIFT 0 #define SPWRMAP_CREDCNT_IC_MASK 0x3fU #define SPWRMAP_CREDCNT_IC_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x3fU ) -#define SPWRMAP_CREDCNT_IC( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWRMAP_CREDCNT_IC_MASK ) >> SPWRMAP_CREDCNT_IC_SHIFT ) +#define SPWRMAP_CREDCNT_IC( _val ) \ + ( ( _val ) << SPWRMAP_CREDCNT_IC_SHIFT ) /** @} */ @@ -908,8 +954,9 @@ extern "C" { #define SPWRMAP_RTCOMB_PE_SHIFT 1 #define SPWRMAP_RTCOMB_PE_MASK 0xffffeU #define SPWRMAP_RTCOMB_PE_GET( _reg ) \ - ( ( ( _reg ) >> 1 ) & 0x7ffffU ) -#define SPWRMAP_RTCOMB_PE( _val ) ( ( _val ) << 1 ) + ( ( ( _reg ) & SPWRMAP_RTCOMB_PE_MASK ) >> SPWRMAP_RTCOMB_PE_SHIFT ) +#define SPWRMAP_RTCOMB_PE( _val ) \ + ( ( _val ) << SPWRMAP_RTCOMB_PE_SHIFT ) #define SPWRMAP_RTCOMB_PD 0x1U diff --git a/bsps/include/grlib/spwtdp-regs.h b/bsps/include/grlib/spwtdp-regs.h index e5df0c8204..2dd6068c6e 100644 --- a/bsps/include/grlib/spwtdp-regs.h +++ b/bsps/include/grlib/spwtdp-regs.h @@ -100,8 +100,9 @@ extern "C" { #define SPWTDP_CONF0_MAPPING_SHIFT 8 #define SPWTDP_CONF0_MAPPING_MASK 0x1f00U #define SPWTDP_CONF0_MAPPING_GET( _reg ) \ - ( ( ( _reg ) >> 8 ) & 0x1fU ) -#define SPWTDP_CONF0_MAPPING( _val ) ( ( _val ) << 8 ) + ( ( ( _reg ) & SPWTDP_CONF0_MAPPING_MASK ) >> SPWTDP_CONF0_MAPPING_SHIFT ) +#define SPWTDP_CONF0_MAPPING( _val ) \ + ( ( _val ) << SPWTDP_CONF0_MAPPING_SHIFT ) #define SPWTDP_CONF0_TD 0x80U @@ -110,8 +111,9 @@ extern "C" { #define SPWTDP_CONF0_SEL_SHIFT 4 #define SPWTDP_CONF0_SEL_MASK 0x30U #define SPWTDP_CONF0_SEL_GET( _reg ) \ - ( ( ( _reg ) >> 4 ) & 0x3U ) -#define SPWTDP_CONF0_SEL( _val ) ( ( _val ) << 4 ) + ( ( ( _reg ) & SPWTDP_CONF0_SEL_MASK ) >> SPWTDP_CONF0_SEL_SHIFT ) +#define SPWTDP_CONF0_SEL( _val ) \ + ( ( _val ) << SPWTDP_CONF0_SEL_SHIFT ) #define SPWTDP_CONF0_ME 0x8U @@ -134,8 +136,9 @@ extern "C" { #define SPWTDP_CONF3_STM_SHIFT 16 #define SPWTDP_CONF3_STM_MASK 0x3f0000U #define SPWTDP_CONF3_STM_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0x3fU ) -#define SPWTDP_CONF3_STM( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & SPWTDP_CONF3_STM_MASK ) >> SPWTDP_CONF3_STM_SHIFT ) +#define SPWTDP_CONF3_STM( _val ) \ + ( ( _val ) << SPWTDP_CONF3_STM_SHIFT ) #define SPWTDP_CONF3_DI64R 0x2000U @@ -148,14 +151,16 @@ extern "C" { #define SPWTDP_CONF3_INRX_SHIFT 5 #define SPWTDP_CONF3_INRX_MASK 0x3e0U #define SPWTDP_CONF3_INRX_GET( _reg ) \ - ( ( ( _reg ) >> 5 ) & 0x1fU ) -#define SPWTDP_CONF3_INRX( _val ) ( ( _val ) << 5 ) + ( ( ( _reg ) & SPWTDP_CONF3_INRX_MASK ) >> SPWTDP_CONF3_INRX_SHIFT ) +#define SPWTDP_CONF3_INRX( _val ) \ + ( ( _val ) << SPWTDP_CONF3_INRX_SHIFT ) #define SPWTDP_CONF3_INTX_SHIFT 0 #define SPWTDP_CONF3_INTX_MASK 0x1fU #define SPWTDP_CONF3_INTX_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x1fU ) -#define SPWTDP_CONF3_INTX( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_CONF3_INTX_MASK ) >> SPWTDP_CONF3_INTX_SHIFT ) +#define SPWTDP_CONF3_INTX( _val ) \ + ( ( _val ) << SPWTDP_CONF3_INTX_SHIFT ) /** @} */ @@ -174,14 +179,16 @@ extern "C" { #define SPWTDP_CTRL_SPWTC_SHIFT 16 #define SPWTDP_CTRL_SPWTC_MASK 0xff0000U #define SPWTDP_CTRL_SPWTC_GET( _reg ) \ - ( ( ( _reg ) >> 16 ) & 0xffU ) -#define SPWTDP_CTRL_SPWTC( _val ) ( ( _val ) << 16 ) + ( ( ( _reg ) & SPWTDP_CTRL_SPWTC_MASK ) >> SPWTDP_CTRL_SPWTC_SHIFT ) +#define SPWTDP_CTRL_SPWTC( _val ) \ + ( ( _val ) << SPWTDP_CTRL_SPWTC_SHIFT ) #define SPWTDP_CTRL_CPF_SHIFT 0 #define SPWTDP_CTRL_CPF_MASK 0xffffU #define SPWTDP_CTRL_CPF_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define SPWTDP_CTRL_CPF( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_CTRL_CPF_MASK ) >> SPWTDP_CTRL_CPF_SHIFT ) +#define SPWTDP_CTRL_CPF( _val ) \ + ( ( _val ) << SPWTDP_CTRL_CPF_SHIFT ) /** @} */ @@ -196,8 +203,9 @@ extern "C" { #define SPWTDP_CET0_CET0_SHIFT 0 #define SPWTDP_CET0_CET0_MASK 0xffffffffU #define SPWTDP_CET0_CET0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_CET0_CET0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_CET0_CET0_MASK ) >> SPWTDP_CET0_CET0_SHIFT ) +#define SPWTDP_CET0_CET0( _val ) \ + ( ( _val ) << SPWTDP_CET0_CET0_SHIFT ) /** @} */ @@ -212,8 +220,9 @@ extern "C" { #define SPWTDP_CET1_CET1_SHIFT 0 #define SPWTDP_CET1_CET1_MASK 0xffffffffU #define SPWTDP_CET1_CET1_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_CET1_CET1( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_CET1_CET1_MASK ) >> SPWTDP_CET1_CET1_SHIFT ) +#define SPWTDP_CET1_CET1( _val ) \ + ( ( _val ) << SPWTDP_CET1_CET1_SHIFT ) /** @} */ @@ -228,8 +237,9 @@ extern "C" { #define SPWTDP_CET2_CET2_SHIFT 0 #define SPWTDP_CET2_CET2_MASK 0xffffffffU #define SPWTDP_CET2_CET2_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_CET2_CET2( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_CET2_CET2_MASK ) >> SPWTDP_CET2_CET2_SHIFT ) +#define SPWTDP_CET2_CET2( _val ) \ + ( ( _val ) << SPWTDP_CET2_CET2_SHIFT ) /** @} */ @@ -244,8 +254,9 @@ extern "C" { #define SPWTDP_CET3_CET3_SHIFT 0 #define SPWTDP_CET3_CET3_MASK 0xffffffffU #define SPWTDP_CET3_CET3_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_CET3_CET3( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_CET3_CET3_MASK ) >> SPWTDP_CET3_CET3_SHIFT ) +#define SPWTDP_CET3_CET3( _val ) \ + ( ( _val ) << SPWTDP_CET3_CET3_SHIFT ) /** @} */ @@ -260,8 +271,9 @@ extern "C" { #define SPWTDP_CET4_CET4_SHIFT 24 #define SPWTDP_CET4_CET4_MASK 0xff000000U #define SPWTDP_CET4_CET4_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define SPWTDP_CET4_CET4( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & SPWTDP_CET4_CET4_MASK ) >> SPWTDP_CET4_CET4_SHIFT ) +#define SPWTDP_CET4_CET4( _val ) \ + ( ( _val ) << SPWTDP_CET4_CET4_SHIFT ) /** @} */ @@ -276,8 +288,9 @@ extern "C" { #define SPWTDP_DPF_DPF_SHIFT 0 #define SPWTDP_DPF_DPF_MASK 0xffffU #define SPWTDP_DPF_DPF_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define SPWTDP_DPF_DPF( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_DPF_DPF_MASK ) >> SPWTDP_DPF_DPF_SHIFT ) +#define SPWTDP_DPF_DPF( _val ) \ + ( ( _val ) << SPWTDP_DPF_DPF_SHIFT ) /** @} */ @@ -292,8 +305,9 @@ extern "C" { #define SPWTDP_DET0_DET0_SHIFT 0 #define SPWTDP_DET0_DET0_MASK 0xffffffffU #define SPWTDP_DET0_DET0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_DET0_DET0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_DET0_DET0_MASK ) >> SPWTDP_DET0_DET0_SHIFT ) +#define SPWTDP_DET0_DET0( _val ) \ + ( ( _val ) << SPWTDP_DET0_DET0_SHIFT ) /** @} */ @@ -308,8 +322,9 @@ extern "C" { #define SPWTDP_DET1_DET1_SHIFT 0 #define SPWTDP_DET1_DET1_MASK 0xffffffffU #define SPWTDP_DET1_DET1_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_DET1_DET1( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_DET1_DET1_MASK ) >> SPWTDP_DET1_DET1_SHIFT ) +#define SPWTDP_DET1_DET1( _val ) \ + ( ( _val ) << SPWTDP_DET1_DET1_SHIFT ) /** @} */ @@ -324,8 +339,9 @@ extern "C" { #define SPWTDP_DET2_DET2_SHIFT 0 #define SPWTDP_DET2_DET2_MASK 0xffffffffU #define SPWTDP_DET2_DET2_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_DET2_DET2( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_DET2_DET2_MASK ) >> SPWTDP_DET2_DET2_SHIFT ) +#define SPWTDP_DET2_DET2( _val ) \ + ( ( _val ) << SPWTDP_DET2_DET2_SHIFT ) /** @} */ @@ -340,8 +356,9 @@ extern "C" { #define SPWTDP_DET3_DET3_SHIFT 0 #define SPWTDP_DET3_DET3_MASK 0xffffffffU #define SPWTDP_DET3_DET3_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_DET3_DET3( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_DET3_DET3_MASK ) >> SPWTDP_DET3_DET3_SHIFT ) +#define SPWTDP_DET3_DET3( _val ) \ + ( ( _val ) << SPWTDP_DET3_DET3_SHIFT ) /** @} */ @@ -356,8 +373,9 @@ extern "C" { #define SPWTDP_DET4_DET4_SHIFT 24 #define SPWTDP_DET4_DET4_MASK 0xff000000U #define SPWTDP_DET4_DET4_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define SPWTDP_DET4_DET4( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & SPWTDP_DET4_DET4_MASK ) >> SPWTDP_DET4_DET4_SHIFT ) +#define SPWTDP_DET4_DET4( _val ) \ + ( ( _val ) << SPWTDP_DET4_DET4_SHIFT ) /** @} */ @@ -372,8 +390,9 @@ extern "C" { #define SPWTDP_TRPFRX_TRPF_SHIFT 0 #define SPWTDP_TRPFRX_TRPF_MASK 0xffffU #define SPWTDP_TRPFRX_TRPF_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define SPWTDP_TRPFRX_TRPF( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_TRPFRX_TRPF_MASK ) >> SPWTDP_TRPFRX_TRPF_SHIFT ) +#define SPWTDP_TRPFRX_TRPF( _val ) \ + ( ( _val ) << SPWTDP_TRPFRX_TRPF_SHIFT ) /** @} */ @@ -388,8 +407,9 @@ extern "C" { #define SPWTDP_TR0_TR0_SHIFT 0 #define SPWTDP_TR0_TR0_MASK 0xffffffffU #define SPWTDP_TR0_TR0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_TR0_TR0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_TR0_TR0_MASK ) >> SPWTDP_TR0_TR0_SHIFT ) +#define SPWTDP_TR0_TR0( _val ) \ + ( ( _val ) << SPWTDP_TR0_TR0_SHIFT ) /** @} */ @@ -404,8 +424,9 @@ extern "C" { #define SPWTDP_TR1_TR1_SHIFT 0 #define SPWTDP_TR1_TR1_MASK 0xffffffffU #define SPWTDP_TR1_TR1_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_TR1_TR1( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_TR1_TR1_MASK ) >> SPWTDP_TR1_TR1_SHIFT ) +#define SPWTDP_TR1_TR1( _val ) \ + ( ( _val ) << SPWTDP_TR1_TR1_SHIFT ) /** @} */ @@ -420,8 +441,9 @@ extern "C" { #define SPWTDP_TR2_TR2_SHIFT 0 #define SPWTDP_TR2_TR2_MASK 0xffffffffU #define SPWTDP_TR2_TR2_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_TR2_TR2( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_TR2_TR2_MASK ) >> SPWTDP_TR2_TR2_SHIFT ) +#define SPWTDP_TR2_TR2( _val ) \ + ( ( _val ) << SPWTDP_TR2_TR2_SHIFT ) /** @} */ @@ -436,8 +458,9 @@ extern "C" { #define SPWTDP_TR3_TR3_SHIFT 0 #define SPWTDP_TR3_TR3_MASK 0xffffffffU #define SPWTDP_TR3_TR3_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_TR3_TR3( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_TR3_TR3_MASK ) >> SPWTDP_TR3_TR3_SHIFT ) +#define SPWTDP_TR3_TR3( _val ) \ + ( ( _val ) << SPWTDP_TR3_TR3_SHIFT ) /** @} */ @@ -452,8 +475,9 @@ extern "C" { #define SPWTDP_TR4_TR4_SHIFT 24 #define SPWTDP_TR4_TR4_MASK 0xff000000U #define SPWTDP_TR4_TR4_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define SPWTDP_TR4_TR4( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & SPWTDP_TR4_TR4_MASK ) >> SPWTDP_TR4_TR4_SHIFT ) +#define SPWTDP_TR4_TR4( _val ) \ + ( ( _val ) << SPWTDP_TR4_TR4_SHIFT ) /** @} */ @@ -469,14 +493,16 @@ extern "C" { #define SPWTDP_TTPFTX_TSTC_SHIFT 24 #define SPWTDP_TTPFTX_TSTC_MASK 0xff000000U #define SPWTDP_TTPFTX_TSTC_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define SPWTDP_TTPFTX_TSTC( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & SPWTDP_TTPFTX_TSTC_MASK ) >> SPWTDP_TTPFTX_TSTC_SHIFT ) +#define SPWTDP_TTPFTX_TSTC( _val ) \ + ( ( _val ) << SPWTDP_TTPFTX_TSTC_SHIFT ) #define SPWTDP_TTPFTX_TTPF_SHIFT 0 #define SPWTDP_TTPFTX_TTPF_MASK 0xffffU #define SPWTDP_TTPFTX_TTPF_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define SPWTDP_TTPFTX_TTPF( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_TTPFTX_TTPF_MASK ) >> SPWTDP_TTPFTX_TTPF_SHIFT ) +#define SPWTDP_TTPFTX_TTPF( _val ) \ + ( ( _val ) << SPWTDP_TTPFTX_TTPF_SHIFT ) /** @} */ @@ -491,8 +517,9 @@ extern "C" { #define SPWTDP_TT0_TT0_SHIFT 0 #define SPWTDP_TT0_TT0_MASK 0xffffffffU #define SPWTDP_TT0_TT0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_TT0_TT0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_TT0_TT0_MASK ) >> SPWTDP_TT0_TT0_SHIFT ) +#define SPWTDP_TT0_TT0( _val ) \ + ( ( _val ) << SPWTDP_TT0_TT0_SHIFT ) /** @} */ @@ -507,8 +534,9 @@ extern "C" { #define SPWTDP_TT1_TT1_SHIFT 0 #define SPWTDP_TT1_TT1_MASK 0xffffffffU #define SPWTDP_TT1_TT1_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_TT1_TT1( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_TT1_TT1_MASK ) >> SPWTDP_TT1_TT1_SHIFT ) +#define SPWTDP_TT1_TT1( _val ) \ + ( ( _val ) << SPWTDP_TT1_TT1_SHIFT ) /** @} */ @@ -523,8 +551,9 @@ extern "C" { #define SPWTDP_TT2_TT2_SHIFT 0 #define SPWTDP_TT2_TT2_MASK 0xffffffffU #define SPWTDP_TT2_TT2_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_TT2_TT2( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_TT2_TT2_MASK ) >> SPWTDP_TT2_TT2_SHIFT ) +#define SPWTDP_TT2_TT2( _val ) \ + ( ( _val ) << SPWTDP_TT2_TT2_SHIFT ) /** @} */ @@ -539,8 +568,9 @@ extern "C" { #define SPWTDP_TT3_TT3_SHIFT 0 #define SPWTDP_TT3_TT3_MASK 0xffffffffU #define SPWTDP_TT3_TT3_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_TT3_TT3( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_TT3_TT3_MASK ) >> SPWTDP_TT3_TT3_SHIFT ) +#define SPWTDP_TT3_TT3( _val ) \ + ( ( _val ) << SPWTDP_TT3_TT3_SHIFT ) /** @} */ @@ -555,8 +585,9 @@ extern "C" { #define SPWTDP_TT4_TT4_SHIFT 24 #define SPWTDP_TT4_TT4_MASK 0xff000000U #define SPWTDP_TT4_TT4_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define SPWTDP_TT4_TT4( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & SPWTDP_TT4_TT4_MASK ) >> SPWTDP_TT4_TT4_SHIFT ) +#define SPWTDP_TT4_TT4( _val ) \ + ( ( _val ) << SPWTDP_TT4_TT4_SHIFT ) /** @} */ @@ -571,8 +602,9 @@ extern "C" { #define SPWTDP_LPF_LPF_SHIFT 0 #define SPWTDP_LPF_LPF_MASK 0xffffU #define SPWTDP_LPF_LPF_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define SPWTDP_LPF_LPF( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_LPF_LPF_MASK ) >> SPWTDP_LPF_LPF_SHIFT ) +#define SPWTDP_LPF_LPF( _val ) \ + ( ( _val ) << SPWTDP_LPF_LPF_SHIFT ) /** @} */ @@ -621,8 +653,9 @@ extern "C" { #define SPWTDP_DC_DC_SHIFT 0 #define SPWTDP_DC_DC_MASK 0x7fffU #define SPWTDP_DC_DC_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0x7fffU ) -#define SPWTDP_DC_DC( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_DC_DC_MASK ) >> SPWTDP_DC_DC_SHIFT ) +#define SPWTDP_DC_DC( _val ) \ + ( ( _val ) << SPWTDP_DC_DC_SHIFT ) /** @} */ @@ -639,8 +672,9 @@ extern "C" { #define SPWTDP_DS_CD_SHIFT 0 #define SPWTDP_DS_CD_MASK 0xffffffU #define SPWTDP_DS_CD_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffU ) -#define SPWTDP_DS_CD( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_DS_CD_MASK ) >> SPWTDP_DS_CD_SHIFT ) +#define SPWTDP_DS_CD( _val ) \ + ( ( _val ) << SPWTDP_DS_CD_SHIFT ) /** @} */ @@ -655,8 +689,9 @@ extern "C" { #define SPWTDP_EDM0_EDM0_SHIFT 0 #define SPWTDP_EDM0_EDM0_MASK 0xffffffffU #define SPWTDP_EDM0_EDM0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_EDM0_EDM0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_EDM0_EDM0_MASK ) >> SPWTDP_EDM0_EDM0_SHIFT ) +#define SPWTDP_EDM0_EDM0( _val ) \ + ( ( _val ) << SPWTDP_EDM0_EDM0_SHIFT ) /** @} */ @@ -672,8 +707,9 @@ extern "C" { #define SPWTDP_EDPF0_EDPF0_SHIFT 0 #define SPWTDP_EDPF0_EDPF0_MASK 0xffffU #define SPWTDP_EDPF0_EDPF0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffU ) -#define SPWTDP_EDPF0_EDPF0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_EDPF0_EDPF0_MASK ) >> SPWTDP_EDPF0_EDPF0_SHIFT ) +#define SPWTDP_EDPF0_EDPF0( _val ) \ + ( ( _val ) << SPWTDP_EDPF0_EDPF0_SHIFT ) /** @} */ @@ -689,8 +725,9 @@ extern "C" { #define SPWTDP_ED0ET0_ED0ET0_SHIFT 0 #define SPWTDP_ED0ET0_ED0ET0_MASK 0xffffffffU #define SPWTDP_ED0ET0_ED0ET0_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_ED0ET0_ED0ET0( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_ED0ET0_ED0ET0_MASK ) >> SPWTDP_ED0ET0_ED0ET0_SHIFT ) +#define SPWTDP_ED0ET0_ED0ET0( _val ) \ + ( ( _val ) << SPWTDP_ED0ET0_ED0ET0_SHIFT ) /** @} */ @@ -706,8 +743,9 @@ extern "C" { #define SPWTDP_ED0ET1_ED0ET1_SHIFT 0 #define SPWTDP_ED0ET1_ED0ET1_MASK 0xffffffffU #define SPWTDP_ED0ET1_ED0ET1_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_ED0ET1_ED0ET1( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_ED0ET1_ED0ET1_MASK ) >> SPWTDP_ED0ET1_ED0ET1_SHIFT ) +#define SPWTDP_ED0ET1_ED0ET1( _val ) \ + ( ( _val ) << SPWTDP_ED0ET1_ED0ET1_SHIFT ) /** @} */ @@ -723,8 +761,9 @@ extern "C" { #define SPWTDP_ED0ET2_ED0ET2_SHIFT 0 #define SPWTDP_ED0ET2_ED0ET2_MASK 0xffffffffU #define SPWTDP_ED0ET2_ED0ET2_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_ED0ET2_ED0ET2( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_ED0ET2_ED0ET2_MASK ) >> SPWTDP_ED0ET2_ED0ET2_SHIFT ) +#define SPWTDP_ED0ET2_ED0ET2( _val ) \ + ( ( _val ) << SPWTDP_ED0ET2_ED0ET2_SHIFT ) /** @} */ @@ -740,8 +779,9 @@ extern "C" { #define SPWTDP_ED0ET3_ED0ET3_SHIFT 0 #define SPWTDP_ED0ET3_ED0ET3_MASK 0xffffffffU #define SPWTDP_ED0ET3_ED0ET3_GET( _reg ) \ - ( ( ( _reg ) >> 0 ) & 0xffffffffU ) -#define SPWTDP_ED0ET3_ED0ET3( _val ) ( ( _val ) << 0 ) + ( ( ( _reg ) & SPWTDP_ED0ET3_ED0ET3_MASK ) >> SPWTDP_ED0ET3_ED0ET3_SHIFT ) +#define SPWTDP_ED0ET3_ED0ET3( _val ) \ + ( ( _val ) << SPWTDP_ED0ET3_ED0ET3_SHIFT ) /** @} */ @@ -757,8 +797,9 @@ extern "C" { #define SPWTDP_ED0ET4_ED0ET4_SHIFT 24 #define SPWTDP_ED0ET4_ED0ET4_MASK 0xff000000U #define SPWTDP_ED0ET4_ED0ET4_GET( _reg ) \ - ( ( ( _reg ) >> 24 ) & 0xffU ) -#define SPWTDP_ED0ET4_ED0ET4( _val ) ( ( _val ) << 24 ) + ( ( ( _reg ) & SPWTDP_ED0ET4_ED0ET4_MASK ) >> SPWTDP_ED0ET4_ED0ET4_SHIFT ) +#define SPWTDP_ED0ET4_ED0ET4( _val ) \ + ( ( _val ) << SPWTDP_ED0ET4_ED0ET4_SHIFT ) /** @} */ |