validation: Add tests for task modes

2 files changed, 194 insertions, 0 deletions

diff --git a/spec/build/testsuites/validation/validation-0.yml b/spec/build/testsuites/validation/validation-0.yml
index dbe557515b..3477b682e0 100644
--- a/spec/build/testsuites/validation/validation-0.yml
+++ b/spec/build/testsuites/validation/validation-0.yml
@@ -17,6 +17,7 @@ source:
 - testsuites/validation/tc-event-send-receive.c
 - testsuites/validation/tc-message-construct-errors.c
 - testsuites/validation/tc-message-ident.c
+- testsuites/validation/tc-modes.c
 - testsuites/validation/tc-options.c
 - testsuites/validation/tc-part-ident.c
 - testsuites/validation/tc-ratemon-ident.c
diff --git a/testsuites/validation/tc-modes.c b/testsuites/validation/tc-modes.c
new file mode 100644
index 0000000000..57027ad3e3
--- /dev/null
+++ b/testsuites/validation/tc-modes.c
@@ -0,0 +1,193 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTestCaseRtemsModeValModes
+ */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file was automatically generated.  Do not edit it manually.
+ * Please have a look at
+ *
+ * https://docs.rtems.org/branches/master/eng/req/howto.html
+ *
+ * for information how to maintain and re-generate this file.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <rtems.h>
+
+#include <rtems/test.h>
+
+/**
+ * @defgroup RTEMSTestCaseRtemsModeValModes spec:/rtems/mode/val/modes
+ *
+ * @ingroup RTEMSTestSuiteTestsuitesValidation0
+ *
+ * @brief Tests the task mode constants and function-like macros of the Classic
+ *   API.
+ *
+ * This test case performs the following actions:
+ *
+ * - Validate the non-default task mode constants.
+ *
+ *   - Check that RTEMS_NO_ASR is a power of two representable as an integer of
+ *     type rtems_mode.
+ *
+ *   - Check that RTEMS_NO_PREEMPT is a power of two representable as an
+ *     integer of type rtems_mode.
+ *
+ *   - Check that RTEMS_TIMESLICE is a power of two representable as an integer
+ *     of type rtems_mode.
+ *
+ * - Validate the default task mode constants.
+ *
+ *   - Check that RTEMS_ASR is equal to zero.
+ *
+ *   - Check that RTEMS_DEFAULT_MODES is equal to zero.
+ *
+ *   - Check that RTEMS_NO_TIMESLICE is equal to zero.
+ *
+ *   - Check that RTEMS_PREEMPT is equal to zero.
+ *
+ * - Validate RTEMS_ALL_MODE_MASKS.
+ *
+ *   - Check that the bitwise and of RTEMS_ASR_MASK and RTEMS_ALL_MODE_MASKS is
+ *     equal to RTEMS_ASR_MASK.
+ *
+ *   - Check that the bitwise and of RTEMS_PREEMPT_MASK and
+ *     RTEMS_ALL_MODE_MASKS is equal to RTEMS_PREEMPT_MASK.
+ *
+ *   - Check that the bitwise and of RTEMS_TIMESLICE_MASK and
+ *     RTEMS_ALL_MODE_MASKS is equal to RTEMS_TIMESLICE_MASK.
+ *
+ *   - Check that the bitwise and of RTEMS_INTERRUPT_MASK and
+ *     RTEMS_ALL_MODE_MASKS is equal to RTEMS_INTERRUPT_MASK.
+ *
+ * - Validate the task mode mask constants except RTEMS_INTERRUPT_MASK.
+ *
+ *   - Check that RTEMS_ASR_MASK is a power of two representable as an integer
+ *     of type rtems_mode.
+ *
+ *   - Check that RTEMS_PREEMPT_MASK is a power of two representable as an
+ *     integer of type rtems_mode.
+ *
+ *   - Check that RTEMS_TIMESLICE_MASK is a power of two representable as an
+ *     integer of type rtems_mode.
+ *
+ * - Calculate the bitwise or of all task mode mask constants and 0xff.
+ *
+ *   - Check that the count of set bits in the calculated value is equal to the
+ *     count of task mode mask constants except RTEMS_INTERRUPT_MASK plus
+ *     eight. Since each task mode mask constants except RTEMS_INTERRUPT_MASK
+ *     is a power of two and the bitwise and of 0xff and RTEMS_INTERRUPT_MASK
+ *     is equal to RTEMS_INTERRUPT_MASK this proves that each constant and 0xff
+ *     has a unique value.
+ *
+ * @{
+ */
+
+static bool IsPowerOfTwo( rtems_mode mode )
+{
+  return mode != 0 && ( mode & ( mode - 1 ) ) == 0;
+}
+
+static int PopCount( rtems_mode modes )
+{
+  int count;
+
+  count = 0;
+
+  while ( modes != 0 ) {
+    ++count;
+    modes &= modes - 1;
+  }
+
+  return count;
+}
+
+/**
+ * @fn void T_case_body_RtemsModeValModes( void )
+ */
+T_TEST_CASE( RtemsModeValModes )
+{
+  rtems_mode modes;
+
+  T_plan(15);
+
+  /* No action */
+  T_step_true( 0, IsPowerOfTwo( RTEMS_NO_ASR ) );
+  T_step_true( 1, IsPowerOfTwo( RTEMS_NO_PREEMPT ) );
+  T_step_true( 2, IsPowerOfTwo( RTEMS_TIMESLICE ) );
+
+  /* No action */
+  T_step_eq_u32( 3, RTEMS_ASR, 0 );
+  T_step_eq_u32( 4, RTEMS_DEFAULT_MODES, 0 );
+  T_step_eq_u32( 5, RTEMS_NO_TIMESLICE, 0 );
+  T_step_eq_u32( 6, RTEMS_PREEMPT, 0 );
+
+  /* No action */
+  T_step_eq_u32(
+    7,
+    RTEMS_ASR_MASK & RTEMS_ALL_MODE_MASKS,
+    RTEMS_ASR_MASK
+  );
+  T_step_eq_u32(
+    8,
+    RTEMS_PREEMPT_MASK & RTEMS_ALL_MODE_MASKS,
+    RTEMS_PREEMPT_MASK
+  );
+  T_step_eq_u32(
+    9,
+    RTEMS_TIMESLICE_MASK & RTEMS_ALL_MODE_MASKS,
+    RTEMS_TIMESLICE_MASK
+  );
+  T_step_eq_u32(
+    10,
+    RTEMS_INTERRUPT_MASK & RTEMS_ALL_MODE_MASKS,
+    RTEMS_INTERRUPT_MASK
+  );
+
+  /* No action */
+  T_step_true( 11, IsPowerOfTwo( RTEMS_ASR_MASK ) );
+  T_step_true( 12, IsPowerOfTwo( RTEMS_PREEMPT_MASK ) );
+  T_step_true( 13, IsPowerOfTwo( RTEMS_TIMESLICE_MASK ) );
+
+  modes = 0;
+  modes |= 0xff;
+  modes |= RTEMS_ASR_MASK;
+  modes |= RTEMS_PREEMPT_MASK;
+  modes |= RTEMS_TIMESLICE_MASK;
+  T_step_eq_int( 14, PopCount( modes ), 11 );
+}
+
+/** @} */