diff options
author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-07-19 11:06:09 +0200 |
---|---|---|
committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-07-28 08:54:47 +0200 |
commit | 94b27519604760a5987eccc8a36a2713c8195854 (patch) | |
tree | cd82ee7d244bd326d7101c018d09b1f505fb7e3d | |
parent | e9fef02cfab0edd547f253d57fca24819c11e764 (diff) |
bsp/leon3: Add LEON3_L2CACHE_BASE
-rw-r--r-- | bsps/sparc/leon3/start/cache.c | 12 | ||||
-rw-r--r-- | spec/build/bsps/sparc/leon3/grp.yml | 2 | ||||
-rw-r--r-- | spec/build/bsps/sparc/leon3/optl2cachebase.yml | 23 |
3 files changed, 37 insertions, 0 deletions
diff --git a/bsps/sparc/leon3/start/cache.c b/bsps/sparc/leon3/start/cache.c index fcbaf496a3..c7e8144c3f 100644 --- a/bsps/sparc/leon3/start/cache.c +++ b/bsps/sparc/leon3/start/cache.c @@ -17,7 +17,9 @@ #include <bsp/leon3.h> +#if !defined(LEON3_L2CACHE_BASE) #include <grlib/ambapp.h> +#endif #define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS @@ -29,6 +31,7 @@ #define CPU_DATA_CACHE_ALIGNMENT 64 +#if !defined(LEON3_L2CACHE_BASE) static inline l2cache *get_l2c_regs(void) { struct ambapp_dev *adev; @@ -48,25 +51,34 @@ static inline l2cache *get_l2c_regs(void) return (l2cache *) DEV_TO_AHB(adev)->start[1]; } +#endif static inline size_t get_l2_size(void) { +#if defined(LEON3_L2CACHE_BASE) && LEON3_L2CACHE_BASE == 0 + return 0; +#else l2cache *regs; unsigned status; unsigned ways; unsigned set_size; +#if defined(LEON3_L2CACHE_BASE) + regs = (l2cache *) LEON3_L2CACHE_BASE; +#else regs = get_l2c_regs(); if (regs == NULL) { return 0; } +#endif status = grlib_load_32(®s->l2cs); ways = L2CACHE_L2CS_WAY_GET(status) + 1; set_size = L2CACHE_L2CS_WAY_SIZE_GET(status) * 1024; return ways * set_size; +#endif } static inline size_t get_l1_size(uint32_t l1_cfg) diff --git a/spec/build/bsps/sparc/leon3/grp.yml b/spec/build/bsps/sparc/leon3/grp.yml index 8e4ab3702f..7464f1eedb 100644 --- a/spec/build/bsps/sparc/leon3/grp.yml +++ b/spec/build/bsps/sparc/leon3/grp.yml @@ -44,6 +44,8 @@ links: - role: build-dependency uid: optconirq - role: build-dependency + uid: optl2cachebase +- role: build-dependency uid: optleon3smp - role: build-dependency uid: optplbfreq diff --git a/spec/build/bsps/sparc/leon3/optl2cachebase.yml b/spec/build/bsps/sparc/leon3/optl2cachebase.yml new file mode 100644 index 0000000000..1b5faa63d9 --- /dev/null +++ b/spec/build/bsps/sparc/leon3/optl2cachebase.yml @@ -0,0 +1,23 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +copyrights: +- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) +actions: +- get-integer: null +- format-and-define: null +build-type: option +default: null +default-by-family: [] +default-by-variant: +- value: 0x00000000 + variants: + - sparc/gr712rc +- value: 0xf0000000 + variants: + - sparc/gr740 +enabled-by: true +format: '{:#010x}' +links: [] +name: LEON3_L2CACHE_BASE +description: | + This option defines the base address of the L2CACHE register block. +type: build |