1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
|
/* Copyright (c) 2002,2005,2007 Marek Michalkiewicz
Copyright (c) 2007, Dean Camera
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of the copyright holders nor the names of
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. */
/* $Id$ */
#ifndef _AVR_INTERRUPT_H_
#define _AVR_INTERRUPT_H_
#include <avr/io.h>
#if !defined(__DOXYGEN__) && !defined(__STRINGIFY)
/* Auxiliary macro for ISR_ALIAS(). */
#define __STRINGIFY(x) #x
#endif /* !defined(__DOXYGEN__) */
/**
\file
\@{
*/
/** \name Global manipulation of the interrupt flag
The global interrupt flag is maintained in the I bit of the status
register (SREG).
*/
#if defined(__DOXYGEN__)
/** \def sei()
\ingroup avr_interrupts
\code #include <avr/interrupt.h> \endcode
Enables interrupts by setting the global interrupt mask. This function
actually compiles into a single line of assembly, so there is no function
call overhead. */
#define sei()
#else /* !DOXYGEN */
# define sei() __asm__ __volatile__ ("sei" ::)
#endif /* DOXYGEN */
#if defined(__DOXYGEN__)
/** \def cli()
\ingroup avr_interrupts
\code #include <avr/interrupt.h> \endcode
Disables all interrupts by clearing the global interrupt mask. This function
actually compiles into a single line of assembly, so there is no function
call overhead. */
#define cli()
#else /* !DOXYGEN */
# define cli() __asm__ __volatile__ ("cli" ::)
#endif /* DOXYGEN */
/** \name Macros for writing interrupt handler functions */
#if defined(__DOXYGEN__)
/** \def ISR(vector [, attributes])
\ingroup avr_interrupts
\code #include <avr/interrupt.h> \endcode
Introduces an interrupt handler function (interrupt service
routine) that runs with global interrupts initially disabled
by default with no attributes specified.
The attributes are optional and alter the behaviour and resultant
generated code of the interrupt routine. Multiple attributes may
be used for a single function, with a space seperating each
attribute.
Valid attributes are ISR_BLOCK, ISR_NOBLOCK, ISR_NAKED and
ISR_ALIASOF(vect).
\c vector must be one of the interrupt vector names that are
valid for the particular MCU type.
*/
# define ISR(vector, [attributes])
#else /* real code */
#if (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4)
# define __INTR_ATTRS used, externally_visible
#else /* GCC < 4.1 */
# define __INTR_ATTRS used
#endif
#ifdef __cplusplus
# define ISR(vector, ...) \
extern "C" void vector (void) __attribute__ ((signal,__INTR_ATTRS)) __VA_ARGS__; \
void vector (void)
#else
# define ISR(vector, ...) \
void vector (void) __attribute__ ((signal,__INTR_ATTRS)) __VA_ARGS__; \
void vector (void)
#endif
#endif /* DOXYGEN */
#if defined(__DOXYGEN__)
/** \def SIGNAL(vector)
\ingroup avr_interrupts
\code #include <avr/interrupt.h> \endcode
Introduces an interrupt handler function that runs with global interrupts
initially disabled.
This is the same as the ISR macro without optional attributes.
\deprecated Do not use SIGNAL() in new code. Use ISR() instead.
*/
# define SIGNAL(vector)
#else /* real code */
#ifdef __cplusplus
# define SIGNAL(vector) \
extern "C" void vector(void) __attribute__ ((signal, __INTR_ATTRS)); \
void vector (void)
#else
# define SIGNAL(vector) \
void vector (void) __attribute__ ((signal, __INTR_ATTRS)); \
void vector (void)
#endif
#endif /* DOXYGEN */
#if defined(__DOXYGEN__)
/** \def EMPTY_INTERRUPT(vector)
\ingroup avr_interrupts
\code #include <avr/interrupt.h> \endcode
Defines an empty interrupt handler function. This will not generate
any prolog or epilog code and will only return from the ISR. Do not
define a function body as this will define it for you.
Example:
\code EMPTY_INTERRUPT(ADC_vect);\endcode */
# define EMPTY_INTERRUPT(vector)
#else /* real code */
#ifdef __cplusplus
# define EMPTY_INTERRUPT(vector) \
extern "C" void vector(void) __attribute__ ((signal,naked,__INTR_ATTRS)); \
void vector (void) { __asm__ __volatile__ ("reti" ::); }
#else
# define EMPTY_INTERRUPT(vector) \
void vector (void) __attribute__ ((signal,naked,__INTR_ATTRS)); \
void vector (void) { __asm__ __volatile__ ("reti" ::); }
#endif
#endif /* DOXYGEN */
#if defined(__DOXYGEN__)
/** \def ISR_ALIAS(vector, target_vector)
\ingroup avr_interrupts
\code #include <avr/interrupt.h> \endcode
Aliases a given vector to another one in the same manner as the
ISR_ALIASOF attribute for the ISR() macro. Unlike the ISR_ALIASOF
attribute macro however, this is compatible for all versions of
GCC rather than just GCC version 4.2 onwards.
\note This macro creates a trampoline function for the aliased
macro. This will result in a two cycle penalty for the aliased
vector compared to the ISR the vector is aliased to, due to the
JMP/RJMP opcode used.
\deprecated
For new code, the use of ISR(..., ISR_ALIASOF(...)) is
recommended.
Example:
\code
ISR(INT0_vect)
{
PORTB = 42;
}
ISR_ALIAS(INT1_vect, INT0_vect);
\endcode
*/
# define ISR_ALIAS(vector, target_vector)
#else /* real code */
#ifdef __cplusplus
# if defined(__AVR_MEGA__) && __AVR_MEGA__
# define ISR_ALIAS(vector, tgt) extern "C" void vector (void) \
__attribute__((signal, naked, __INTR_ATTRS)); \
void vector (void) { __asm__ volatile ("jmp " __STRINGIFY(tgt) ::); }
# else /* !__AVR_MEGA */
# define ISR_ALIAS(vector, tgt) extern "C" void vector (void) \
__attribute__((signal, naked, __INTR_ATTRS)); \
void vector (void) { __asm__ volatile ("rjmp " __STRINGIFY(tgt) ::); }
# endif /* __AVR_MEGA__ */
#else /* !__cplusplus */
# if defined(__AVR_MEGA__) && __AVR_MEGA__
# define ISR_ALIAS(vector, tgt) void vector (void) \
__attribute__((signal, naked, __INTR_ATTRS)); \
void vector (void) { __asm__ volatile ("jmp " __STRINGIFY(tgt) ::); }
# else /* !__AVR_MEGA */
# define ISR_ALIAS(vector, tgt) void vector (void) \
__attribute__((signal, naked, __INTR_ATTRS)); \
void vector (void) { __asm__ volatile ("rjmp " __STRINGIFY(tgt) ::); }
# endif /* __AVR_MEGA__ */
#endif /* __cplusplus */
#endif /* DOXYGEN */
#if defined(__DOXYGEN__)
/** \def reti()
\ingroup avr_interrupts
\code #include <avr/interrupt.h> \endcode
Returns from an interrupt routine, enabling global interrupts. This should
be the last command executed before leaving an ISR defined with the ISR_NAKED
attribute.
This macro actually compiles into a single line of assembly, so there is
no function call overhead.
*/
# define reti()
#else /* !DOXYGEN */
# define reti() __asm__ __volatile__ ("reti" ::)
#endif /* DOXYGEN */
#if defined(__DOXYGEN__)
/** \def BADISR_vect
\ingroup avr_interrupts
\code #include <avr/interrupt.h> \endcode
This is a vector which is aliased to __vector_default, the vector
executed when an ISR fires with no accompanying ISR handler. This
may be used along with the ISR() macro to create a catch-all for
undefined but used ISRs for debugging purposes.
*/
# define BADISR_vect
#else /* !DOXYGEN */
# define BADISR_vect __vector_default
#endif /* DOXYGEN */
/** \name ISR attributes */
#if defined(__DOXYGEN__)
/** \def ISR_BLOCK
\ingroup avr_interrupts
\code# include <avr/interrupt.h> \endcode
Identical to an ISR with no attributes specified. Global
interrupts are initially disabled by the AVR hardware when
entering the ISR, without the compiler modifying this state.
Use this attribute in the attributes parameter of the ISR macro.
*/
# define ISR_BLOCK
/** \def ISR_NOBLOCK
\ingroup avr_interrupts
\code# include <avr/interrupt.h> \endcode
ISR runs with global interrupts initially enabled. The interrupt
enable flag is activated by the compiler as early as possible
within the ISR to ensure minimal processing delay for nested
interrupts.
This may be used to create nested ISRs, however care should be
taken to avoid stack overflows, or to avoid infinitely entering
the ISR for those cases where the AVR hardware does not clear the
respective interrupt flag before entering the ISR.
Use this attribute in the attributes parameter of the ISR macro.
*/
# define ISR_NOBLOCK
/** \def ISR_NAKED
\ingroup avr_interrupts
\code# include <avr/interrupt.h> \endcode
ISR is created with no prologue or epilogue code. The user code is
responsible for preservation of the machine state including the
SREG register, as well as placing a reti() at the end of the
interrupt routine.
Use this attribute in the attributes parameter of the ISR macro.
*/
# define ISR_NAKED
/** \def ISR_ALIASOF(target_vector)
\ingroup avr_interrupts
\code#include <avr/interrupt.h>\endcode
The ISR is linked to another ISR, specified by the vect parameter.
This is compatible with GCC 4.2 and greater only.
Use this attribute in the attributes parameter of the ISR macro.
*/
# define ISR_ALIASOF(target_vector)
#else /* !DOXYGEN */
# define ISR_BLOCK
# define ISR_NOBLOCK __attribute__((interrupt))
# define ISR_NAKED __attribute__((naked))
# define ISR_ALIASOF(v) __attribute__((alias(__STRINGIFY(v))))
#endif /* DOXYGEN */
/* \@} */
#endif
|
